JPS61192303U - - Google Patents
Info
- Publication number
- JPS61192303U JPS61192303U JP7703985U JP7703985U JPS61192303U JP S61192303 U JPS61192303 U JP S61192303U JP 7703985 U JP7703985 U JP 7703985U JP 7703985 U JP7703985 U JP 7703985U JP S61192303 U JPS61192303 U JP S61192303U
- Authority
- JP
- Japan
- Prior art keywords
- card
- bus
- shift register
- cpu
- sequencer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Programmable Controllers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7703985U JPS61192303U (sv) | 1985-05-22 | 1985-05-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7703985U JPS61192303U (sv) | 1985-05-22 | 1985-05-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61192303U true JPS61192303U (sv) | 1986-11-29 |
Family
ID=30619735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7703985U Pending JPS61192303U (sv) | 1985-05-22 | 1985-05-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61192303U (sv) |
-
1985
- 1985-05-22 JP JP7703985U patent/JPS61192303U/ja active Pending
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