JPS6118402B2 - - Google Patents

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Publication number
JPS6118402B2
JPS6118402B2 JP52039209A JP3920977A JPS6118402B2 JP S6118402 B2 JPS6118402 B2 JP S6118402B2 JP 52039209 A JP52039209 A JP 52039209A JP 3920977 A JP3920977 A JP 3920977A JP S6118402 B2 JPS6118402 B2 JP S6118402B2
Authority
JP
Japan
Prior art keywords
deceleration
time
speed
point
new
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52039209A
Other languages
Japanese (ja)
Other versions
JPS53124812A (en
Inventor
Kenji Morihara
Toshuki Konaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3920977A priority Critical patent/JPS53124812A/en
Publication of JPS53124812A publication Critical patent/JPS53124812A/en
Publication of JPS6118402B2 publication Critical patent/JPS6118402B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
    • Y02T10/72Electric energy management in electromobility

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  • Electric Propulsion And Braking For Vehicles (AREA)

Description

【発明の詳細な説明】 本発明は車両の定速運転中に於ける低位への指
令速度変化時の減速制御方式の改良に関するもの
である。以下、便宜上定速運転機能を持つたハン
プヤードの入換用自動運転装置(ATO)付デイ
ーデル機関車の制御の場合について説明する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a deceleration control method when the command speed changes to a lower level during constant speed operation of a vehicle. For convenience, the case of controlling a Deidel locomotive equipped with an automatic operating system (ATO) for shunting at a hump yard, which has a constant speed operation function, will be described below.

従来ヤード入換用ATO付機関車は超低速(一
般に1〜5Km/m)で貨物列車をハンプ頂上に押
上げ貨車の散転を行なつており、散転状態に応じ
その指令速度も頻繁に変化する。従つてその時の
新しい目標速度への追従時間の短縮と追従性能の
改善の為に第1図に示す特性図のようにa点で示
す速度に機関車があつた場合、原点o点のような
新しい低位の指令速度が与えられた場合、エンジ
ンを「切」状態又はブレーキを付加し、1Sステ
ツプのb点に瞬間ステツプダウンし、ある減速度
をもつてb→cの軌跡でc点に減速させ、c点に
於ける減速度によりその時の走行抵抗とバランス
するステツプを演算し、第1図ではd点にステツ
プアツプさせ目標速度制御ゾーンへ移行させる方
式は公知である。なお、第1図において、縦軸は
車両速度Vaの速度偏差△v、横軸は加減速度
α,βを表わし、1S,2……10……はノツチス
テツプを示している。
Conventional ATO-equipped locomotives for yard shunting push freight trains to the top of humps and scatter the freight cars at extremely low speeds (generally 1 to 5 km/m), and the commanded speed also changes frequently depending on the dispersion status. Change. Therefore, in order to shorten the follow-up time to the new target speed and improve the follow-up performance, when the locomotive reaches the speed indicated by point a as shown in the characteristic diagram shown in Figure 1, it is necessary to When a new lower command speed is given, turn off the engine or apply the brake, instantaneously step down to point b in the 1S step, and decelerate to point c on the trajectory b → c with a certain deceleration. A known method is to calculate a step that balances the running resistance at that time by the deceleration at point c, and then step up to point d in FIG. 1 to move to the target speed control zone. In FIG. 1, the vertical axis represents the speed deviation Δv of the vehicle speed Va, the horizontal axis represents the acceleration/deceleration α, β, and 1S, 2, . . . , 10, . . . indicate notch steps.

しかし、この方式は速度偏差が大きく目標速度
への減速時間が数秒以上ある場合は有効である
が、ハンプヤードに於ける定速運転のように指令
速度が0.2〜0.4Km/hピツチで散転状態に応じて
変化することが多いシステムでは第1図のb点→
c点に減速する時間はシステムの制御上減速度が
0.2〜0.4Km/t/s必要であることから1秒前後
しかない。
However, this method is effective when the speed deviation is large and the deceleration time to the target speed is several seconds or more, but when the command speed is at a pitch of 0.2 to 0.4 Km/h, such as constant speed operation in a hump yard, the system is in a rolling state. In systems that often change depending on the situation, point b in Figure 1 →
The time it takes to decelerate to point c is determined by the system control.
Since 0.2 to 0.4 Km/t/s is required, it is only around 1 second.

この為c点に於いて減速度を検出しその値によ
りバランスステツプを演算し、そのステツプにス
キツプさせる為に減速度検出装置は下記(1)式によ
り演算される為、演算遅れ(△t)をともなう。
この演算遅れは0.2〜0.4Km/h/sの検出精度を
出す為には、次式(1)により、最低1〜2秒以上要
する。
For this reason, the deceleration detection device detects the deceleration at point c, calculates the balance step based on that value, and skips to that step.The deceleration detection device calculates the balance step using the following formula (1), so the calculation delay (△t) accompanied by.
This calculation delay requires at least 1 to 2 seconds according to the following equation (1) in order to achieve a detection accuracy of 0.2 to 0.4 Km/h/s.

減速度β=t時の速度v−t時の速度v/サン
プリング時間△t(=t−t) (Km/h/s) …(1)式 即ち、一般に鉄道では、速度発電機TGが用い
られ、この速度発電機TGから発生する車両速度
に比例したパルスから減速度βを演算する。具体
的には、例えばUPパルス入力端子とDOWNパル
ス入力端子を有する可逆力カウンタが用いられ、
このUPパルス入力端子には速度発電機TGからの
車速パルスと周期パルスのAND論理出力が入力
され、他方DOWN入力端子には上記周期パルス
をインバータを介して得た出力と上記車速パルス
のAND論理出力が入力され、その演算結果を減
速度βとして出力する。ここで、周期パルスは
T/2周期毎に“1”と“0”を繰返し、可逆カ
ウンタは周期パルスが“1”の時には加算され、
“0”の時には減算される。従つて、その残つた
値が、減速度βとなる。
Deceleration β = Speed at t 1 - v 1 - Velocity at 2 - t 2 / Sampling time Δt (= t 2 - t 1 ) (Km/h/s)...Equation (1) In other words, generally in railways, A speed generator TG is used, and the deceleration β is calculated from a pulse proportional to the vehicle speed generated by the speed generator TG. Specifically, for example, a reversible force counter having an UP pulse input terminal and a DOWN pulse input terminal is used,
The AND logic output of the vehicle speed pulse and periodic pulse from the speed generator TG is input to this UP pulse input terminal, while the AND logic output of the periodic pulse obtained through the inverter and the vehicle speed pulse are input to the DOWN input terminal. The output is input, and the calculation result is output as deceleration β. Here, the periodic pulse repeats "1" and "0" every T/2 period, and the reversible counter is added when the periodic pulse is "1".
When it is "0", it is subtracted. Therefore, the remaining value becomes the deceleration β.

つまり、上記(1)式のV1は周期パルス“1”の
時の平均速度であり、その場合、サンプリング周
期△tの時間だけ演算遅れが生じた事になる。こ
こで、検出精度の出し方は、今速度発電機TGか
らの車速パルスの10パルスが1Km/hに相当する
とした場合、同期パルスのT/2周期(サンプリ
ング周期△tと同じ)が1秒間の時、UP周期と
DOWN周期時の可逆カウンタの演算結果が10パ
ルスとすると減速度βは、 β=△V/△t=1Km/h(=10パルス)/1S=1
Km/h/sとな る。(つまり、1パルスの計測分解能は0.1Km/
h/sとなる。)従つて、β=0.2〜0.4Km/h/
sの計測をする為には、計測分解能は0.1〜0.2
Km/h/sを最低必要とし、これにより、演算遅
れには1〜2秒最低必要となる。
That is, V 1 in the above equation (1) is the average speed when the periodic pulse is "1", and in this case, a calculation delay occurs for the time of the sampling period Δt. Here, the method of determining the detection accuracy is that if 10 pulses of vehicle speed pulses from the speed generator TG correspond to 1 km/h, then T/2 period (same as sampling period △t) of the synchronizing pulse is 1 second. When , the UP period and
If the calculation result of the reversible counter during the DOWN cycle is 10 pulses, the deceleration β is β = △V / △t = 1Km/h (= 10 pulses) / 1S = 1
Km/h/s. (In other words, the measurement resolution of one pulse is 0.1Km/
h/s. ) Therefore, β=0.2~0.4Km/h/
In order to measure s, the measurement resolution is 0.1 to 0.2
Km/h/s is required as a minimum, which results in a minimum calculation delay of 1 to 2 seconds.

この演算時間を短かくする事は、演算精度が悪
くなり正確なバランスノツチを演算する事が不可
能になり同じく追従性能が低下する。又、a点→
b点に指令は瞬間的に移行してもブレーキないし
エンジンの応答遅れがり、この為速度指令変化時
の減速時間が1〜2秒以下の場合、減速度検出装
置が演算する減速度は、c点に於ける実際の減速
度より小さめになり、定速運転するに必要なバラ
ンストルク演算結果のステツプアツプ段数(c点
→d点への移行段数)は少なくなり例えば、第1
図のc点→e点のようになつて、車両はその後e
点→f点→g点→h点→i点のように制御される
結果、減速追従精度を悪化させ列車速度がハンチ
ングするばかりか、追従時間が延びハンプヤード
システムが必要とする速度が出ない為、直前に分
解した貨車と再連結したり、ポイント切換余裕が
なくなりポイント切換中にポイントに突つ込み脱
線転覆、果てはガソリン用タンク車等の場合、火
災事故にもなり重大な事故をひき起す原因となつ
ていた。
If this calculation time is shortened, the calculation accuracy will deteriorate, making it impossible to calculate an accurate balance notch, and the tracking performance will also deteriorate. Also, point a→
Even if the command is instantaneously shifted to point b, there is a delay in the response of the brake or engine. Therefore, if the deceleration time when the speed command changes is less than 1 to 2 seconds, the deceleration calculated by the deceleration detection device is c. The deceleration is smaller than the actual deceleration at point 1, and the number of step-up stages (the number of transition stages from point c to point d) of the balance torque calculation result necessary for constant speed operation is smaller, for example, the deceleration at point 1.
The situation changes from point c to point e in the figure, and the vehicle then moves to point e.
As a result of being controlled as follows: point → point f → point g → point h → point i, not only does deceleration tracking accuracy deteriorate and the train speed hunts, but the tracking time becomes longer and the speed required by the hump yard system cannot be achieved. Therefore, if the train is reconnected with a freight car that was disassembled just before, or if there is no room for point switching, the train may run into the point during point switching, derailing and overturning, or even cause a fire or serious accident if it is a gasoline tank car. It was the cause.

本発明は低位の速度指令へ変化した場合減速度
演算時間(サンプリング時間)内に、その目標と
する速度制御ゾーンへ移行した場合(つまりc点
に達した場合)は、速度変化直前のバランスノツ
チ又はマイナス1ステツプのステツプ(このステ
ツプをどこに設定するかはエンジン特性による
が、速度偏差△Vが小さい為第1図でもわかるよ
うにほとんどバランスノツチはかわらないのが普
通である。)に強制的に移行させる方式により上
記従来の欠点を除去するものである。
In the present invention, when changing to a lower speed command, if the target speed control zone is reached (that is, point c is reached) within the deceleration calculation time (sampling time), the balance notch immediately before the speed change is Or forcibly take a minus one step step (where to set this step depends on the engine characteristics, but since the speed deviation △V is small, the balance notch usually does not change much as shown in Figure 1). This method eliminates the above-mentioned drawbacks of the conventional method.

次に本発明の一実施例を図について詳細説明を
行なう。第2図において1は低位指令速度が与え
られてから目標とする速度制御ゾーン(第1図の
b→c点間)に達するまでの減速時間t3と減速度
検出装置のサンプリングタイム(演算遅れ時間)
△t=t2−t1とを比較する比較器、2は低位の指
令速度が与えられた時減速させるために何ステツ
プダウンさせたかというステツプダウン数情報
で、元のバランスステツプを記憶するカウンタな
いしフリツプフロツプ等の記憶手段である。(第
1図のa→b点移行時のステツプダウン数に相
当)比較器1の出力はt3>△tのときは「0」
で、t3<△tのとき「1」となる。3,4はAND
回路、5はNOT回路、6はOR回路である。
Next, one embodiment of the present invention will be described in detail with reference to the drawings. In Figure 2 , 1 is the deceleration time t from when a low command speed is given until reaching the target speed control zone (between points b and c in Figure 1) and the sampling time of the deceleration detection device (calculation delay). time)
A comparator that compares △t = t 2 - t 1. 2 is step-down number information indicating how many steps are taken down to decelerate when a low command speed is given, and a counter that stores the original balance step. It is also a storage means such as a flip-flop. (corresponds to the step-down number when transitioning from point a to point b in Figure 1) The output of comparator 1 is "0" when t 3 > △t.
Then, it becomes "1" when t 3 <Δt. 3 and 4 are AND
5 is a NOT circuit, and 6 is an OR circuit.

このように構成されたものにおいて、各指令間
の時係列関係は第3図に示すようになつており、
第1図のc点に達した時、t3>△tなら減速度検
出器により演算したバランスステツプの為のステ
ツプアツプ量の情報が→→→→とし与
えられ、ステツプアツプされ目標速度制御ゾーン
に突入する。
In this configuration, the time series relationship between each command is as shown in Figure 3.
When reaching point c in Figure 1, if t 3 > △t, information on the step-up amount for the balance step calculated by the deceleration detector is given as →→→→, and the speed is stepped up and entered the target speed control zone. do.

ここで、ステツプ出力は、例えばUPパルス入
力端子とDOWNパルス入力端子を有する可逆カ
ウンタを用いて得ることができ、このUPパルス
入力端子には第2図におけるステツプアツプ情報
とステツプup/down選択信号のAND論理
出力が入力され、他方POWN入力端子には上記
ステツプup/down選択信号をインバータを
介して得た出力と上記ステツプアツプ情報の
AND論理出力が入力され、その演算結果を出力
ステツプとして出力する。なお、第3図に示す如
く信号は必要なステツプup/down数だけパ
ルスが出力され、それに応じ上記出力ステツプが
変化する。
Here, the step output can be obtained, for example, by using a reversible counter having an UP pulse input terminal and a DOWN pulse input terminal, and this UP pulse input terminal contains the step up information and the step up/down selection signal shown in FIG. The AND logic output is input, and the other POWN input terminal contains the output obtained from the above step up/down selection signal via an inverter and the above step up information.
AND logic output is input, and the result of the operation is output as an output step. Incidentally, as shown in FIG. 3, the signal is outputted as pulses for the required number of steps up/down, and the output steps are changed accordingly.

一方、t3<△tなら減速度検出器により演算し
たバランスステツプは、真の値より異る為、記憶
手段2に蓄えていた低位指令速度信号受信直前の
バランスステツプ情報を減速完了指令に基づき
→→→→→の経路で出力される。これ
らは比較器1の出力状態つまり減速時間t3と演算
遅れ時間△tの比較結果によりAND回路3,4
及びNOT回路5により選択される。
On the other hand, if t 3 <△t, the balance step calculated by the deceleration detector is different from the true value, so the balance step information stored in the storage means 2 immediately before receiving the low command speed signal is used based on the deceleration completion command. It is output along the path →→→→→. These are determined by AND circuits 3 and 4 based on the output state of comparator 1, that is, the comparison result of deceleration time t3 and calculation delay time △t.
and is selected by the NOT circuit 5.

尚、記憶手段2の指令変化時のステツプダウン
数N1及び減速完了時(第1図のc点)のステツ
プアツプ数N2は同じにするかN2=N1−1にする
かは、エンジン特性等により決定されるが、N2
=N1−1等の演算は減速完了時の出力時行う
か、ステツプダウン数情報を記憶手段2に設定す
る時に行う等の方法がある。
It should be noted that whether the step-down number N1 at the time of command change in the storage means 2 and the step-up number N2 at the time of completion of deceleration (point c in Fig. 1) should be the same or N2 = N1 -1 depends on the engine. Determined by characteristics etc., but N 2
Calculations such as =N 1 -1 can be performed at the time of output upon completion of deceleration, or at the time of setting the step-down number information in the storage means 2.

このように速度指令変化時の減速度偏差が減速
度検出装置の演算時間より短かい場合の速度追従
情報及び収れん時間短縮の改善にとどまらず、ひ
いては脱線,転覆等重大災害を防止し、高信頼度
のものを簡単な構成にて得ることができる。
In this way, it not only improves the speed tracking information and shortens the convergence time when the deceleration deviation when the speed command changes is shorter than the calculation time of the deceleration detection device, but also prevents serious accidents such as derailment and overturning, and improves reliability. degree can be obtained with a simple configuration.

なお、上記の説明では液体式デイーゼル機関車
の減速制御について述べたが、電気車等動力車両
の自動運転装置のこの種制御には適用可能である
事は言うまでもない。
In addition, although the above explanation was about deceleration control of a hydraulic diesel locomotive, it goes without saying that the present invention can be applied to this type of control of an automatic driving device of a powered vehicle such as an electric vehicle.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は減速制御を説明するための制御動作
図、第2図は本発明の一実施例を示すブロツク
図、第3図は各指令間の時系列関係を示すタイム
チヤート図である。 図中、1は比較器、2は記憶手段、3,4は
AND回路、5はNOT回路、6はOR回路である。
FIG. 1 is a control operation diagram for explaining deceleration control, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a time chart showing the chronological relationship between each command. In the figure, 1 is a comparator, 2 is a storage means, and 3 and 4 are
5 is an AND circuit, 5 is a NOT circuit, and 6 is an OR circuit.

Claims (1)

【特許請求の範囲】 1 定速運転機能を有する自動運転装置で新しい
低位指令速度を受け減速させ新しい目標速度制御
ゾーンに近づいたその時の減速度を演算し、その
値によりバランスステツプを見つけ新しい目標速
度制御ゾーンに移行させるように制御するものに
おいて、新しい低位の指令速度が与えられてから
新しい目標速度制御ゾーンに近づくまでの減速時
間と減速度を検出する為の演算遅れ時間との時間
比較を行う時間比較器、新しい低位の指令速度が
与えられた直前のステツプ位置ないし減速させる
為のステツプダウン数情報を記憶するための記憶
手段を備え、〔上記減速時間<上記演算遅れ時
間〕ならば、新しい低位の指令速度を与えられた
直前のバランスステツプ情報をもとに減速完了
時、バランスステツプを設定するようにした事を
特徴とする列車自動制御装置。
[Scope of Claims] 1. An automatic driving device with a constant speed operation function receives a new low command speed, decelerates it, calculates the deceleration at the time when it approaches a new target speed control zone, and uses that value to find a balance step and set a new target. In a device that controls the transition to a speed control zone, the time comparison between the deceleration time from when a new lower command speed is given until approaching the new target speed control zone and the calculation delay time for detecting deceleration is performed. a time comparator for performing the step-down, and a storage means for storing the previous step position at which a new lower command speed was given or step-down number information for deceleration, and if [the deceleration time <the calculation delay time], An automatic train control device characterized in that a balance step is set when deceleration is completed based on balance step information immediately before a new lower command speed is given.
JP3920977A 1977-04-05 1977-04-05 Automatic train operation controlling system Granted JPS53124812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3920977A JPS53124812A (en) 1977-04-05 1977-04-05 Automatic train operation controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3920977A JPS53124812A (en) 1977-04-05 1977-04-05 Automatic train operation controlling system

Publications (2)

Publication Number Publication Date
JPS53124812A JPS53124812A (en) 1978-10-31
JPS6118402B2 true JPS6118402B2 (en) 1986-05-12

Family

ID=12546734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3920977A Granted JPS53124812A (en) 1977-04-05 1977-04-05 Automatic train operation controlling system

Country Status (1)

Country Link
JP (1) JPS53124812A (en)

Also Published As

Publication number Publication date
JPS53124812A (en) 1978-10-31

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