JPS61184005A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To eliminate a minute frequency fluctuation by injecting a feedback signal to a PLL loop and applying DC feedback of an AFC amplifier output to an AFC terminal of a VCO. CONSTITUTION:In disconnecting a PLL loop in a frequency synthesizer 13 by a loop disconnecting switch 20, a pulse wave having a pulse width in response to the frequency fluctuation is obtained from a comparator 18. The pulse wave is injected to the PLL loop of the synthesizer 13 via a waveform shaping circuit 19 and an AFC control switch 21. Thus, the frequency control voltage of the VCO22 is controlled by the AFC loop to stabilize the oscillated frequency. Then the output of the AFC amplifier 15 is fed back directly to the AFC terminal of the VCO22 to form the DC feedback AFC loop at thge same time. Thus, minute frequency fluctuation is eliminated also.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a frequency synthesizer device used in ultra-high frequency multi-channel portable FM radio equipment, etc., and is used to reduce the power consumption of radio equipment.

Conventional Technology Frequency synthesizers are important components of multi-channel radio equipment, and reducing power consumption is an important issue in making radio equipment portable. A method devised to solve this problem is shown in Japanese Patent Application No. 70204/1983.
There is an FG type intermittent operation frequency synthesizer. Hereinafter, a conventional AFC type intermittent operation frequency synthesizer will be explained with reference to FIG.

In FIG. 3, 1 is a frequency synthesizer that serves as a reference station oscillation source, 2 is an FM receiver that operates based on the signal from frequency synthesizer 1, 3 is an AFC amplifier that extracts and amplifies the DC component from the output of FM receiver 2, and 4 is A triangular wave generator that generates a signal at an arbitrary period; 5 a peak clamp circuit that performs DC regeneration of the output of the triangular wave generator 4 at a timing to be described later;
6 is a comparator that compares the signals of the AFC amplifier 3 and the peak clamp circuit 5; 7 is a waveform shaping circuit that shapes the output of the comparator 6; 8 is a loop cutoff switch that cuts the loop of the frequency synthesizer 1; 9 is a loop cutoff switch 8 is a control signal terminal that inputs a control signal; 10 is an AFC control switch that operates in reverse with the signals from the loop cutoff switch 8 and the control signal terminal 9 and injects an AFC control signal into the loop of the frequency synthesizer 1; 11 is a frequency The operation of the voltage controlled oscillator (VCO), which is the oscillation source of the synthesizer 1, in the above configuration will be described below.

First, during normal operation, the loop cut switch 8 is closed and the AFC control switch 10 is open. At this time, frequency synthesizer 1 is in PLL operation and F
The signal is injected into the M receiver 2, which receives the signal of the required channel and demodulates it. During intermittent operation, an appropriate repetitive signal is applied to the control signal terminal 9, and the loop cutoff switch 8 and AFG control switch 1o are opened and closed. When the loop disconnection switch 8 is closed, the AFC control switch 2 is closed, and the AFC control switch 9 is open, the peak clamp circuit 6 clamps the output of the triangular wave generation circuit 4 at the output potential of the human Fc amplifier 3. Loop disconnect switch 8 opens, AFC
When the control switch 1o is closed, the peak clamp circuit 5 holds the previous DC potential. When the loop disconnection switch 8 is open, the PLL loop of the frequency synthesizer 1 is not formed and its output frequency begins to fluctuate, and the DC component of the demodulated output of the FM receiver 2 also fluctuates. By comparing the output of the AFC amplifier 3 with the triangular wave whose potential level was determined by DC regeneration when forming the PLL loop, a pulse wave is generated as the output of the comparator 6, but the width of this pulse wave changes depending on the amount of frequency fluctuation. This pulse wave is shaped by the waveform shaping circuit 7 and then fed back to the loop of the frequency synthesizer 1 through the AFC control switch 1o, thereby forming an AFC loop as a whole and stabilizing the frequency.

In such a configuration, in order to configure the AFC loop by using other components that have been operating simultaneously, the power to the part that formed the PLL loop may be cut off. In this case, only the power supply for vColl is required. By alternately switching between the PLL loop and the AFC loop using a control signal, the average current consumption of the frequency synthesizer 1 can be reduced.

Problems to be Solved by the Invention However, in the above configuration, the loop filter 12 in the frequency synthesizer 1 is optimally designed to suit the PLL looseness, so the pulse injected when forming the AFC loop has a certain frequency width. There was a problem that small frequency fluctuations occurred.

The present invention solves the above-mentioned problems of the prior art, and aims to eliminate even minute frequency fluctuations.

Means for Solving All Problems The present invention has a loop cutoff switch for cutting off a phase-locked loop (PLL) loop in a frequency synthesizer of a multi-channel FM radio, and an Auto Frequency switch that extracts and amplifies the DC component from the receiver output. (:jontrol
(MuIc) Amplifier, correction pulse generation circuit.

The above object is achieved by injecting a feedback signal into the PLL loop using an AFC circuit consisting of an AFC control switch and applying DC feedback to the AFC amplifier output to the AFC terminal of a voltage controlled oscillator (VCO).

Effect of the present invention With the above configuration, a DC feedback type AFC loop is formed together with an AFC loop based on pulse injection.
Since the frequency sensitivity of the AFC terminal of the CO is sufficiently lower than the frequency control terminal sensitivity, the fine frequency fluctuation components caused by the Norse type AFC are corrected by the DC feedback type AFC loop.

EXAMPLE A first example of the present invention will be described below with full reference to the drawings.

FIG. 1 is a configuration diagram of an AFC loose frequency synthesizer device in a first embodiment of the present invention.

In FIG. 1, 13 is a frequency synthesizer serving as a reference station oscillation source, 14 is an FM receiver operated by the signal from the frequency synthesizer 13, 15 is a FM amplifier that extracts and amplifies the DC component from the output of the FM receiver 14, and 16 17 is a peak clamp circuit that partially reproduces DC from the output of the triangular wave generator 16 using a loop control signal; 18 is an AFC amplifier 15;
19 is a waveform shaping circuit that shapes the output of the comparator 18, 2o is a loop disconnection switch that disconnects the loop of the frequency synthesizer 13, and 21 is an AFC that controls pulse AFC signal injection. The control switch 22 is a vCO with an AFC terminal.

In addition, in the frequency synthesizer 13, 131L is a loop filter, 22 is a voltage controlled oscillator (VCO), 1
31) is a power divider, and 130 is a PLI.

XC113 (1 is a temperature compensated crystal oscillator.
In the M receiver 14, 14! L is RF amplifier, 1ab
is the first mixer, 140 is the 11th F band pass filter, 14 (l) is the 11th F amplifier, 144 is the second local fixed oscillator, 14f is the second mixer, 14g is the g2IF/
<Bass filter, 14h is amplitude limiting circuit, 1a
i is a demodulation circuit.

The operation of the above configuration will be explained below.

The FM receiver 14 receives a certain frequency from the output of the frequency synthesizer 13, and obtains a demodulated signal thereof.

Frequency synthesizer 13 by loop disconnection switch 2o
When the PLL loop in the frequency synthesizer 1 is cut, the frequency synthesizer 1
The output frequency of 3 begins to fluctuate, and the DC component of the demodulated signal fluctuates.The AFC amplifier 16 extracts this DC component and amplifies it, and the output of the triangular wave generator 16 1.The peak that was generated by DC when forming the PLL loop. By comparing the output of the clamp circuit 17 with the comparator 18, a pulse wave having a pulse width corresponding to the amount of frequency fluctuation can be obtained. After shaping this pulse wave by a waveform shaping circuit 19, an AFC control switch 21
By injecting the vC0220 frequency control voltage into the loop of the frequency synthesizer 13 through the IAFG loop, the oscillation frequency is stabilized and the AF
A double AFC that directly feeds back the output of the C amplifier 15 to the AFC terminal of the '1cO22 to form a DC feedback type AFC loop.
creating a loop.

As is clear from the above explanation, according to this embodiment, frequency fluctuation correction IEk is performed by the pulse type five FC loops, and correction of minute frequency fluctuations is performed using the AFC with low frequency sensitivity.
This is done by applying feedback to the terminal.

Next, a second embodiment of the present invention will be described.

FIG. 2 is a configuration diagram of a correction pulse generation circuit of a frequency synthesizer device according to a second embodiment of the present invention.

In FIG. 2, the difference from the configuration in FIG. 1 is that comparator circuits 23 and 241 are provided and a triangular wave generator is provided.

The point is that the peak clamp circuit is omitted.゛The operation of the above configuration will be explained below.

The AFC amplifier 26 extracts and amplifies the DC component from the demodulated signal of the FM receiver 25 and inputs it to the comparators 23 and 24. The two comparators set a reference value to a potential level that falls within a certain frequency that is far from the DC component value at the center frequency, and when the voltage exceeds this set frequency, the waveform shaping circuit 27 converts the signal at a certain level into a frequency. Charge is injected into the PLL loop of the synthesizer 28.

As described above, according to this embodiment, since the control pulse is generated through the FM receiver in the pulse type AFC/l/- amplifier, slight frequency fluctuations due to overresponse appear. This fluctuation component is corrected by the DC feedback type Arc loose, and stable frequency control is performed.

In the above explanation, the AFC amplifier 26 is a pulse type AF.
Although we have explained the case where the C loop and the DC feedback type AFC loop are used together, the AFC amplifier 26 has two parallel
It is also possible to use a method to facilitate circuit design by using a circuit board and adjusting the level for each.

Effects of the Invention As described above, the present invention uses a pulse type AFC loop in a frequency synthesizer and configures a DC feedback type AFC loop that applies direct feedback to the vCOOAFC terminal. Although fluctuations occur, this frequency fluctuation can be corrected by using the DC feedback type five FC loops, and the effect is significant.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a frequency synthesizer device according to a first embodiment of the present invention, FIG. 2 is a block diagram of an AFC loop of a frequency synthesizer device according to a second embodiment of the present invention, and FIG. 1 is a block diagram of a conventional intermittent operation frequency synthesizer. 1.13.28...Frequency synthesizer, 2゜14.25...FM receiver, 3, 16, 2
6...AFC amplifier, 4.16...Triangular wave generator, 5゜17...Peak clamp circuit, 6, 1 B, 2, 3. 24... Comparator, 7, 19.27...
... Waveform shaping circuit, 8, 20 ... Loop cutoff switch, 9 ... Control signal terminal, 10.21.
...AFC control switch, 11.22...
・Name of VCO0 agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2

Claims (2)

[Claims] (1) a voltage controlled oscillator having an AFC terminal, a frequency synthesizer configured by the voltage controlled oscillator, and an FM radio using the frequency synthesizer as a first local oscillator;
an AFC amplifier that processes a demodulated signal of the FM radio and returns the signal to an AFC terminal of the voltage controlled oscillator, a triangular wave oscillator, a peak clamp circuit that reproduces DC using the signals of the triangular wave oscillator and the AFC amplifier, and the AFC amplifier. a comparator operated by the output signal of the peak clamp circuit; a waveform shaping circuit that shapes the waveform of the comparator output signal; a loop disconnection switch that disconnects the PLL loop of the frequency synthesizer; A frequency synthesizer device comprising an AFC control switch for injection control into a loop. (2) a voltage controlled oscillator having an AFC terminal, a frequency synthesizer configured by the voltage controlled oscillator, and an FM radio using the frequency synthesizer as a first local oscillator;
an AFC amplifier that processes a demodulated signal of the FM radio and returns the signal to an AFC terminal of the voltage controlled oscillator;
two comparators whose inputs are the outputs of the FC amplifier;
A frequency synthesizer device comprising: a waveform shaping circuit that receives and processes outputs of the two comparators and injects a signal into the loop of the frequency synthesizer; and a loop disconnection switch that disconnects a PLL loop of the frequency synthesizer.