JPS61182244U - - Google Patents

Info

Publication number
JPS61182244U
JPS61182244U JP6641285U JP6641285U JPS61182244U JP S61182244 U JPS61182244 U JP S61182244U JP 6641285 U JP6641285 U JP 6641285U JP 6641285 U JP6641285 U JP 6641285U JP S61182244 U JPS61182244 U JP S61182244U
Authority
JP
Japan
Prior art keywords
water
wall
porous material
impermeable
pot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6641285U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0216605Y2 (de
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985066412U priority Critical patent/JPH0216605Y2/ja
Publication of JPS61182244U publication Critical patent/JPS61182244U/ja
Application granted granted Critical
Publication of JPH0216605Y2 publication Critical patent/JPH0216605Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Cultivation Receptacles Or Flower-Pots, Or Pots For Seedlings (AREA)
JP1985066412U 1985-05-02 1985-05-02 Expired JPH0216605Y2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985066412U JPH0216605Y2 (de) 1985-05-02 1985-05-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985066412U JPH0216605Y2 (de) 1985-05-02 1985-05-02

Publications (2)

Publication Number Publication Date
JPS61182244U true JPS61182244U (de) 1986-11-13
JPH0216605Y2 JPH0216605Y2 (de) 1990-05-08

Family

ID=30599290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985066412U Expired JPH0216605Y2 (de) 1985-05-02 1985-05-02

Country Status (1)

Country Link
JP (1) JPH0216605Y2 (de)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US8836045B2 (en) 2008-03-13 2014-09-16 Tela Innovations, Inc. Cross-coupled transistor circuit having diffusion regions of common node on opposing sides of same gate electrode track
US8863063B2 (en) 2009-05-06 2014-10-14 Tela Innovations, Inc. Finfet transistor circuit
US8921896B2 (en) 2006-03-09 2014-12-30 Tela Innovations, Inc. Integrated circuit including linear gate electrode structures having different extension distances beyond contact
US8951916B2 (en) 2007-12-13 2015-02-10 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US8966424B2 (en) 2007-03-07 2015-02-24 Tela Innovations, Inc. Methods for cell phasing and placement in dynamic array architecture and implementation of the same
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
US9202779B2 (en) 2008-01-31 2015-12-01 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US9240413B2 (en) 2006-03-09 2016-01-19 Tela Innovations, Inc. Methods, structures, and designs for self-aligning local interconnects used in integrated circuits
US9269702B2 (en) 2009-10-13 2016-02-23 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the same
US9336344B2 (en) 2006-03-09 2016-05-10 Tela Innovations, Inc. Coarse grid design methods and structures
US9390215B2 (en) 2008-03-27 2016-07-12 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
KR20160099909A (ko) * 2015-02-13 2016-08-23 함재영 물 저장 및 가습형 화분
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US9595515B2 (en) 2007-03-07 2017-03-14 Tela Innovations, Inc. Semiconductor chip including integrated circuit defined within dynamic array section

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4923441U (de) * 1972-06-03 1974-02-27
JPS5728636U (de) * 1980-07-24 1982-02-15

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983773A (en) * 1975-04-10 1976-10-05 Gaf Corporation Apparatus for perforating roofing sheet material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4923441U (de) * 1972-06-03 1974-02-27
JPS5728636U (de) * 1980-07-24 1982-02-15

Cited By (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US9425272B2 (en) 2006-03-09 2016-08-23 Tela Innovations, Inc. Semiconductor chip including integrated circuit including four transistors of first transistor type and four transistors of second transistor type with electrical connections between various transistors and methods for manufacturing the same
US9425273B2 (en) 2006-03-09 2016-08-23 Tela Innovations, Inc. Semiconductor chip including integrated circuit including at least five gate level conductive structures having particular spatial and electrical relationship and method for manufacturing the same
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US9009641B2 (en) 2006-03-09 2015-04-14 Tela Innovations, Inc. Circuits with linear finfet structures
US9443947B2 (en) 2006-03-09 2016-09-13 Tela Innovations, Inc. Semiconductor chip including region having integrated circuit transistor gate electrodes formed by various conductive structures of specified shape and position and method for manufacturing the same
US9240413B2 (en) 2006-03-09 2016-01-19 Tela Innovations, Inc. Methods, structures, and designs for self-aligning local interconnects used in integrated circuits
US9589091B2 (en) 2006-03-09 2017-03-07 Tela Innovations, Inc. Scalable meta-data objects
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US9336344B2 (en) 2006-03-09 2016-05-10 Tela Innovations, Inc. Coarse grid design methods and structures
US8921896B2 (en) 2006-03-09 2014-12-30 Tela Innovations, Inc. Integrated circuit including linear gate electrode structures having different extension distances beyond contact
US8921897B2 (en) 2006-03-09 2014-12-30 Tela Innovations, Inc. Integrated circuit with gate electrode conductive structures having offset ends
US8946781B2 (en) 2006-03-09 2015-02-03 Tela Innovations, Inc. Integrated circuit including gate electrode conductive structures with different extension distances beyond contact
US8952425B2 (en) 2006-03-09 2015-02-10 Tela Innovations, Inc. Integrated circuit including at least four linear-shaped conductive structures having extending portions of different length
US9425145B2 (en) 2006-03-09 2016-08-23 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US8966424B2 (en) 2007-03-07 2015-02-24 Tela Innovations, Inc. Methods for cell phasing and placement in dynamic array architecture and implementation of the same
US9595515B2 (en) 2007-03-07 2017-03-14 Tela Innovations, Inc. Semiconductor chip including integrated circuit defined within dynamic array section
US9424387B2 (en) 2007-03-07 2016-08-23 Tela Innovations, Inc. Methods for cell phasing and placement in dynamic array architecture and implementation of the same
US8951916B2 (en) 2007-12-13 2015-02-10 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US9281371B2 (en) 2007-12-13 2016-03-08 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US9530734B2 (en) 2008-01-31 2016-12-27 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US9202779B2 (en) 2008-01-31 2015-12-01 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US8872283B2 (en) 2008-03-13 2014-10-28 Tela Innovations, Inc. Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with shared diffusion regions on opposite sides of two-transistor-forming gate level feature
US9213792B2 (en) 2008-03-13 2015-12-15 Tela Innovations, Inc. Semiconductor chip including digital logic circuit including at least six transistors with some transistors forming cross-coupled transistor configuration and associated methods
US9208279B2 (en) 2008-03-13 2015-12-08 Tela Innovations, Inc. Semiconductor chip including digital logic circuit including linear-shaped conductive structures having electrical connection areas located within inner region between transistors of different type and associated methods
US9536899B2 (en) 2008-03-13 2017-01-03 Tela Innovations, Inc. Semiconductor chip including integrated circuit having cross-coupled transistor configuration and method for manufacturing the same
US9245081B2 (en) 2008-03-13 2016-01-26 Tela Innovations, Inc. Semiconductor chip including digital logic circuit including at least nine linear-shaped conductive structures collectively forming gate electrodes of at least six transistors with some transistors forming cross-coupled transistor configuration and associated methods
US8853794B2 (en) 2008-03-13 2014-10-07 Tela Innovations, Inc. Integrated circuit within semiconductor chip including cross-coupled transistor configuration
US8847329B2 (en) 2008-03-13 2014-09-30 Tela Innovations, Inc. Cross-coupled transistor circuit defined having diffusion regions of common node on opposing sides of same gate electrode track with at least two non-inner positioned gate contacts
US8836045B2 (en) 2008-03-13 2014-09-16 Tela Innovations, Inc. Cross-coupled transistor circuit having diffusion regions of common node on opposing sides of same gate electrode track
US8866197B2 (en) 2008-03-13 2014-10-21 Tela Innovations, Inc. Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two gate electrodes electrically connected to each other through another transistor forming gate level feature
US8853793B2 (en) 2008-03-13 2014-10-07 Tela Innovations, Inc. Integrated circuit including gate electrode level region including cross-coupled transistors having gate contacts located over inner portion of gate electrode level region and offset gate level feature line ends
US9117050B2 (en) 2008-03-13 2015-08-25 Tela Innovations, Inc. Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position and offset specifications
US8847331B2 (en) 2008-03-13 2014-09-30 Tela Innovations, Inc. Semiconductor chip including region having cross-coupled transistor configuration with offset electrical connection areas on gate electrode forming conductive structures and at least two different inner extension distances of gate electrode forming conductive structures
US8835989B2 (en) 2008-03-13 2014-09-16 Tela Innovations, Inc. Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate electrode placement specifications
US9390215B2 (en) 2008-03-27 2016-07-12 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US8863063B2 (en) 2009-05-06 2014-10-14 Tela Innovations, Inc. Finfet transistor circuit
US9530795B2 (en) 2009-10-13 2016-12-27 Tela Innovations, Inc. Methods for cell boundary encroachment and semiconductor devices implementing the same
US9269702B2 (en) 2009-10-13 2016-02-23 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the same
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
KR20160099909A (ko) * 2015-02-13 2016-08-23 함재영 물 저장 및 가습형 화분

Also Published As

Publication number Publication date
JPH0216605Y2 (de) 1990-05-08

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