JPS61182180A - Collating device for seal impression - Google Patents

Abstract

PURPOSE:To execute always the suitable collating judgement even when a blur, etc., exist at part of the shade regardless of the size of the shade by dividing the collating area into plural areas and designating in accordance with the divided number stipulated based upon the size of the collating area of the reference shade and the collated shade and calculating the collating ratio of both shades for the plurally divided area each. CONSTITUTION:A divided area address designating part 80, for example, when the shade area to be collated is made into a quadrilateral 65 circumscribing the shade as shown in the figure (A), obtains the number to divide the above- mentioned circumscribing quadrilateral 65 based upon a reference collating unit 66 shown in the figure (B) and address-designates the divided area. By a collating information collecting part 50, total bit numbers A, B and C are obtained for respective plural divided areas. The total bit numbers A, B and C for these respective areas are inputted respectively through buffers into a CPU-1, and the CPU-1 calculates the collating ratio of the reference shade and the collated shade by the data. The calculating result at the CPU-1 is displayed through a character display controller and a selecting display driver on a color CRT10.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a seal stamp matching device that matches a pre-stored reference seal impression with a stamp impression to be matched.

[Technical Background of the Invention] Conventionally, when comparing seals, the reference seal imprint stamped on a registered seal imprint book and the reference seal imprint stamped on paper are visually observed alternately, and the afterimages are used to compare the two. was going on.

However, the above method relies only on the operator's visual inspection, resulting in low verification accuracy and placing a heavy burden on the operator. Furthermore, it was necessary to search for the registered seal register from the file shelf each time the verification was performed, which increased the time required for the verification.

In addition, the reference seal imprint is registered in advance in a storage device,
It is also possible to use a device that reads the seal imprint to be verified with a reading device and displays the reference seal imprint and the imprint to be verified in a superimposed manner on a display.

However, even with such an apparatus, the degree of comparison between the two seal imprints that are superimposed and displayed must be visually judged, so there is a possibility that the comparison judgment will differ depending on the individual differences of the operator.

Therefore, the present inventor proposed a method of objectively determining the comparison by displaying the reference seal imprint and the comparison seal imprint in a superimposed manner and displaying the matching rate numerically (Japanese Patent Application No. 1983-
199153). Also, the seal impression is faded in part of the reference seal impression or the reference seal impression.

If there is bleeding, etc., the overall matching rate will decrease, so the inventor further divided the seal imprint area into multiple parts,
A proposal was made to calculate the matching rate for each divided area (patent application filed by the present applicant on December 26, 1981).

[Problem in the Background Art 1 Conventionally, there have been various sizes of seal impressions, and even if the matching rate is calculated for each divided area, accurate matching is not possible at all times if the divided area is large. There may be cases where it is not possible to make a judgment.

[Purpose of the Invention] The present invention has been made in view of the above circumstances, and although it has a relatively simple configuration, it is capable of always accurate verification regardless of the size of the seal impression and even if a part of the seal impression is faded etc. The purpose of this invention is to provide a seal verification device that can make judgments.

[Summary of the Invention] The present invention for achieving the above object is summarized as follows: a divided area specifying means for specifying division of a matching area into a plurality of parts according to the number of divisions determined based on the size of the matching area; It has a matching rate calculating means that calculates the matching rate of the seal imprint for each area divided into a plurality of areas, and a display driving means that drives the matching rate for each area to be displayed on the display device. The present invention is characterized in that it is possible to always and accurately perform comparison judgments regarding seal impressions.

[Embodiments of the invention] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

First, the outline of the seal verification device according to the present invention will be explained with reference to FIG. 1(A).

This seal verification device registers the signature seal register and its seal impression for savings deposits, time deposits, or checking deposits at banks, etc., and when withdrawing deposits, etc., the seal impression affixed on the application form is already registered. It is mainly used to compare the impression of a seal.

In FIG. 1(A), main body control device 1. The storage device 2 and the journal printer 3 are installed, for example, in the back of the front desk of a bank, and the reading device 4. Input bag @ (keyboard) 52
A plurality of terminal processing devices 18 consisting of a display unit 6 and an image printer 7 are installed at the front desk of the bank, and the terminal processing devices 8 and the main body control device 11 are connected online.

The reading @ position 4 in the terminal processing bag W18 scans the seal book or paper, for example optically, when registering the seal book and seal imprint or when displaying the seal imprint on the paper when withdrawing deposits, etc. The information is binarized and output. As shown in FIG. 1(B), the keyboard 5 includes a numeric keypad 5A for inputting an account number as a search code, a seal register, various functions such as "registration", "verification", and "change" of a seal imprint. A display mode selection key 5B for selecting a display mode, a cursor movement key 5G for moving a cursor for seal imprint extraction display, a cursor movement mode selection key 5D for selecting a cursor movement mode, and a matching rate control key 5D for selecting a cursor movement mode. A calculation prohibition key 5E which is a mode switching means for prohibiting calculation, a seal imprint rotation key 5F for rotating the seal imprint, a form format selection key 5G for selecting the format of the seal book or application form, etc. are arranged. . The display unit 6 displays images read by the reading device 4, images already registered in the storage device 2, information keyed in from the keyboard 5, and the like. Furthermore, this display unit 6 displays the registered seal imprint in red, for example, and displays the to-be-verified seal imprint in green, and superimposes them to facilitate visual judgment of the verification based on the size of the overlapping area that is yellow. The seal imprint display area can be divided and the matching rate for each divided area can be displayed.

The image printer 7 prints the image displayed on the display unit 6 using a thermal printer, a laser printer, or the like.

The storage device 2 is composed of, for example, an optical disk that stores the seal W book or the seal imprint, and a magnetic disk that stores search codes and the like. The journal printer 3
is the registration and verification of the above-mentioned seal impression, etc.

A record is issued to indicate that there has been a change, etc., in correspondence with the account number.

The main body control device 1 inputs the output from the reading device 4 or the keyboard 5 in the terminal processing device 8 online, and controls registration to or reading from the storage device 2,
It controls the extraction operation of the seal imprint on the seal register or paper, or outputs the read or extracted information to the terminal processing device 8.

Next, details of this seal verification device will be explained with reference to the block diagram shown in FIG. 2. In FIG. 2, the display section unit 6 in the terminal processing device 8 is composed of a CPU-1, a color CRT (display device) 101, a display drive section 11-, various interfaces, and various memories. The CPU-i controls the display unit 6, and the image interface 12.1 connected to the reading device 4 is connected to the CPU path line. The keyboard 5
A keyboard interface 13 connected to a program memory 14 storing execution procedures. Form format memory 16 that stores the formats of various forms (seal registers or application forms) such as the vertical and horizontal sizes and the position of the seal. The display driving section 112 divided area addressing section 80. The verification information collecting section 50 and the main body interface 15 connected to the main body control device 1 are connected. Also, the image from the reading bag @4 is transferred to the image interface 1-1.
In addition to the display drive unit 11, the image pass line input through the image pass line 2 includes a pattern memory for temporarily storing the image read by the reading device 4 and outputting it to the invasive device main body control device 1. 17 and the main body interface 1
5 are connected. Note that details of the display driving section 111, the divided area address designating section 80, and the collation information collecting section 50 will be described later.

Next, the main body control section @1 will be explained.

This main body control device 1 is connected to the display unit 6 via a serial transmission line 18.

This main body control device 1 includes a CPLJ-2, a program memory 20. Dynamic memory access (DMA>
2). 1st. Second seal imprint memory 22, 23, seal imprint extraction control section 24. It consists of an address control section 25 and various interfaces.

The display unit interface 26 is for inputting and outputting images or various information via the serial transmission line 18. The general purpose interface bus (GPIB) 27 is an interface connected to the optical disc 30 for recording the seal book and seal imprint in the storage device WI2. Also, in the storage device 2, a magnetic disk (MD) 31 and a floppy disk (FD) 32 for storing search codes and image storage addresses are provided.
is connected to the main body control section 1 via the MO/FD interface 28.

Further, the CPU-2 is responsible for controlling the main body control device 1. Said 1st. Second seal impression memory 22.2
3. Seal imprint extraction control unit 24 and address 1llil1 part 2
5 is used to extract the seal imprint from the seal register or paper when registering or verifying the imprint.

The first seal impression memory 22 stores the strokes read by the reading device 4 and temporarily stored in the pattern memory 17, and is stored in the main body interface 15. It is input via a serial transmission line 18 and a display unit interface 26. Further, a part of the image stored in the first seal impression memory 22 is extracted and stored in the second seal impression memory 23. The seal imprint extraction control section 24 controls the color CRT 1.
The coordinates and size of the seal imprint area specified by the cursor movement key 5C of the keyboard 5 behind the image displayed at 0 are input via the CPU-2, and the address control unit 25 is controlled based on the coordinates and size information. Control. The address control unit 25 controls the read address of the first seal impression memory 22 and the write address of the second seal impression memory 23, and transfers the oiled seal image to the second seal impression memory 23.
It is designed to be memorized.

Next, the display driving section 11. Details of the collation information collection section 50 and the divided area address designation section 8o will be explained with reference to FIG.

First, the display drive section 11 will be explained. In the figure, a reference seal impression frame memory 41 is a frame memory that stores registered seal impressions read out from the optical disc 30. The verification target seal imprint frame memory 42 is connected to the reading device M.
4 and extracted by the main body control device 1. This reference seal impression frame memory 41. A selection display driver 45 is disposed at the subsequent stage of each of the stamp impression frame memories 42 to be verified.
Selective display or superimposed display of one of the two seal impressions is performed on the color CRT 10. Also,
The output of the cursor display drive unit 431 and character display controller 44 is input to the selection display driver 45. The character display controller 44 is
As will be described later, the matching rate calculated for each divided area is displayed on the color CRT 10 as a percentage value, for example.

Further, the cursor display driving section 43 displays a cursor frame on the color CRT 10 when the seal book or application form is displayed on the color CRT 10. This cursor display drive unit 43 is configured to operate the cursor movement mode selection key 5D.
After selecting the cursor movement mode by pressing , select the CPU-I by operating the cursor movement key 5C.
Based on the control, the cursor frame can be enlarged, reduced, and moved vertically and horizontally. Further, by selecting the form format selection key 5G on the keyboard 5, the corresponding form format is read out from the form format memory 16, and the CPU-1 controls the driving of the cursor display drive unit 43 based on this form format. However, the cursor frame is automatically set at a position that encompasses the seal imprint area of the seal register or application form displayed on the color CRTIO. In particular, during seal verification, based on the automatic setting of the cursor frame, the verified seal imprint within this cursor frame is the first one. Second seal impression memory 22, 23
．． The seal imprint is extracted by the seal imprint extraction control unit 24 and the address control unit 25, and the verified seal imprint is displayed on the color CRT 10 in an overlapping manner with the reference seal imprint. However, due to the automatic setting of the cursor frame, it may not always be possible to accurately display the seal imprint to be verified in an overlapping manner.
operation is required.

Next, the divided area address designating section 80 will be explained. For example, when the seal imprint area to be verified is a quadrilateral 65 circumscribing the seal imprint as shown in FIG. The number of divisions of the circumscribed quadrilateral 65 is calculated based on the above, and the divided areas are designated as addresses. This divided area address designation section 80 is composed of a division address designation circuit 81 and a reference matching unit memory 82. The reference matching unit memory 82 is a memory that stores the reference matching unit 66 shown in FIG. 4(B). The divided addressing circuit 81 is configured to
Starting point coordinates Xa in the Y direction.

Ya and the end point coordinates Xb, Yb are input from the CPU-1, and the size of the reference matching unit 66 is input from the reference matching unit memory 66, the number of divisions of the circumscribed quadrilateral 65- is calculated, and 7 of the divided area is input. It asks for a dress. The number of divisions N is N= (Xa-xb) /II t X (Ya-Yb
) /j! 2 ・=(calculated from 11 (j!t, j!
2 is the size in the X and Y directions of the reference matching unit 66, respectively)
. Note that if the calculation result of equation (1) is not an integer, it may be rounded up.

To give an example of this number of divisions N, 111 of the reference collation unit 66
．． 122 dimensions are 10 in units of dots on the display screen.
If the size of the circumscribed quadrilateral 65 is 20 dots x 20 dots, the number of divisions N is 20/
10X20/10=4. Therefore, the divided regions are regions 81 to S4 as shown in FIG. 4(C). Then, the divided address designation circuit 81 operates in the areas 81 to S4.
as the address of the starting point coordinates Xa, Y in the X and Y directions.
End point position 4 in a, X, and Y directions! l! Output Xb, Yb and intermediate coordinates xc, yc. Furthermore, if the size of the circumscribed quadrilateral 65 is, for example, 30 dots x 30 dots, the number of divisions N
is 30/10x30/10=9. Therefore, the division g
Area A includes areas 81 to S9 as shown in FIG. 4(D).
becomes. In this case, the divided addressing circuit 81 outputs intermediate coordinates XC1°XC2, YCt, and YO2 in addition to the start point coordinates, end point coordinates Xa, Ya, xb, and Yb. still,
The CPU-1 which obtains the address of the circumscribed quadrilateral 65 and the divided area address designating section 80 constitute a divided area specifying means.

Next, the verification information collection section 50 will be explained. This collation information collection unit 50 is a circuit that obtains the total number of bits A, B, and C for each of the plurality of divided regions. That is, the data from the reference seal imprint frame memory 41 is inputted to determine the total number of bits A of data "1" within a predetermined area, and the data from the to-be-verified seal imprint frame memory 42 is inputted to determine the data within the predetermined area. The total number of bits of "1" B, the total number of bits of data "1" that overlaps at the same address in a predetermined area by inputting the data from both frame memories 41 and 42 C
This is a circuit to find each.

Then, in order to obtain the respective total bit numbers A, B, and C in the divided areas 1as1 to S4 or S1 to S9, the first to
Fourth comparator 51.52.53.54. 1st. Second FF (S-R flip-flop), OR gate circuit 58. Counter 60° selector 61. An AND gate circuit 62 and a buffer 63 are provided.

Here, the above configuration will be explained while giving an example of calculating the total number of bits A, B, and C in the divided areas 81 to S4 shown in FIG. 4(C). For example, when specifying area S1,
The divided addressing circuit 81 inputs the position vAxa to the first comparator 51 as the start coordinate XS in the X direction.
and set the coordinate X as the end coordinate Yε in the X direction.
C is set in the second comparator 52, the coordinate Ya is set in the third comparator 53 as the start coordinate Ys in the Y direction, and the coordinate Yc is set in the fourth comparator 54 as the end coordinate YE in the Y direction. . The first to fourth comparators 51 to 54 receive the start coordinates or end coordinates from the divided address designation circuit 81, and also input the address data of the frame memories 41 and 42 and compare them. . Then, rHIGHj is output when the input address data matches the set start coordinate or end coordinate. Further, the first F-F 56 is configured to input the output of the first comparator 51 to the set terminal S, and input the output of the second comparator 52 to the reset terminal R, respectively. Similarly, the second F-F 57 inputs the output of the third comparator 53 to the set terminal S, and the output of the fourth comparator 54 to the reset terminal R. These first.
The Q output of the second FF 56.57 is input to the OR gate circuit 58, and the output of this OR gate circuit 58 is input to the inhibit terminal of the counter 60 that counts the total number of pits A, B, and C. ing.

The output of the selector 61 is input to the enable terminal of the counter 60. This selector 61 is an input terminal (2) into which data read out from the reference seal imprint frame memory 41 is input.

An input terminal (2) for inputting data read out from the verified seal imprint frame memory 42 and both frame memories 41.
42 through an AND gate circuit 62.

Then, this selector 61 selects each of the input terminals ■, ■ according to the select signal from the divided address designating circuit 81.
, (2) are output to the counter 60. That is, the divided address designating circuit 81 outputs a selection signal indicating which total bits mA, B, and C are to be counted.

The counter 60 inputs one of the three inputs to the selector 61 to an enable terminal, inputs the output of the OR gate circuit 58 to an inhibit terminal, and inputs each region blX.
The total bits mA, B, C for S1 to S4 will be counted every video clock. The total number of bits A, B, and C for each area are input to the CPU-1 via a buffer 63, respectively. C
From this data, the PU-1 calculates the matching rate between the reference seal imprint and the to-be-verified seal imprint for each area.

Here, to show an example of the calculation direction of the matching rate X calculated by the CPU-1, using the above total pit numbers A, B, and C, 2)Xl 00・
...(It becomes 2.

Incidentally, the matching information collecting section 50 and the CPU-1 constitute matching rate calculation means.

The operation of the device configured as above will be explained.

Regarding the registration effect of the reference seal impression> First, the operation when registering a reference seal impression will be explained.

For example, the case of registering the ordinary deposit stamp W book 70 shown in FIG. 5 and the seal imprint 71 affixed to this seal stamp book 70 will be explained. First, input the account number by operating the numeric keypad 5A, and then press the "registration" mode of the display mode selection keys 5B. Thereafter, this seal book 70 is set in the reading device 4 shown in FIG. 1<A), and the image information is obtained by optical scanning as a binarized electric signal of rlJ and r○j. This image is then loaded into the reference seal imprint frame memory 41 and pattern memory 17 in the display drive section 11 via the image interface 12. Then, the contents of the reference seal impression frame memory 41 are converted into a color CR.
T10 and the contents of the pattern memory 17 are displayed on the main body interface 15. Serial transmission line 1
The image is stored in the first seal impression memory 22 in the main body control section 1 via the 8° display unit interface 26.

Here, when the number corresponding to the ordinary type gold seal W fl 70 is pressed next among the form format selection keys 5G on the keyboard 5, the CPU-1 reads the corresponding form format from the form format memory 16. , the cursor display driving section 43 is driven based on this form format.

That is, the CPU-1 performs drive control to display the cursor frame at a position that encompasses the seal imprint area of the stamp W book image displayed on the color CRT 10 based on the vertical and horizontal sizes of the ordinary deposit stamp book 70 and the seal impression position. do. Incidentally, since the coordinate position of the seal register book displayed on the color CRT 10 with respect to the screen is detected in advance by reading with the reading device 4, the above-mentioned coordinate position with respect to the screen of the seal register book 70 displayed on the screen The cursor frame can be set accurately by movement.

Therefore, if the seal is correctly affixed without extending beyond the stamp area on the seal register 70, there is no need to move the cursor frame thereafter. If the cursor frame does not cover the seal imprint area correctly, press the cursor movement mode selection key 5.
Select a predetermined movement mode by pressing D, and then select one of the cursor movement keys 5C to print the seal 5.
Set the cursor to the area containing 1.

The coordinates and size of the cursor set in this way are input to the CPU-2 in the main body control device 1 via the serial transmission line 18, and the CPU-2 outputs this information to the seal imprint extraction control section 24.

The seal imprint extraction control unit 24 drives and controls the address control unit 25 based on the coordinates and size of the cursor, and reads out only the image corresponding to the area within the cursor from the stored contents of the first seal imprint memory 22. Second seal impression memory 23
to be memorized. When this seal imprint extraction operation is completed, the image in the first seal imprint memory 22, that is, the image of the seal J [70] and the image in the second seal imprint memory 23, that is, the image of the seal imprint 71, are
The data is recorded on the optical disc 30 via the B27. In addition, the address information when recorded on this optical disc 30,
The account number input from the keyboard 5 is recorded as a search address and a search code in the magnetic disk 31 or floppy disk 32 serving as a search table.

<Regarding the seal imprint verification function> Next, the comparison between the seal imprint registered as described above and the seal imprint stamped on the application form at the time of withdrawal from the savings account will be explained. First, the user inputs the account number by operating the numeric keypad 5A on the keyboard 5, and then presses the "verification" mode key. If you cover it like that, the CPU on the terminal processing device 8 side
-i, this account number is transmitted to the main body control device 1 side, and the corresponding search code in the magnetic disk 31 or floppy disk 32 is read out by the CPU-2 in the main body control device 1. Then, the CPU-2 reads the corresponding reference seal imprint from the optical disk 30 based on the search address in this search code, and stores it in the second seal imprint memory 23.
Store it in your memory once.

Thereafter, the seal imprint in the second imprint memory 23 is transmitted to the terminal processing device 8 side via the serial transmission line 18 and stored in the reference imprint frame memory 41 in the display drive unit 11.

On the other hand, after the input operation on the keyboard 5 is completed, the application form is set in the reading device 4, and the application form is optically scanned and converted into a binary electric signal. This paper image is transferred to the main body control device 1 through the same route as when registering the seal imprint described above.
and displayed on the color CRTIO. Then, when you press the form selection key 5G corresponding to the format of this application form, as in the case of registration, C
PLJ-1 reads the corresponding form format from the form format memory 16, and drives and controls the tJ-curve display drive section 43 based on this form) A-mat. As a result, the cursor frame is accurately set in the seal imprint area of the application form displayed on the screen of the color CRTIO. After this, the first . Second seal impression memory 22, 23. Seal impression extraction control section 24. The address control unit 25 extracts the seal imprint within the cursor frame.

Then, this seal imprint is stored in the verified seal imprint memory frame 42 in the display drive circuit 11. Then, the images in the reference seal imprint frame memory 41 and the to-be-verified seal imprint frame memory 42 are superimposed and displayed on the color CRT 10 via the selection display driver 45. At this time, by displaying the reference seal imprint in red, for example, and displaying the verified seal imprint in green, the mutually overlapping portions are displayed in yellow, making it easier to visually judge the degree of verification.

Further, in this embodiment, the matching rate for each area is displayed in addition to the overlapping display of both seal impressions as shown in FIG. 6.

In this embodiment, the apparatus first calculates the number of divisions N of the verification area based on the size of the verification area of both seal impressions. This number of divisions N is calculated in the divided area address designation unit 80 by calculating the above formula (1) in order to find the magnification of the circumscribed quadrilateral 65 with reference to the reference collation unit 66 shown in FIG. 4(B). . In this way, since the number of divisions is calculated using the reference matching unit 66 as a reference, it is possible to contribute to accurate calculation of matching rate regardless of the size of the matching area. That is, if the circumscribed quadrilateral 65 serving as the verification area has the size shown in FIG. 4(C), the number of divisions is 4, and if it is the size shown in FIG. 4(D), the number of divisions is 9. This is because each region S1 to 84 degrees S1 to S9 for determining the matching rate has the same size.

Here, counting of the total number of bits A for the area S1 shown in FIG. 4(C) will be explained. The divided address designation circuit 81 sets the start coordinate in the X direction xs=xa, the end coordinate in the x direction XE=Xc, and the start coordinate in the Y direction YS= for the first to fourth comparators 51 to 54, respectively.
Ya, set the coordinates Y-Yc in the Y direction. Therefore, the first F-F56 is set when the address in the X direction reaches Xa, and is reset when the address reaches Xc, and during this time the Q output of the first F-F56 becomes rHI.
Becomes GHJ. On the other hand, the second F-F57 is set when the address in the Y direction reaches Ya, and is reset when the address reaches Yc, and during this period, the second F-F57
The Q output of is [HI G l-I J. Therefore, this first. The output of the OR gate circuit 58 that outputs the Q output of the second F-F56.
will be output. The counter 60 inputting the output of the OR gate circuit 58 performs an operation only when the output of the OR gate circuit 5)8 is rHIGHJ. On the other hand, the enable terminal of the counter 60 receives the input data to the input terminal (2), which is the other side of the input to the selector 61. Then, the counter 60 can calculate the total number of bits A of the reference seal impression in the area S1 by counting the data captured while the output of the OR gate circuit 58 is HIGHJ.

Similarly, the total number of bits B and C can be calculated by changing the output of the selector 61 without changing the settings of the start and end coordinates of the divided addressing circuit 81. Also, by changing the settings of the start and end coordinates of the divided address designation circuit 81, the total number of pits A and B in the areas 82, 83, and 84 can be determined.

It becomes possible to count C.

The total bit numbers A, B, and C for each area 81 to S4 thus determined are sequentially input to the CPU-1,
Here, the above equation (2) is executed to calculate the matching rate X for each area 81 to S4. And this CPU
-1, the sieving result is the character display controller 44. The sixth image is displayed on the color CRT 10 via the select display driver 45.
It is displayed as shown in the figure.

The seal imprint shown in FIG. 6 is faded on the upper right side, and the matching rate in area S3 is low. However, area 81, S2, 8
Since the matching rate of No. 4 is high, it can be concluded that this reference seal imprint and the checked seal imprint match.

In this way, in this example, the matching rate for each divided area is displayed in addition to displaying the overlapping of both seal impressions, so even if some of the seal impressions are blurred, accurate matching judgments can be made objectively. be able to. Furthermore, since the number of divisions is determined based on the size of the matching area, accurate calculation of the matching rate can be performed regardless of the size of the matching area.

Note that the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention. For example, the method of dividing the region does not necessarily have to be using the circumscribed quadrilateral 65. In addition to using a cursor frame, various conventionally known methods can be used to obtain the circumscribed quadrilateral.Furthermore, the method previously proposed by the present applicant (Japanese Patent Application No. 59-19914)
6) can also be used. Furthermore, as a method for determining the number of divisions based on the size of the matching area, in addition to using the standard matching unit as in the embodiment described above, various methods can be adopted.

Regarding the method of calculating the matching rate, the above formula (1) is only an example. For example, using only the total number of bits A and B, X = B / A x 100 (A > 8
> ・(31X=A/Bx100 (B>A
A matching rate X such as > −141 may be obtained.

Further, in the configuration for calculating the total number of bits A, B, and C for each area, since only a part of the counter was used in the above embodiment, the total number of bits A for each area is calculated.

It takes 12 frames to calculate B and C, but if, for example, 12 counters are arranged, all the bit numbers can be calculated during the display of one frame.

Further, the display drive of the display drive unit 11 is not limited to displaying the matching rate together with the overlapping display of both seal impressions, but may display only the matching rate alone. Further, the method of displaying the matching rate is not necessarily based on a percentage value, but may be displayed in other quantitative manner or in a color depending on the matching rate.

[Efficacy of Bonmei and Song Dynasty] As described in detail above, according to the present invention, although the configuration is relatively simple, it is possible to perform accurate comparison judgment even if a part of the seal imprint is faded, and moreover, It is possible to provide a seal verification device that can perform accurate verification judgment regardless of the size of the area.

[Brief explanation of drawings]

FIG. 1(A) is an external perspective view of a seal verification device according to the present invention, FIG. 1(B) is a schematic explanatory diagram showing an example of a keyboard,
FIG. 2 is a block diagram of the seal verification device, FIG. 3 is a block diagram of the display drive unit verification information collection unit and the divided area address designation unit, and FIG. 4 (A> is a schematic explanatory diagram of a quadrilateral circumscribing the seal impression; FIG. 4(B) is a schematic explanatory diagram showing an example of a standard verification unit, FIGS. 1(C) and (D) are schematic explanatory diagrams showing an example of divided areas, and FIG. 5 is a schematic diagram showing an example of a seal register. Explanatory diagram, No. 6
The figure is a schematic explanatory diagram showing an example of display contents during verification by the apparatus of this embodiment. 2.30...Storage device, 10...Display device, 11.
・-Display driving means, CPU-1, 50... Matching rate calculation means. CPU-1, 80...Divided area designation means.

Claims (6)

[Claims] (1) A display device, a reading device that reads the seal imprint to be verified,
and a storage device for storing a reference seal impression, and a seal stamp matching device that performs matching on the display device between the reference seal impression read from the storage device and the matching seal impression read by the reading device, the size of the matching area divided area specifying means for dividing and specifying the matching area into a plurality of areas according to the number of divisions determined based on the above; a matching rate calculating means for calculating the matching rate of both seal impressions for each divided area; A seal verification device comprising: a display driving means for displaying a verification rate for each region on the display device. (2) The seal stamp collation device according to claim 1, wherein the divided area specifying means specifies the divided area by using an area within a quadrilateral circumscribing the seal impression as the collation area. (3) The seal stamp according to claim 1 or 2, wherein the divided area designation means calculates the number of divisions based on a magnification of the collation area based on a predetermined standard collation size. Verification device. (4) The seal stamp matching device according to any one of claims 1 to 3, wherein the display driving means is driven to display the matching rate and superimpose the impressions of both seals. (5) The seal verification device according to claim 1, wherein the display driving means quantitatively displays the verification rate for each divided area. (6) The seal verification device according to claim 5, wherein the quantitative display by the display driving means is a percentage value.