JPS61178760A - Automatic tracking controller - Google Patents

Abstract

PURPOSE:To prevent the wow deterioration at a normal operation, to shift smoothly the operation to a tracking scan, to shorten an acting time and to improve the enclosing accuracy and performance by regulating the trucking scan to a short period such as the driving of a motor. CONSTITUTION:A completion detecting circuit 51 is provided to stop an automatic tracking action at the peak of a reproduction video signal 43. Namely, a counter counts the number of inverting times of a signal 62, and when the counted value exceeds a specified value, it is considered to be the completion of the automatic tracking. Receiving a completion detecting signal 60, a start-up and stop circuit 50 operates an ON/OFF switch 51, turns on it and stops the automatic tracking action. Thus the tracking delay quantity is held always at the time of the variable speed reproduction, or before the automatic tracking is started, and therefore the tracking scan in an unnecessary mode or the destruction of data can be prevented, and a smooth action shift can be attained.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a magnetic recording/reproducing device, and in particular to an automatic magnetic recording/reproducing device suitable for automatically adjusting trace tracking of a space pattern recorded diagonally on a magnetic tape using a helical scan method. The present invention relates to a tracking control device.

[Background of the invention]

An example of an automatic tracking method for a magnetic recording/reproducing apparatus is disclosed in Japanese Patent Application Laid-open No. 54-41114. Although this system performs basic operations, it has some problems when used as an actual magnetic recording/reproducing apparatus. To explain this conventional example, the block diagram of FIG. 5, the main waveform diagram of FIG. 6, and the supplementary explanatory diagram of FIG. 7 will be used. In Figure 5, 1 is a magnetic tape, 2
is Huntroll pulse head (CTLP head), 5,
7 is an amplifier, 4 and 11 are delay circuits, 5 is a room counter,
6 and 13 are clock pulse generators, 8 is an integration circuit, 9.
10 is a waveform shaping circuit, 11 is a delay circuit, 12 is a monomulti, 14 is a direction discrimination logic, 15 is a sampling counter, 16 is a direction flip-flop, 17 is an up/down counter, 18 is a coincidence circuit, and 19 is a crystal oscillation child, 2
0 is a crystal oscillator, 21 is a frequency divider by 2, 22 is a ramp generator, 23 is a phase comparator, 24 is a motor drive amplifier, 25 is a motor, 26 is a speed control signal input terminal, 27 is a playback video signal input terminal, 28 and 29 are rotational phase detection signal input terminals, and 30 is a counter.

Also, 40 to 54 in Figure 6 are all voltage signals, and 7 in Figure 7
0 is magnetic tape, 71.72 is video head, 75,
74 is a track pattern recorded on the tape, 75 is a drum motor, 76 is a capstan motor, 77, 7
8 is the trace locus of the center of the video heads 71 and 72;
79 is a reference signal generator, 8o.

81 is a phase control circuit, 82 is a delay circuit, 83 is a drum rotation detection signal, and 84 is a reproduction CTLP.

First, the track pattern 7 recorded on the magnetic tape 70
5 and 74 are drawn by video heads 71 and 72, respectively. At this time, the magnetization direction of the head is generally set to be different for both tracks 73 and 74 to eliminate adjacent interference (azimuth recording). For this reason, assuming that tracks 75 and 74 were recorded by video heads 71 and 72, respectively, when tracing with the same head and track combination as during recording, the maximum head output,
The opposite combination results in the minimum head output.

Further, even in this intermediate state, the head output increases approximately in proportion to the area of the trace portion where the azimuths of the track and the head match. For example, when the trace locus at the center of the head 71 is 77, it is maximum, and when the trace locus is 78, it is worse.

Now, in a magnetic recording/reproducing device, the rotating heads 71, 7
In order for the drum motor 75 and the magnetic tape 70 to operate in synchronization with a predetermined phase, the drum motor 75 and the capstan motor 76 are controlled in phase.

Specifically, this operation is performed by the reference signal (50Hz) generator 79.
The phase control circuit 80 performs phase locking of the drum so that the reference signal from the drum motor rotation detection signal is phase locked, and the phase control circuit 81 performs phase control so that the reproduction CTLP 84 and the reference signal are phase locked. This is achieved by Here, the phase difference between the heads 71, 72 and the reproduction CTLP 84 is always fixed at a constant value φ.

As a result, the predetermined heads 71 and 72 trace the recorded track patterns 73 and 74. However, in reality, the heads 71, 72 and the playback head of the CTLP 84 are physically located far apart, so the magnetic recording and playback device suffers from expansion and contraction of the magnetic tape, variations in the mounting position of the head, etc. When the recorded tape is reproduced, the phase difference φ traces a trajectory deviating from the appropriate trace trajectory (77 in FIG. 7), for example, a trajectory 78 in FIG. 7, which deteriorates the reproduced image quality. Therefore, as shown in FIG.
was set up so that the user could adjust the amount of delay. This alignment between the head and track is called tracking. The block diagram shown in FIG. 5 is one of the conventional examples of a system for automatically performing this tracking operation. In this example, a method is used in which the phase of the reproduced CTLP is delayed and subjected to phase control.

The operation of the system shown in FIG. 5 will be outlined below.

First, the drum rotational phase detection signals input from terminals 28 and 29 in FIG. 5 are waveform-shaped by waveform shapers 9 and 10 (FIG. 6, 40 and 41). These two signals are shown in Fig. 7.
This is a pulse generated every 180° rotation of the drum. Furthermore, if these are almost the same timing as the switching timing of the heads 71 and 72, the information in the center of the TV screen will be traced at a timing delayed by about aSS from these two signals (because the drum frequency is 30Hz). (The time required for one head to trace one track is a little over 161 nS).

Therefore, both signals are delayed by the delay circuit 11.

If the pulse with this delay time high (HLgh) is shown in FIG. 6, the tracking condition can be best monitored by sampling the reproduction signal output of the head at this falling edge. In this example, a monomulti 12 or the like is used to perform this monitoring and convert the reproduced signal amplitude into a digital quantity. The operation will be outlined below. First, the playback video signal input from terminal 27 (6th
The signal 43) in FIG. 6 is amplified by the amplifier 7 and smoothed by the integrator 8 (signal 44 in FIG. 6). Mono multi 12 is signal 44
This outputs a signal that remains high for a period of time proportional to the potential of the capacitor.For example, when a trigger input starts charging the capacitor, a comparator circuit detects the point in time when the capacitor terminal potential reaches the potential of the signal 44, and the capacitor This can be easily realized by discharging the charge and waiting for a new input trigger, and a signal that is high during the charging period of the capacitor may be used as the desired output. This is shown in signal 45 in FIG. Furthermore, the clock pulse generator 13 generates clock pulses only while the signal 45 is high, and the output signal is indicated by 46. This clock pulse is provided to direction determination logic 14. This direction determination logic is based on the sampling counter 15.
The direction is determined while the output 47 of is high. The signal 47 is generated once every N periods of the rotation detection signal 40 of the rotary head.

That is, this N determines the determination period. Direction determination logic 1
4 internally has a counter, a holder for the count value in the previous cycle, and a magnitude comparator. This counter cumulatively counts clock pulse details 46 for N periods. This value B is
It is compared in size with the count value A in the previous cycle in the holder.

As a result, if A>B (old data>new data), pulse 4
8 and does not output a pulse if A≦B (old data≦new data). The direction flip 70 knob 17 outputs an output 49 that rotates once triggered by the signal 48.

The up/down counter 17 converts the signal 49 into a count polarity (
High: up count, low: down count), and after this polarity signal 49 changes, the count is advanced at the cycle of the signal 47 (in FIG. 6, the count is interrupted at the falling edge of the signal 47). Therefore, in the example shown in FIG. 6, if the initial value of the up/down counter is M, the signal 49
is high and counts up to M+1, then signal 49
is counted down at row (I, oW) and changes to M.

For this series of operations, there is a CTLP delay loop on one side. This is because the reproduced CTLP 50 is slightly delayed by the delay circuit 4, and when the output signal 51 falls, the window counter 5
make it work. Its output 52 causes clock pulse generator 30 to generate a clock pulse train 53. The matching circuit 18 outputs a delayed CTLP signal 54 when the number of clock pulses in the clock pulse train 53 matches the value held by the 7-down counter 17. Therefore, in this example, the number of clock pulse trains 53 changes from M to M+1 to M, and the phase of the delayed CTLP output also changes by one period of the clock pulse.

The overall control described above can be summarized as follows. That is, the amount of delay of the delayed CTLP signal to be subjected to phase control is controlled so that the output from the head is maximized. This is because this delay amount is held in an internal up/down counter, and this count value is controlled in a direction that increases the output from the head. In other words, if the head output data after the delay amount change is larger than the previous value, the direction of the delay amount change remains unchanged, and in the opposite case, the direction is reversed and the delay amount is always changed in the direction of increasing the head output. be. that's all,
This conventional example basically performs automatic tracking.

However, since the delay amount changing operation is not stopped,
This causes deterioration of wah performance. This can be a fatal flaw in motor servos, and is considered to be one of the reasons why it has been difficult to commercialize conventional automatic tracking systems. Therefore, a system is needed that avoids this wow deterioration and also performs the automatic tracking described above.

[Purpose of the invention]

An object of the present invention is to provide an automatic tracking control device that can always obtain a reproduced image in a good condition by turning on the operation when tracking is required and turning it off in other cases through changes in each reproduction mode. It's about doing.

[Summary of the invention]

The main purpose of the present invention is to complete scanning with a good tracking delay amount in a short period of time after motor activation or mode transition only during standard playback or some other playback modes, and to avoid wah deterioration during steady state. Another purpose is to stop automatic tracking operation in special playback modes.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the block diagram of FIG. In this embodiment, the delay operation by the matching circuit 18, which is one input to the phase comparator 23, is performed on the reference signal side generated from the crystal oscillator 20, not on the CTLP signal. , this is not the essence of the invention, but only indicates that automatic tracking is possible in any case. Furthermore, in this example,
The same numbers are added to the same elements as in the conventional example shown in FIG. Now, as a new element in the diagram, 50
is an (automatic tracking) start/stop circuit (hereinafter simply referred to as a start/stop circuit). Furthermore, 51 is on.

Off switch, 52 (automatic tracking) completion detection circuit, 53 monomulti, 54 phase synchronization detection circuit, 55
-62 are electrical signals. The main focus of this system is startup,
The tracking delay amount is maintained by the stop circuit 50 when the motor is stopped or when the motor is started. Further, after the motor is started, the phase synchronization detection circuit 54 detects that the phase control has shifted to a stable state.1. Then start automatic tracking. Further, the completion detection circuit 52 detects the completion of automatic tracking, stops it, and holds the tracking delay amount again. This makes it possible to prevent tracking scanning from being performed in an unstable state when the motor is started, thereby shortening the tracking time and improving the accuracy of tracking scanning. Next, the operation of this embodiment will be explained with reference to the main waveform diagram of FIG. 2. Here, first, 55, 5
Reference numeral 6 indicates a control signal for controlling the start and stop of automatic tracking, but in this example, for the sake of simplicity, the same signal is used as a representative signal. As shown in FIG. 2, when the signals 55 and 56 are high, the system is in a stopped state and the switch 51 is off. Next, when the signals 55 and 56 change to low, the phase synchronization detection circuit 54 operates and determines whether the phase difference between the CTLP signal 57 and the reference signal 58 is within a certain value. Specifically, this can be realized by sampling the value of a counter that is preset at the edge of the signal 58 using the signal 57 and determining whether or not this value is within a certain range. This operation indicates that the magnetic tape 1 is driven by the motor 25 and the period of the control signal CTLP 57 reproduced by the head 2 has a predetermined phase relationship with the reference signal 58, reflecting the arrival of a steady running state. The monomulti 53 operates using the signal 61 as a trigger, and after a certain period of time, the start/stop circuit 50
(for example, the negative I edge of signal 59).

Upon receiving this, the start/stop circuit 5o turns on the on/off switch 51. Until this point, the up/down counter 17 had been in a state where the clock signal had been cut off and was holding its value, but now the clock signal has been transmitted and the above-described automatic tracking operation is started.

Then, the tracking is adjusted so that the reproduced video signal 43 increases. At this time, the output 62 of the direction 7 lip-flop 16 remains unchanged when the reproduced video signal 43 increases and is reversed when it decreases, so that the reversal is repeated at the tracking amount corresponding to the peak of the signal 43. It is preferable for the system to hold the actual tracking amount, so in the present invention, a completion detection circuit 51 is provided,
The automatic tracking operation is stopped at the peak point. Specifically, this is an easy means, such as counting the number of inversions of the signal 62 using a counter, and detecting the completion of automatic tracking when the number exceeds a certain value. Upon receiving this completion detection signal 60, the start/stop circuit 50 operates the on/off switch 51 to turn it off and stop the automatic tracking operation.

In addition to the above overview of this system, we will further explain the transient operation with variable speed playback. The variable speed playback described here refers to still image playback, slow motion playback, search playback, and the like. Basically, during this variable speed reproduction, the automatic tracking operation is kept in a hold state. This is because when returning from variable speed playback to normal playback, it is most likely that a good playback condition can be recovered naturally if playback is performed using the tracking delay amount scanned by the previous automatic tracking operation. . However, in case the recording changes unfortunately during variable speed playback, a recording mode change detection circuit 70 (not shown) is added. This detects a large change in the playback level or a change in the recording mode, and acts on the (automatic tracking) start/stop circuit 50 to restart automatic tracking.

Here, details of the operation of the recording mode change detection circuit 70 will be described below. An example of a specific configuration of the recording mode change detection circuit is shown in FIG. 8, and the operation will be explained with reference to the main waveform diagram of FIG. 9. In FIG. 2, 200 is a peak detection circuit, 201 is a voltage comparator, 202 is a sawtooth wave generator, 203 is a clock generator, 208 is a clock counter, 204 is a write control circuit, 205 and 206 are data launches (memory), 207 is a size comparator, 209 is a capacity, 300 to 30
5 is an electrical signal. First, signal 500, which is a reproduced FM signal corresponding to signal 43 in FIG. 5.6, is subjected to peak detection and becomes signal 301. This signal 301 is compared by the voltage comparator 201 with a sawtooth wave 502 generated by the sawtooth wave generator 202 by constant current charging and instantaneous discharging of the capacitor 209. The resulting signal 5
03 is a signal that becomes high when the voltage signal 302 is less than the voltage signal 601. Therefore, the longer this high period, the higher the voltage 3
01 is high. Clock generator 203, to which signal 305 is applied, then generates a number of pulse signals 304 proportional to the high periods of signal 305. Furthermore, the memories 205 and 206 store the count value of the clock counter 208 that counts the signal 304. Now, regarding time periods A and B (911th), A is defined as tracking scanning, and B is defined as the recording mode change detection period. In time period A, the write control circuit 204 stores the clock data value of the counter 208 in the memory 206. It shall be. Then, the final value of the clock data for scanning time period A is set to 8. Next, the tracking scan is stopped and a transition is made to time period B, but this command follows the signal 505. The signal 305 is further transmitted to the sawtooth wave generator 2
02 to change the amount of charging current to the capacitor 209. Now, if the amount of current is reduced by about 30%, the period of the sawtooth wave 302 will increase by 15 times 2. Therefore, the same voltage 30
The pulse width of the signal 503 is 1.5 times that of 1. Therefore, the count value of the clock is also increased by 1.5 times. Time zone A.

If the clock data of is 8, the data of time zone B is 12
becomes. Then, when the data for time period B is 8, the voltage 301 has decreased by ±= 0.67 times, that is, about 30%.

This relationship can be generalized and summarized as follows. That is, now, the clock count values of time zones A and B are NA +
NB + Charging current amount A + IB + Voltage signal 3
If the values of 02 are vA and VB, then NA CC , N
Bc'pyu IA IB becomes. Furthermore, if IB=αIA, then the relational expression: 凉=book−晋 is obtained. In other words, if the amount of charging current is changed and the ratio is set to α, the fact that the count values remain the same indicates that the amplitude of the voltage 301 has quadrupled.

In the example of FIG. 8, the maximum value obtained by performing a tracking scan in time period A is stored in the memory 206,
This digital amount is compared with the digital amount temporarily stored in the latch 205 for each sampling. This operation is performed by comparator 207, so that the voltage 301 amplitude is α
It is possible to detect a doubling of the amount. Now, the fact that the amplitude of the FM reproduction signal (43, 500) increases or decreases extremely after the tracking scan ends indicates that the recording mode changes at that point. In other words, the configuration described above makes it possible to detect a change in recording mode. Start and stop circuit 50, phase synchronization detection circuit 54, and completion detection circuit 5
The specific configuration and operation of 2 will be explained in detail below using the block diagram in FIG. 3 and the main waveform diagram in FIG. 4. 7 in Figure 3
0 is an edge detector, 71 and 90 are counters, 72°7
3, 89, 91 are Nant gates, 74 is a logic circuit,
75, 85, 88, 95 are inverters, 76,
77 is and gate, 78, 87 is or gate, 79
is the RS flip 70 tube, 80 is the resistance, 81 is the capacitance, 8
2 is an on-off switch, 83 is a constant voltage source, 84 is a voltage comparator, 86 and 92 are D flip-flops, 100 to 1
07 is an electrical signal.

Now, in this system, first, the activation signal 55.degree. 56 changes from high to low, and the Q of the flip 70 knob 92 becomes high. A reference 50 Hz signal 58 is shaped by the edge detector 70 (FIG. 3 101), and with this signal the counter 71 is reset. Once this reset is removed,
Counter 71 counts pulse clocks 100 generated by a suitable pulse generator (not shown). If this pulse period is 1rIL seconds, then, for example, a phase difference of 16 WL seconds to 20 m seconds from the reference signal 58 can be read from the bit information of this counter. If we take Ql r Q2 v Qs l Qa +Qs from the counter LSB, then 16rIL seconds is (Ql, Q2 = Ql )2-(
00001)220771 seconds is (00101)2, so if the logic gate 74 configures the logic (Q, · ζ2 · Q, 10 points 5) · Q4 - Qs, this output will be 1
It becomes high at 67x seconds to 18 m seconds (FIG. 4, 102).

Therefore, if the lock range of the phase control of the system is 167X
sec to 20 msec, it can be determined whether the CTLP is within the window 102 by taking the product signal with the signal 102. This signal (Fig. 4 103) was used as a reset signal 7! The Q of the j-tube flop 79 changes to high when phase synchronization is detected (FIG. 4, 61). On the other hand, the switch 82 is connected to the signal 6.
1, and turns off when this is high, and the terminal voltage 105 rises as a charging voltage to the capacitor 81 via the resistor 80 (FIG. 4, 105). When the potential reaches the potential 107 of the constant voltage source 83, the voltage comparator 84
is transmitted to the OR gate 78 and becomes the 7 lip-flop 79 set signal 104.

Then, the signal 61 is inverted, and the T of the D flip 70 knob 86 is
Hit. The Q of this flip 70 knob 86 is reset and initialized by the signal 55, and is inverted to high at the timing when this T is struck (FIG. 4, 106). With this signal 1o6, the on/off switch 51 is turned on, and at the same time the reset of the counter 90 is released, and counting of the number of inversions of the signal 62 is started. At this time, the reset flop 92 is also reset. At this point, the system begins automatic tracking operations. The subsequent operations are the same as described above.

In this system, when the signal 55 is set high, the tracking amount can be maintained. The on/off switch 51 is turned off, and the bit information of the up/down counter 17 is held. Therefore, by applying a variable speed reproduction command signal to this terminal 55, the above object is achieved. Tatashi,
What should be noted here is that by delaying the release of this hold signal, it is possible to further reduce the fluctuations of the system during transition. A concrete example of this is shown in Figure 1.

Among these, 110 to 115 are diodes, 114 is a resistor,
115 is the capacity, and 120 to 123 are command signals such as a recording signal 120, a still image playback signal 121, and a slow motion signal.
These include a search signal 122, a search reproduction signal 123, and the like.

In this way, if the present invention is used, the tracking delay amount is always maintained (held) during variable speed playback or before starting automatic tracking, thereby preventing tracking scanning in unnecessary modes and destruction of various data. This can be prevented and smooth transition of operations can be achieved.

〔Effect of the invention〕

According to the present invention, while conventionally no consideration was given to switching between variable speed playback and standard playback, etc., 1. By limiting tracking scanning to a short period of time such as when starting a motor, wah deterioration during steady state can be improved. In addition, since this tracking scan is also configured to start with stable phase control, performance is improved, such as smooth transition to tracking scan, shortened operation time, and improved tracking accuracy. improvement is expected.

[Brief explanation of drawings]

FIG. 1 is a block diagram explaining one embodiment of the present invention, and FIG.
The figure is a waveform diagram of the main part of Fig. 1, Fig. 3 is a detailed block diagram of the embodiment of Fig. 1, and Fig. 4 is a waveform diagram of the main part of Fig. feet. , FIG. 5 is a block diagram of the conventional example, FIG. 6 is a waveform diagram of the main part of FIG. 5, FIG. 7 is an explanatory diagram of the conventional example, and FIG. 8 is recording mode change detection for explaining the present invention Block diagram showing the circuit, 50... Start/stop circuit, 51... On/off switch, 52... Completion detection circuit, 54... Phase synchronization detection circuit. 'If11 Mouth'! J Fig. 3 No. 4 Hi No. 1θ Fig. I- Condolence Fig. 5 No. Otsu r≧1 No. ’g Ki

Claims (1)

[Claims] 1. In a helical scan type magnetic recording/reproducing device, a means for storing a phase difference between a recorded track and a rotary head locus is provided, and reproduction from the rotary head is performed while changing this phase difference. In a configuration in which the output amplitude is sampled and measured, and the above-mentioned phase difference is automatically adjusted in the direction of increasing the reproduction amplitude by comparing the magnitude with the previous measurement value, rewriting the phase difference storage means and the above-mentioned position. means for stopping phase difference adjustment; and phase synchronization detection means for detecting a phase difference between a control signal from a magnetic tape and a reference signal to determine whether phase control of tape running is being performed at a predetermined phase. An automatic tracking control device characterized in that the stopping operation of the above-mentioned phase difference adjustment stopping means is canceled according to the output of the phase synchronization detecting means. 2. In the configuration set forth in claim 1, an automatic device characterized in that the stopping operation of the above-mentioned phase difference adjustment stopping means is activated during still image playback, slow motion playback, fast view playback, recording, etc. Tracking control device. 3. An automatic tracking control device according to claim 1, further comprising means for delaying the release of the stopping operation of the phase difference adjustment stopping means.