JPS61176666U - - Google Patents
Info
- Publication number
- JPS61176666U JPS61176666U JP5892885U JP5892885U JPS61176666U JP S61176666 U JPS61176666 U JP S61176666U JP 5892885 U JP5892885 U JP 5892885U JP 5892885 U JP5892885 U JP 5892885U JP S61176666 U JPS61176666 U JP S61176666U
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- terminal
- edge
- board
- electrical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Credit Cards Or The Like (AREA)
Description
図面は本考案の実施例を示すもので、第1図は
メモリ・カードの斜視図、第2図はメモリ・カー
ドをエツジコネクタに差し込んだ状態を示す斜視
図、第3図は本考案に係る短絡検知回路を含むブ
ロツク図である。
1……メモリ・カード、2……基板、3……エ
ツジ、4……ロム、5,51〜5n……端子。
The drawings show an embodiment of the present invention; FIG. 1 is a perspective view of a memory card, FIG. 2 is a perspective view of the memory card inserted into an edge connector, and FIG. 3 is a perspective view of the present invention. FIG. 2 is a block diagram including a short circuit detection circuit. 1... Memory card, 2... Board, 3... Edge, 4... ROM, 5, 51-5n... Terminal.
Claims (1)
ユータ及びその応用機器に対して、必要に応じて
着脱することが可能で、その基板上にロムROM
を搭載し、基板のエツジに複数の電気端子を有す
るメモリ・カードにおいて、前記電気端子群の第
1端子又は第n端子のいずれか一方をその他の端
子に対して前記エツジ先端より後退して設けると
共に、前記両端子を前記基板内で短絡接続したこ
とを特徴とするメモリ・カード。 It can be attached or detached as needed to computers and their application equipment that are equipped with microprocessors, etc., and a ROM is installed on the board.
, and has a plurality of electrical terminals on the edge of the board, in which either the first terminal or the nth terminal of the electrical terminal group is provided so as to be set back from the tip of the edge with respect to the other terminals. A memory card characterized in that both the terminals are short-circuited and connected within the substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5892885U JPS61176666U (en) | 1985-04-22 | 1985-04-22 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5892885U JPS61176666U (en) | 1985-04-22 | 1985-04-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61176666U true JPS61176666U (en) | 1986-11-04 |
Family
ID=30584885
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5892885U Pending JPS61176666U (en) | 1985-04-22 | 1985-04-22 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61176666U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5616220A (en) * | 1979-07-19 | 1981-02-17 | Mitsubishi Heavy Ind Ltd | Functional module |
-
1985
- 1985-04-22 JP JP5892885U patent/JPS61176666U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5616220A (en) * | 1979-07-19 | 1981-02-17 | Mitsubishi Heavy Ind Ltd | Functional module |
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