JPS61174212U

JPS61174212U -

Info

Publication number: JPS61174212U
Application number: JP5842385U
Authority: JP
Priority date: 1985-04-18
Filing date: 1985-04-18
Publication date: 1986-10-30

Description

[Brief explanation of the drawing]

第１図はこの考案実施例の増幅回路の回路図、
第２図は従来の増幅回路の回路図である。２ａは低電圧電源、１ａは第１トランジスタ、
２ｂは高電圧電源、１ｂは第２トランジスタ、４
ａ及び４ｂはスイツチ手段、５は負荷、３ａ，３
ｂ及び３ｃはスイツチ手段である。 Figure 1 is a circuit diagram of an amplifier circuit according to an embodiment of this invention.
FIG. 2 is a circuit diagram of a conventional amplifier circuit. 2a is a low voltage power supply, 1a is a first transistor,
2b is a high voltage power supply, 1b is a second transistor, 4
a and 4b are switch means, 5 is a load, 3a, 3
b and 3c are switch means.

Claims

[Scope of utility model registration request]

A first transistor 1a connected to a low voltage power source 2a, a second transistor 1b selectively connected to either the low voltage power source 2a or the high voltage power source 2b, and when the signal level is low, the first transistor 1a. switch means 4a, 4b for selectively inputting signals to the second transistor 1b when the signal level is large; and a load 5.
switch means 3a and 3b for connecting a low voltage power supply to the transistor 1b and inputting the signal to the first transistor 1a and the second transistor 1b regardless of the magnitude of the signal level when the impedance of the transistor 1b is smaller than the set value; , 3c.