JPS6116680Y2 - - Google Patents

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Publication number
JPS6116680Y2
JPS6116680Y2 JP7745980U JP7745980U JPS6116680Y2 JP S6116680 Y2 JPS6116680 Y2 JP S6116680Y2 JP 7745980 U JP7745980 U JP 7745980U JP 7745980 U JP7745980 U JP 7745980U JP S6116680 Y2 JPS6116680 Y2 JP S6116680Y2
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JP
Japan
Prior art keywords
metal substrate
layer
oxide film
lead member
graphite layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7745980U
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Japanese (ja)
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JPS572648U (en
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Priority to JP7745980U priority Critical patent/JPS6116680Y2/ja
Publication of JPS572648U publication Critical patent/JPS572648U/ja
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Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案は、陰極リード部材を金属層及び半田層
を設けないでグラフアイト層に直接的に結合する
形式の固体電解コンデンサに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid electrolytic capacitor in which a cathode lead member is directly bonded to a graphite layer without providing a metal layer or a solder layer.

従来の一般的な固体電解コンデンサは、金属基
板、陽極酸化皮膜、半導体金属酸化物層、グラフ
アイト層、銀ペイントで形成した金属層、陰極リ
ード部材結合用半田層、及び外装絶縁層を順次設
けることによつて構成されている。ところが、陰
極リード部材を結合するための半田付けの際の熱
ストレスで酸化皮膜にき裂が生じ、漏れ電流の原
因になる恐れがあつた。また、陰極リード部材を
結合している半田が、プリント基板に対する半田
付け等のための加熱で溶融し、吹き出す恐れもあ
つた。更にまた、高価な銀ペイントを使用しなけ
ればならないので、素子の価格が必然的に高くな
つた。
A conventional general solid electrolytic capacitor consists of a metal substrate, an anodized film, a semiconductor metal oxide layer, a graphite layer, a metal layer made of silver paint, a solder layer for bonding the cathode lead member, and an exterior insulating layer. It is made up of things. However, there was a risk that cracks would occur in the oxide film due to thermal stress during soldering to connect the cathode lead members, causing leakage current. Furthermore, there was also a risk that the solder bonding the cathode lead members would melt and blow out during heating for soldering to a printed circuit board. Furthermore, expensive silver paint must be used, which necessarily increases the cost of the device.

上述の如き欠点を解決するために、銀ペイント
及び半田を使用しないで陰極リード部材を結合す
る形式の固体電解コンデンサは既に提案されてい
る。第1図はこの種の固体電解コンデンサを説明
的に示すものであり、このコンデンサはタンタ
ル、アルミニウム、チタン、ニオブ等の金属板又
は粉末焼結体から成る陽極酸化皮膜形成可能な金
属基板1と、この金属基板1に溶接又は埋込等で
固着された陽極リード部材2と、金属基板1を電
解エツチングして表面に凹凸を設けた外周面に形
成された陽極酸化皮膜3と、この陽極酸化皮膜3
に密接するように形成され且つ金属基板1の凹凸
表面の凹部を埋めるような状態に形成された例え
ば二酸化マンガンから成る半導体金属酸化物層4
と、この金属酸化物層4上に形成されたグラフア
イト層5と、予めグラフアイト層を焼付けた部分
がグラフアイト層5に埋め込まれた陰極リード部
材6と、デイツプによつて形成した二液性エポキ
シ樹脂等から成る耐湿特性の優れた被覆用の第1
の絶縁層7と、機械的強度を増大させるために粉
末エポキシ樹脂等を利用して形成した第2の絶縁
層8とから成る。
In order to solve the above-mentioned drawbacks, solid electrolytic capacitors have been proposed in which cathode lead members are connected without using silver paint or solder. FIG. 1 is an explanatory diagram of this type of solid electrolytic capacitor, which consists of a metal substrate 1 made of a metal plate or powder sintered body of tantalum, aluminum, titanium, niobium, etc., on which an anodized film can be formed. , an anode lead member 2 fixed to the metal substrate 1 by welding or embedding, an anodic oxide film 3 formed on the outer circumferential surface of the metal substrate 1 by electrolytically etching the surface to provide unevenness, and the anodic oxide film 3. Film 3
A semiconductor metal oxide layer 4 made of, for example, manganese dioxide, is formed so as to be in close contact with the surface of the metal substrate 1 and to fill the recesses in the uneven surface of the metal substrate 1.
, a graphite layer 5 formed on this metal oxide layer 4, a cathode lead member 6 in which a portion of the graphite layer that has been baked in advance is embedded in the graphite layer 5, and a two-liquid layer formed by a dip. The first coating for coating with excellent moisture resistance properties is made of polyester epoxy resin, etc.
and a second insulating layer 8 formed using powdered epoxy resin or the like to increase mechanical strength.

尚、9は例えばシリコーン被膜かる成る陽極リ
ード部材保護被膜である。即ちエツチングや化成
時に酸によつて陽極リード部材が腐食するのを防
止するものである。従つて、この保護被膜9は、
陽極リード部材2と金属基板1との境界領域に限
定的に設ければ、その目的が達成されるが、金属
基板1の寸法は、例えば、厚さ1mm、縦幅4mm、
横幅4mmのように極めて小さいので、量産時に
は、第2図で鎖線10で示すように金属基板1の
下側に1mm程度まで保護被膜9が形成され、この
分だけ容量低下を招いていた。
Note that 9 is a protective coating for the anode lead member made of, for example, a silicone coating. That is, it prevents the anode lead member from being corroded by acid during etching or chemical formation. Therefore, this protective coating 9 is
The purpose can be achieved by providing the anode lead member 2 and the metal substrate 1 in a limited manner in the boundary area, but the dimensions of the metal substrate 1 are, for example, 1 mm in thickness, 4 mm in vertical width,
Since the width is extremely small, such as 4 mm, during mass production, a protective film 9 is formed on the underside of the metal substrate 1 to a depth of about 1 mm, as shown by the chain line 10 in FIG. 2, resulting in a reduction in capacity.

ところで、第1図に示すようにグラフアイト層
5に陰極リード部材6を直接に結合させるものに
於いては、グラフアイト層5と陰極リード部材6
との間の直列抵抗が大きくなるという欠点があつ
た。
By the way, in the case where the cathode lead member 6 is directly bonded to the graphite layer 5 as shown in FIG.
The disadvantage was that the series resistance between the

そこで、本考案の目的は、直列抵抗を減少させ
ることが可能であると共に、静電容量を増大させ
ることが可能であるグラフアイト層に陰極リード
部材を埋め込む形式の固体電解コンデンサを提供
することにある。
Therefore, an object of the present invention is to provide a solid electrolytic capacitor in which a cathode lead member is embedded in a graphite layer, which can reduce series resistance and increase capacitance. be.

上記目的を達成するための本考案に係る固体電
解コンデンサは、実施例を示す図面を参照して説
明すると、陽極酸化皮膜形成可能な金属基板1の
一方の主面1aから他方の主面1bに至る貫通孔
11を設け、この貫通孔11の壁面上にも陽極酸
化皮膜3、半導体金属酸化物層4及びグラフアイ
ト層5を設け、貫通孔11におけるグラフアイト
層5によつても一方の主面側と他方の主面側とを
電気的に接続し、且つ貫通孔11を設けない場合
よりも設けた方が陽極酸化皮膜3の表面積が大き
くなるように貫通孔11の大きさを決定したこと
を特徴とするものである。
To achieve the above object, the solid electrolytic capacitor according to the present invention will be described with reference to the drawings showing the embodiments. A through hole 11 is provided in the through hole 11, and an anodic oxide film 3, a semiconductor metal oxide layer 4, and a graphite layer 5 are also provided on the wall surface of the through hole 11. The size of the through hole 11 was determined so that the surface side and the other main surface side were electrically connected, and the surface area of the anodic oxide film 3 was larger when the through hole 11 was provided than when it was not provided. It is characterized by this.

上記本考案によれば、貫通孔部分に埋め込まれ
るグラフアイトによつても、金属基板の一方の主
面側グラフアイト層と他方の主面側のグラフアイ
ト層とが電気的に結合され、陰極リード部材まで
の直列抵抗が減少し、tanδが小さくなる。また
貫通孔部分もコンデンサ形成の実効表面積として
利用されるので、同一外形寸法で容量を増大させ
ることが可能になる。
According to the present invention, the graphite layer embedded in the through-hole portion electrically couples the graphite layer on one main surface side of the metal substrate with the graphite layer on the other main surface side, and The series resistance up to the lead member is reduced, and tan δ is reduced. Further, since the through-hole portion is also used as an effective surface area for forming a capacitor, it is possible to increase the capacitance with the same external dimensions.

以下、図面を参照して本考案の実施例に付いて
述べる。
Embodiments of the present invention will be described below with reference to the drawings.

第3図〜第6図に示す本実施例に係わる固体電
解コンデンサに於いては、アルミニウム板からな
る金属基板1が特殊な形状に作られている。即ち
金属基板1には、その一方の主面1aからその他
方の主面1bに至る貫通孔11が形成され、且つ
この貫通孔11の幅Wが陽極酸化皮膜3の厚さの
2倍の値と半導体金属酸化物層4の厚さの2倍の
値とグラフアイト層5の厚さとの合計の厚さ以上
に決定され、且つ貫通孔11の大きさが金属基板
1にこの貫通孔11を設けない場合に形成される
陽極酸化皮膜3の表面積よりも金属基板1にこの
貫通孔11を設けた場合に形成される陽極酸化皮
膜3の表面積が大きくなるように決定されてい
る。
In the solid electrolytic capacitor according to this embodiment shown in FIGS. 3 to 6, a metal substrate 1 made of an aluminum plate is made into a special shape. That is, a through hole 11 is formed in the metal substrate 1 from one main surface 1a to the other main surface 1b, and the width W of the through hole 11 is twice the thickness of the anodic oxide film 3. The thickness of the through hole 11 is determined to be greater than or equal to the sum of twice the thickness of the semiconductor metal oxide layer 4 and the thickness of the graphite layer 5, and the size of the through hole 11 is determined to be greater than or equal to twice the thickness of the semiconductor metal oxide layer 4 and the thickness of the graphite layer 5. It is determined that the surface area of the anodic oxide film 3 formed when the through hole 11 is provided in the metal substrate 1 is larger than the surface area of the anodic oxide film 3 that is formed when the through hole 11 is provided in the metal substrate 1.

更に詳細には、金属基板1の厚さは1mm、突出
部12を除いた縦幅aが3.5mm、横幅bが4.5mm、
貫通孔11の幅が0.7mm、この貫通孔11の切り
込みの深さfが2mm、基板1の左端から貫通孔1
1までの幅c及び右端から貫通孔11までの幅
d1.9mm、突出部12の長さeが1mmに決定されて
いる。
More specifically, the metal substrate 1 has a thickness of 1 mm, a vertical width a excluding the protrusion 12 of 3.5 mm, a horizontal width b of 4.5 mm,
The width of the through hole 11 is 0.7 mm, the depth f of the cut of this through hole 11 is 2 mm, and the through hole 1 is
Width c to 1 and width from right end to through hole 11
d is determined to be 1.9 mm, and the length e of the protruding portion 12 is determined to be 1 mm.

このような金属基板1を使用して、コンデンサ
を作る場合も、金属基板1の鎖線10で示す部分
より下側にシリコーンによる保持被膜を第1図と
同様に設け、リード部材2を保護する。この際、
突出部12が設けられているので、底面1dにシ
リコーン保護膜が形成されるのを阻止することが
出来る。
When making a capacitor using such a metal substrate 1, a silicone retention coating is provided below the portion of the metal substrate 1 indicated by the chain line 10 in the same manner as in FIG. 1 to protect the lead members 2. On this occasion,
Since the protrusion 12 is provided, it is possible to prevent a silicone protective film from being formed on the bottom surface 1d.

電解コンデンサの製造方法は、第1図と同様で
あつて、金属基板1を電解エツチングして凹凸面
を設け、しかる後に、陽極酸化皮膜3及び半導体
金属酸化物層4を第1図と同様に順次形成する。
この例では半導体金属酸化物層4上のグラフアイ
ト層5を第1のグラフアイト層5aと第2のグラ
フアイト層5bで形成し、この内第1のグラフア
イト層5aはグラフアイト懸濁液に金属酸化物層
4を設けたものを浸漬し、加熱乾燥することによ
つて形成する。第1のグラフアイト層5aの形成
が終了したら、陰極リード部材6にグラフアイト
層(図示省略)を薄く焼き付けた偏平結合部6a
を第1のグラフアイト層5aに密着させ、再びグ
ラフアイトを塗布及び乾燥して第2のグラフアイ
ト層5bを形成し、結合部6aを第1と第2のグ
ラフアイト層5a,5bに埋め込んだ状態とす
る。陰極リード部材6はグラフアイトのみでは機
械的に結合出来ないので、金属基板1及び陽極リ
ード部材2に対して陰極リード部材6が所定の位
置になるように治具で位置決め且つ保持した状態
で作業を進める。陰極リード部材6は第3図及び
第6図から明らかなように偏平結合部6aとこの
偏平結合部6aと平行な線に沿つて伸びるリード
部材6bと、これ等の間に介在する屈曲部6cと
から成る。グラフアイト層5への陰極リード部材
6の埋め込みが終了したら第1図と同様な第1の
絶縁層7と第2の絶縁層8とを形成する。この
時、陰極リード部材6の屈曲部6cが第1及び第
2の絶縁層7,8中に埋め込まれた状態とする。
第2の絶縁層8をエポキシ樹脂で形成する場合に
は、これを硬化することによつて素子が完成し、
陰極リード部材6を治具から取り外すことが可能
になる。陽極リード部材2及び陰極リード部材6
がリードフレーム形式の場合には、切断すること
によつて独立の素子とする。
The manufacturing method of the electrolytic capacitor is the same as that shown in FIG. 1, in which the metal substrate 1 is electrolytically etched to provide an uneven surface, and then the anodic oxide film 3 and the semiconductor metal oxide layer 4 are formed in the same manner as shown in FIG. Form sequentially.
In this example, the graphite layer 5 on the semiconductor metal oxide layer 4 is formed of a first graphite layer 5a and a second graphite layer 5b, of which the first graphite layer 5a is a graphite suspension. The metal oxide layer 4 is immersed in the metal oxide layer 4 and then heated and dried. After the formation of the first graphite layer 5a is completed, a flat connecting portion 6a is formed by baking a thin graphite layer (not shown) onto the cathode lead member 6.
is brought into close contact with the first graphite layer 5a, and graphite is applied again and dried to form a second graphite layer 5b, and the bonding portion 6a is embedded in the first and second graphite layers 5a, 5b. state. Since the cathode lead member 6 cannot be mechanically bonded with graphite alone, the cathode lead member 6 is positioned and held in a predetermined position relative to the metal substrate 1 and anode lead member 2 using a jig. proceed. As is clear from FIGS. 3 and 6, the cathode lead member 6 includes a flat joint part 6a, a lead member 6b extending along a line parallel to the flat joint part 6a, and a bent part 6c interposed between them. It consists of After embedding the cathode lead member 6 into the graphite layer 5, a first insulating layer 7 and a second insulating layer 8 similar to those shown in FIG. 1 are formed. At this time, the bent portion 6c of the cathode lead member 6 is embedded in the first and second insulating layers 7 and 8.
When the second insulating layer 8 is formed of epoxy resin, the element is completed by curing it,
It becomes possible to remove the cathode lead member 6 from the jig. Anode lead member 2 and cathode lead member 6
If it is in the form of a lead frame, it is made into an independent element by cutting it.

この実施例の場合には、貫通孔11の中にも、
第5図に説明的に示すように、陽極酸化皮膜3と
半導体金属酸化物層4とから成る層13が形成さ
れ、更に残つた部分を充満するようにグラフアイ
ト層5が形成される。従つて、金属基板1の一方
の主面1a側のグラフアイト層と他方の主面1b
のグラフアイト層とがこの貫通孔11の部分を介
して電気的に結合され、半導体金属酸化物層4の
表面から陰極リード部材6までの電気的抵抗が少
なくなり、tanδが小さくなる。また貫通孔11
を設けてコンデンサ有効表面積を増大させ、且つ
シリコーン保護被膜を設ける面積を減少させてコ
ンデンサ有効表面積を増大させているので、静電
容量も増大する。
In the case of this embodiment, also in the through hole 11,
As illustrated in FIG. 5, a layer 13 consisting of an anodic oxide film 3 and a semiconductor metal oxide layer 4 is formed, and a graphite layer 5 is further formed to fill the remaining portion. Therefore, the graphite layer on one main surface 1a side of the metal substrate 1 and the other main surface 1b
is electrically coupled to the graphite layer through the through hole 11, the electrical resistance from the surface of the semiconductor metal oxide layer 4 to the cathode lead member 6 is reduced, and tan δ is reduced. Also, the through hole 11
Since the effective surface area of the capacitor is increased by providing the silicone protective coating, and the effective surface area of the capacitor is increased by reducing the area where the silicone protective coating is provided, the capacitance also increases.

比較のために、第2図の従来の基板1の寸法
を、縦幅4.5mm、横幅4.5mm、厚さ1mmとし、鎖線
10までのシリコーン保護被膜9の形成幅を0.9
mmとし、その他は第4図と全く同様に構成したも
のと、第3図の基板1を使用して構成した本実施
例のコンデンサとの容量及びtanδとを測定した
ところ、前者の従来のコンデンサの容量は0.32μ
Fであるのに対し、本実施例のコンデンサの容量
は0.335μFであつた。また1kHzに於ける従来の
コンデンサのtanδは3.1であるのに対し、本実施
例のコンデンサのtanδは2.6であり、また120Hz
に於ける従来のコンデンサのtanδは1.2であるの
に対し、本実施例のコンデンサのtanδは1.1であ
り、10kHzに於ける従来のコンデンサのtanδは
8.6であるのに対し、本実施例のコンデンサのtan
δは7.8であつた。
For comparison, the dimensions of the conventional substrate 1 in FIG. 2 are 4.5 mm in length, 4.5 mm in width, and 1 mm in thickness, and the width of the silicone protective coating 9 up to the chain line 10 is 0.9 mm.
When we measured the capacitance and tan δ of the capacitor of this example constructed using the substrate 1 of FIG. The capacity of is 0.32μ
F, whereas the capacitance of the capacitor in this example was 0.335 μF. In addition, the tan δ of the conventional capacitor at 1 kHz is 3.1, while the tan δ of the capacitor in this example is 2.6, and at 120 Hz
The tan δ of the conventional capacitor at 10 kHz is 1.2, whereas the tan δ of the capacitor of this example is 1.1, and the tan δ of the conventional capacitor at 10 kHz is 1.2.
8.6, whereas the tan of the capacitor in this example is
δ was 7.8.

第7図は本考案の別の実施例に係わる金属基板
1を示すものである。この実施例では、貫通孔1
1の全周が基板1で囲まれるように形成されてい
る。尚基板1の厚さは1mm、縦幅aは3.5mm、横
幅bは4.5mm、突出部12の長さeは1mm、突出
部112の幅cは1mm、貫通孔11の幅wは0.7
mm、貫通孔11の長さfは2mmである。この様な
基板1を使用しても第3図〜第6図の実施例とほ
ぼ同様なコンデンサが得られ、同一の作用効果が
得られる。
FIG. 7 shows a metal substrate 1 according to another embodiment of the present invention. In this embodiment, through hole 1
1 is formed so that the entire circumference thereof is surrounded by the substrate 1. The thickness of the substrate 1 is 1 mm, the vertical width a is 3.5 mm, the horizontal width b is 4.5 mm, the length e of the protrusion 12 is 1 mm, the width c of the protrusion 112 is 1 mm, and the width w of the through hole 11 is 0.7.
mm, and the length f of the through hole 11 is 2 mm. Even if such a substrate 1 is used, a capacitor substantially similar to the embodiments shown in FIGS. 3 to 6 can be obtained, and the same effects can be obtained.

以上、本考案の実施例について述べたが、本考
案はこれに限定されるものではなく更に変形可能
なものである。例えば、貫通孔11を複数個設け
ても差支えない。
Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified. For example, a plurality of through holes 11 may be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の固体電解コンデンサを説明的に
示す断面図、第2図は第1図のコンデンサの金属
基板の正面図、第3図は本考案の実施例に係わる
固体電解コンデンサの金属基板の正面図、第4図
は第3図の−線に相当する部分の断面図、第
5図は第3図の−線に相当する部分の断面
図、第6図は陰極リード部材の斜視図、第7図は
別の実施例に係わる金属基板の正面図である。 尚図面に用いられている符号において、1は金
属基板、2は陽極リード部材、3は陽極酸化皮
膜、4は半導体酸化物層、5aは第1のグラフア
イト層、5bは第2のグラフアイト層、6は陰極
リード部材、7は第1の絶縁層、8は第2の絶縁
層、11は貫通孔である。
Fig. 1 is a cross-sectional view illustrating a conventional solid electrolytic capacitor, Fig. 2 is a front view of a metal substrate of the capacitor shown in Fig. 1, and Fig. 3 is a metal substrate of a solid electrolytic capacitor according to an embodiment of the present invention. 4 is a sectional view of the portion corresponding to the - line in FIG. 3, FIG. 5 is a sectional view of the portion corresponding to the - line in FIG. 3, and FIG. 6 is a perspective view of the cathode lead member. , FIG. 7 is a front view of a metal substrate according to another embodiment. In the symbols used in the drawings, 1 is a metal substrate, 2 is an anode lead member, 3 is an anodic oxide film, 4 is a semiconductor oxide layer, 5a is a first graphite layer, and 5b is a second graphite layer. 6 is a cathode lead member, 7 is a first insulating layer, 8 is a second insulating layer, and 11 is a through hole.

Claims (1)

【実用新案登録請求の範囲】 陽極酸化皮膜形成可能な金属基板1と、前記金
属基板1に固着された陽極リード部材と、前記金
属基板1の外周面に形成された陽極酸化皮膜3
と、前記陽極酸化皮膜3上に形成された半導体金
属酸化物層4と、前記半導体金属酸化物層4上に
形成されたグラフアイト層5と、前記金属基板1
の一方の主面側において前記グラフアイト層5中
にその一部が埋め込まれた陰極リード部材と、前
記陽極リード部材及び前記陰極リード部材の一部
を露出させた状態で前記グラフアイト層5を囲む
ように設けられた絶縁被覆層7,8とから成る固
体コンデンサにおいて、 前記金属基板1にその一方の主面1aからその
他方の主面1bに至る貫通孔11を設け、 前記金属基板1の一方及び他方の主面1a,1
b上の前記陽極酸化皮膜3、前記半導体金属酸化
物層4及び前記グラフアイト層5に連続するよう
に前記貫通孔11の壁面上にも陽極酸化皮膜3、
半導体金属酸化物層4及びグラフアイト層5を設
け、 前記金属基板1に前記貫通孔11を設けない場
合の前記陽極酸化皮膜3の表面積よりも前記金属
基板1に前記貫通孔11を設けた場合の前記陽極
酸化皮膜3の表面積が大きくなるように前記貫通
孔11の大きさを決定したことを特徴とする固体
電解コンデンサ。
[Claims for Utility Model Registration] A metal substrate 1 on which an anodic oxide film can be formed, an anode lead member fixed to the metal substrate 1, and an anodic oxide film 3 formed on the outer peripheral surface of the metal substrate 1.
, a semiconductor metal oxide layer 4 formed on the anodic oxide film 3, a graphite layer 5 formed on the semiconductor metal oxide layer 4, and the metal substrate 1.
The graphite layer 5 is covered with a cathode lead member partially embedded in the graphite layer 5, and a part of the anode lead member and the cathode lead member exposed on one main surface side of the graphite layer 5. In a solid capacitor consisting of insulating coating layers 7 and 8 surrounding each other, the metal substrate 1 is provided with a through hole 11 extending from one main surface 1a to the other main surface 1b; One and the other main surfaces 1a, 1
an anodic oxide film 3 also on the wall surface of the through hole 11 so as to be continuous with the anodic oxide film 3, the semiconductor metal oxide layer 4 and the graphite layer 5 on b;
When the semiconductor metal oxide layer 4 and the graphite layer 5 are provided, and the surface area of the anodic oxide film 3 is larger than the surface area of the anodic oxide film 3 when the metal substrate 1 is provided with the through holes 11, the metal substrate 1 is provided with the through holes 11. A solid electrolytic capacitor characterized in that the size of the through hole 11 is determined so that the surface area of the anodic oxide film 3 becomes large.
JP7745980U 1980-06-04 1980-06-04 Expired JPS6116680Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7745980U JPS6116680Y2 (en) 1980-06-04 1980-06-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7745980U JPS6116680Y2 (en) 1980-06-04 1980-06-04

Publications (2)

Publication Number Publication Date
JPS572648U JPS572648U (en) 1982-01-08
JPS6116680Y2 true JPS6116680Y2 (en) 1986-05-22

Family

ID=29440025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7745980U Expired JPS6116680Y2 (en) 1980-06-04 1980-06-04

Country Status (1)

Country Link
JP (1) JPS6116680Y2 (en)

Also Published As

Publication number Publication date
JPS572648U (en) 1982-01-08

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