JPS61166190A - Optical integrated circuit - Google Patents

Optical integrated circuit

Info

Publication number
JPS61166190A
JPS61166190A JP60006895A JP689585A JPS61166190A JP S61166190 A JPS61166190 A JP S61166190A JP 60006895 A JP60006895 A JP 60006895A JP 689585 A JP689585 A JP 689585A JP S61166190 A JPS61166190 A JP S61166190A
Authority
JP
Japan
Prior art keywords
layer
conductivity type
optical waveguide
type
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60006895A
Other languages
Japanese (ja)
Inventor
Masato Ishino
正人 石野
Yasushi Matsui
松井 康
Kenichi Matsuda
賢一 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60006895A priority Critical patent/JPS61166190A/en
Publication of JPS61166190A publication Critical patent/JPS61166190A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0265Intensity modulators

Abstract

PURPOSE:To simplify a manufacturing method by applying a forward voltage to p-n junction on an n-type intermediate layer, driving a semiconductor laser, applying a reverse voltage to a p-type clad layer to drive a photocontroller. CONSTITUTION:After a grating is formed on an n<+> type InP substrate 1, an n<-> type InGaAsP layer 2, a p<+> type InP intermediate layer 10 and charging clad layers 10', 10'', an InGaAsP active layer 4, an n<+> type InP clad layer 11, an n<+> type InGaAsP layer 12 are sequentially epitaxially grown. After a striped Au/Su electrode 8' is formed on the layer 12, the layers 12, 11, 4 are removed by etching. Then, an Au/Zn electrode 7, Au/Zn electrodes 7', 7'' are formed on the exposed p<+> type InP layer, the layers 10, 10', 10'' are partly etched to separate between the elements as the intermediate layer 10 and mounting clads 10', 10'' of a semiconductor laser, Au/Sn electrode 8 is formed on the separating surface of n<+> type InP substrate.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体レーザーと、光スィッチや光変調器等の
光制御素子とをモノリシックに一体化した光集積回路に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an optical integrated circuit in which a semiconductor laser and a light control element such as an optical switch or an optical modulator are monolithically integrated.

従来の技術 光制御素子と半導体レー哄をモノリシックに一体化した
光集積回路は幅広い応用分野がある。
Conventional Technology Optical integrated circuits that monolithically integrate optical control elements and semiconductor lasers have a wide range of applications.

例えば高速変調時でも安定な発振特性を示す外部光変調
器一体化半導体レーザーや、光路切り換え機能を持つ光
スイッチ一体化半導体レーザーのみならず、DFBレー
ザーや二重共振器型レーザーの位相制御による発振波長
の制御等にも用いることができる。
For example, not only semiconductor lasers with integrated external optical modulators that exhibit stable oscillation characteristics even during high-speed modulation, semiconductor lasers with integrated optical switches that have an optical path switching function, but also oscillation by phase control of DFB lasers and double-cavity lasers. It can also be used for wavelength control, etc.

第2図はこのよう々半導体レーザーと光制御素子を単純
に一体化した場合の一例を示す。
FIG. 2 shows an example in which a semiconductor laser and a light control element are simply integrated in this manner.

1はn” =InP基板、2はバンドギヤ1.プ波長λ
−1,06μmのn−−InGaAs P光導波層、3
はn’= InP中間層、4はλq=1.3 μmのI
nGaAsP活性層、5.5′はP″−InP クラッ
ド層、6はλ””1.11tmのP+−1nGaAs 
P キー1” ツブ層、7 、7’はA、u / Zn
電極、8はAu/Sn電極、9はグレーティングである
。への領域はITG−DFE型の半導体レーザーを成し
、Bの領域は光制御領域を成す。A、Bの領域はn+−
InP基板1、n −I nGaAs P光導波層2で
連結されており、Au / Sn電極8− Au / 
Zn電極7間に順方向電圧を印加して半導体レーザーを
駆動し、発振した光波は光導波層2をBの領域へ伝搬す
る。ここでAu / S n電極8−Au/Zn電極7
′間に逆方向電圧を印加すねば電気光学効果により光の
制御を行なうことができる。Bの領域の光制御素子とし
ては方向性結合器型や全反射型等積々の構造が可能で光
変調や光スィッチを行なうことができる。
1 is n” = InP substrate, 2 is band gear 1.P wavelength λ
-1,06 μm n--InGaAs P optical waveguide layer, 3
is n' = InP intermediate layer, 4 is I of λq = 1.3 μm
nGaAsP active layer, 5.5' is P"-InP cladding layer, 6 is P+-1nGaAs with λ""1.11 tm
P key 1" bulge layer, 7, 7' are A, u/Zn
The electrodes 8 are Au/Sn electrodes, and 9 is a grating. The region B constitutes an ITG-DFE type semiconductor laser, and the region B constitutes a light control region. Areas A and B are n+-
An InP substrate 1 is connected with an n-InGaAsP optical waveguide layer 2, and an Au/Sn electrode 8-Au/
A forward voltage is applied between the Zn electrodes 7 to drive the semiconductor laser, and the oscillated light waves propagate through the optical waveguide layer 2 to the region B. Here Au/Sn electrode 8-Au/Zn electrode 7
If a reverse voltage is applied between '', light can be controlled by the electro-optic effect. The light control element in the region B can have a variety of structures, such as a directional coupler type or a total reflection type, and can perform optical modulation and optical switching.

発明が解決しようとする問題点 しかしながら第2図に示す構造の光集積回路では、光導
波層2+の層の4電型がAの領域とBの領域で異なるだ
め、この素子を作成するには、2回以上のエピタキシャ
ル成長を必要とし、作成プロセスも複雑である。さらに
二回目のエピタキシャル成長でけメルトバックなしで光
導波層2−にに直接積重なければならないので、良好な
pn接合特性を得るのが難しいという問題点があった。
Problems to be Solved by the Invention However, in the optical integrated circuit having the structure shown in FIG. 2, the 4-electrode type of the layer of the optical waveguide layer 2+ is different between the region A and the region B, so it is difficult to create this device. , requires epitaxial growth two or more times, and the fabrication process is complicated. Furthermore, since the second epitaxial growth must be performed directly on the optical waveguide layer 2- without meltback, it is difficult to obtain good pn junction characteristics.

本発明はかかる問題点を克服すべき、簡単な製造法で良
好な6性を示すことが5T能々光集積回路を提イJ(す
ることを[]的とする。
It is an object of the present invention to overcome such problems and to provide a 5T optical integrated circuit that exhibits good performance using a simple manufacturing method.

問題点をブW決するだめの手段 上記問題点を解決するために、本発明は光導波層−]二
の中間層、クラッド層を第2の導電型の共通の層とし、
中間層の−1−に活性層、第1の導電型のクラッド層、
電極を配し半導体レーザ一部とし、第2の導電型のクラ
ンド層」−に電極を配し光制御部とする構造のもので、
中間層上のpn接合に順方向電圧を印加して半導体レー
ザーを駆動し、第1の導電型のクラッド層下に逆方向電
圧を印加して光制御部を駆動するものである。
Means for solving the problems In order to solve the above problems, the present invention uses the optical waveguide layer, the two intermediate layers, and the cladding layer as a common layer of the second conductivity type,
-1- of the intermediate layer, an active layer, a cladding layer of a first conductivity type,
It has a structure in which an electrode is arranged to form a part of the semiconductor laser, and an electrode is arranged to a second conductivity type land layer to form a light control part.
A forward voltage is applied to the pn junction on the intermediate layer to drive the semiconductor laser, and a reverse voltage is applied below the cladding layer of the first conductivity type to drive the light control section.

作  用 本発明は」起工した構造、駆動方式により、最低−回の
エピタキシャル成長で済む等、簡単な製造法でかつ単体
の素子特性を損なわない良好な特性の半導体レーザー・
光制御素子一体化光集積回路を提供することができる。
Function: The present invention provides a semiconductor laser with good characteristics that is simple to manufacture and does not impair the characteristics of the single device, such as requiring only a minimum number of epitaxial growths due to the developed structure and driving method.
An optical integrated circuit with an integrated optical control element can be provided.

実施例 第1図は本発明の第1の実施例としてInP基板を用い
た夕1部光変調器刊半導体レーザーを示す。
Embodiment FIG. 1 shows a semiconductor laser with an optical modulator using an InP substrate as a first embodiment of the present invention.

これはITG−DFB型の半導体レーザー(Aの領域)
と外部光変調器として方向性結合器(Bの領域)を一体
化した光集積回路である。ここで1〜9は従来の技術(
第2図)に示したとおりであるが、10はP”−InP
  中間層、10’、10″はP”−InP 装荷クラ
ッド層で、10.10’、10″の各層は同一の層を分
離したものにすぎない。また11はn″−−InPクラ
ッド層、12は2g−1,1μmのn+−InGaAs
 Pキヤツプ層、7,7′  はAu / Zn電極、
8′はAu/Sn電極であるofだ第3図はこの素子の
C−D間の断面を示す図である。
This is an ITG-DFB type semiconductor laser (area A)
This is an optical integrated circuit that integrates a directional coupler (area B) as an external optical modulator. Here, 1 to 9 are conventional techniques (
As shown in Figure 2), 10 is P''-InP
The intermediate layer 10', 10'' is a P''-InP loaded cladding layer, and each layer 10', 10'' is just the same layer separated from each other. Also, 11 is an n''--InP cladding layer, 12 is 2g-1, 1μm n+-InGaAs
P cap layer, 7, 7' are Au/Zn electrodes,
8' is an Au/Sn electrode of FIG.

この素子は以下の手順で作製することができる。This element can be manufactured by the following procedure.

1ずn+−InP 基板1」−のAの領域にグレーティ
ングを形成したのち、721.058mのn−−InG
aAs P層2、p”’−InP中間層10および装荷
クラッド層10′、10“、λ9−1.3μmのInG
aAs P活性層4、n”−InPクラッド層11、λ
=1.1μmのn+−I nGaAs P層12を順次
エピタキシャル成長を行なう。n+−InGaAs P
層12土のAの領域にストライブ状のAu/Sn電極8
′を形成後、このストライブ状の領域以外の計−InG
aAs P層12、n”−InP層11、InGaAs
P活性層3をエツチングで取り除く。活性層3の横モー
ドの単一化の為、ストライプ幅を他より太くしである。
1) After forming a grating in the region A of the n+-InP substrate 1''-, 721.058 m of n--InG was formed.
aAs P layer 2, p''-InP intermediate layer 10 and loaded cladding layer 10', 10'', λ9-1.3 μm InG
aAs P active layer 4, n''-InP cladding layer 11, λ
An n+-I nGaAs P layer 12 having a thickness of 1.1 μm is sequentially epitaxially grown. n+-InGaAs P
Striped Au/Sn electrode 8 in area A of layer 12 soil
After forming ', the total -InG area other than this stripe-like area
aAs P layer 12, n''-InP layer 11, InGaAs
The P active layer 3 is removed by etching. In order to unify the transverse mode of the active layer 3, the stripe width is made wider than the other stripes.

次に露出しだp+−InP層上に半導体レーザーの下部
電極としてのAu / Zn電極7、方向性結合器の制
御電極としてのAu / Zn電極7′、7″を形成し
、p+−InP層10.10’、10”  の一部分を
エツチングして素子間分離を行ない半導体レーザーの中
間層101方向性結合器の装荷クラ、F1o’ 、 1
0ttとする。さらにn+−InP 基板の離面にAu
 / Sn電極8を形成することにより本発明の光集積
回路が作製できる。
Next, an Au/Zn electrode 7 as a lower electrode of the semiconductor laser and Au/Zn electrodes 7' and 7'' as control electrodes of the directional coupler are formed on the exposed p+-InP layer, and then the p+-InP layer is formed. 10. Etching a part of 10', 10'' to isolate the elements and loading the intermediate layer 101 of the semiconductor laser and the directional coupler, F1o', 1
0tt. Furthermore, Au is placed on the outer surface of the n+-InP substrate.
/ By forming the Sn electrode 8, the optical integrated circuit of the present invention can be manufactured.

この素子の半導体レーザ一部AのAu / Zn電極7
を接地しn” −I nGaAs P層上のAu / 
Sn電極8′に順方向電圧を印加するとしきい値−十の
電流で半導体レーザーは発振する。ここで半導体レーサ
一部Aのn−1−InP装荷クラッド層11下の光導波
層2および方向性結合器部のp+−InP装荷クラッド
層下の光導波層2には三次元的な光の閉じ込めかできる
先導波路が形成され、発振したレー→ノ゛−光はこの先
導波路を伝搬して方向性結合器Bの装荷クラッド10’
下の光導波路に達する。方向性結合器の素子長りを最小
結合長にとると2本の光導波路間のカップリングにより
レーザー光は隣の光導波路に移行し、Iff力光はp″
−InP 装荷クラット10“下の光導波層2から得ら
れる。今裏面のAu / Sn電極を接地し、p″−I
nP装荷クラりド」二のAu/Zn電極7,7′のどち
らか一方に逆方向電圧を印加すると電気光学効果による
屈折率変化で光の移行度が変化しスインチングミ圧Vs
でp+−InP 装荷クラッド10′側の光導波路に出
力光がスイッチし、徒た印加電圧に応じて出力光の強度
を変調することができる。
Au/Zn electrode 7 of semiconductor laser part A of this device
Au/on the n”-I nGaAs P layer.
When a forward voltage is applied to the Sn electrode 8', the semiconductor laser oscillates with a current equal to the threshold value -10. Here, the optical waveguide layer 2 under the n-1-InP-loaded cladding layer 11 of the semiconductor laser part A and the optical waveguide layer 2 under the p+-InP-loaded cladding layer of the directional coupler section contain three-dimensional light. A leading wave path that can be confined is formed, and the oscillated laser beam propagates through this leading wave path and reaches the loaded cladding 10' of the directional coupler B.
It reaches the optical waveguide below. When the element length of the directional coupler is set to the minimum coupling length, the laser beam moves to the adjacent optical waveguide due to the coupling between the two optical waveguides, and the Iff power light becomes p''
-InP is obtained from the optical waveguide layer 2 under the loaded crat 10". Now ground the Au/Sn electrode on the back side and connect the p"-I
When a reverse voltage is applied to either one of the Au/Zn electrodes 7 and 7' of the nP-loaded cladding, the degree of light migration changes due to a change in the refractive index due to the electro-optic effect, resulting in a flickering pressure Vs.
Then, the output light is switched to the optical waveguide on the p+-InP loaded cladding 10' side, and the intensity of the output light can be modulated according to the applied voltage.

ところでこの場合半導体レーザ一部Aと方向性結合器部
8間で分離のため装荷クラッド部が一部切れており若干
光の結合損失が問題に々るが、第4図に示すように半導
体レーザーの中間層と方向性結合器の一方の装荷クラッ
ドとを連結して形成し、方向性結合器への電圧印加は他
方の装荷7ラツドで行々えばこの問題は解決する。
By the way, in this case, the loading cladding part is partially cut off due to separation between the semiconductor laser part A and the directional coupler part 8, causing a slight coupling loss of light, but as shown in Figure 4, the semiconductor laser This problem can be solved by connecting the intermediate layer of the directional coupler with the loading cladding of one side of the directional coupler, and applying voltage to the directional coupler with the load of 7 rad on the other side.

このように本発明の第1の実施例の外部変調器付半導体
レーザーは」−述した構造、駆動方式により簡単な製造
法で良好な光変調・光スイツチ特性を得ることができる
As described above, the semiconductor laser with an external modulator according to the first embodiment of the present invention can obtain good optical modulation and optical switching characteristics with a simple manufacturing method using the structure and driving method described above.

次に第5図は本発明の第2の実施例としての位相制御型
2重共振器レーザーを示す。この素子の膜構造駆動方式
は第1の実施例の場合と同一であるが、光制御部Bは一
本の装荷型導波路から成り、半導体レーザ一部Aは共振
器L1、光制御部Bは共振器L2の2重共振器構造を為
している。
Next, FIG. 5 shows a phase-controlled dual cavity laser as a second embodiment of the present invention. The film structure driving method of this device is the same as in the first embodiment, but the light control section B consists of one loaded waveguide, the semiconductor laser part A is connected to the resonator L1, and the light control section B has a double resonator structure of resonator L2.

この素子の原理等の詳細は特願昭59−43301号に
記載されているが、光制御部Bのp+−装荷クラヮド層
10’上のAu/Zn電極7′に逆方向電圧を印加する
ことにより第2の共振器内の導波光の位相を制御するこ
とができ、2つの共振器の最適位相整合条件により安定
した発振特性、とりわけ高速変調時の発i周波数のシフ
ト量が最小である半導体レーザーを得ることができるも
のである。
The details of the principle of this device are described in Japanese Patent Application No. 59-43301, but it is important to apply a reverse voltage to the Au/Zn electrode 7' on the p + -loaded cladding layer 10' of the light control section B. It is possible to control the phase of the guided light in the second resonator, and the optimal phase matching conditions for the two resonators provide stable oscillation characteristics, especially a semiconductor with a minimum shift in the oscillation frequency during high-speed modulation. Laser is what you can get.

ところで本発明の実施例では半導体基板はn+−InP
を用いたが光導、波層」−に電極を形成すれば半絶縁性
基板でも良く、各層も条件を満たす限りこれに限定され
るものでは彦い。さらにG a A s等の他の半導体
材料にも適用できることは言うまでもないO 発明の効果 以−に述べてきたように、本発明の構造、駆動方式の光
制御部と半導体レーザ一部とも一体化した光集積回路で
は最低−回のエピタキシャル成長で10 ・ 形成可能である等簡単な製造方法で単体素子の場合の特
性を損なうこと々く集積化により特性を向上することが
でき、外部光変調器・光スイッチ一体化半導体レーザー
や、外部位相制御型2重共振器レーザー等その応用範囲
は広く実用的にきわめて有用である。
By the way, in the embodiment of the present invention, the semiconductor substrate is n+-InP.
However, a semi-insulating substrate may be used as long as electrodes are formed on the light guide or wave layer, and each layer is not limited to this as long as the conditions are met. Furthermore, it goes without saying that it can be applied to other semiconductor materials such as GaAs. Optical integrated circuits can be formed with a minimum of 10 times of epitaxial growth, and their characteristics can be improved through integration without sacrificing the characteristics of a single element. The range of applications is wide, such as semiconductor lasers with integrated optical switches and external phase-controlled double-cavity lasers, and they are extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例によるタ1部光変調器一
体化半導体レーザーの刺趨図、第2図は従来の構造のオ
ま一体化した光制御部一体化半導体レーザーの断面図、
第3図は第1図の断面図、第4図は第1図における構造
の一部を改良した素子の、@親図、第5図は本発明の第
2の実施例である位相制御機構伺2重共振器型レーザー
の徊夜図である。 1・・・・・・n″−InP基板、2−− n −In
GaAs P光導波層、3・・・・・・n′’−InP
  中間層、4・・・・・・InGaAsP活性層、5
.5’・・・・・p″−InPnチクド層、6・・・・
・・p″−InGaAs Pキヤツプ層、7 、7’、
 7” −・・−・・Au/Zn電極、8 、8’ −
−−−−・Au/ Sn電極、9・・・・・・グレーテ
ィング、1o・・・・・p+−InP中間層、10’・
・・・・・p+I nP 装荷クラッド、11・・・・
・・n+−InPクラノ ド層、12−−− n+−I
nGaAs P キャップ層。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第2
図 ←β→ ←Δ→ 第3図 第4図 〃′ 第5図
FIG. 1 is a cross-sectional view of a semiconductor laser with an integrated light control section and an integrated optical control section having a conventional structure. figure,
FIG. 3 is a sectional view of FIG. 1, FIG. 4 is a parent diagram of an element with a partially improved structure in FIG. 1, and FIG. 5 is a phase control mechanism according to a second embodiment of the present invention. This is a night diagram of a dual cavity laser. 1...n''-InP substrate, 2--n-In
GaAs P optical waveguide layer, 3...n''-InP
Intermediate layer, 4... InGaAsP active layer, 5
.. 5'...p''-InPn scratched layer, 6...
...p''-InGaAs P cap layer, 7, 7',
7"--Au/Zn electrode, 8, 8'-
-----・Au/Sn electrode, 9...Grating, 1o...p+-InP intermediate layer, 10'...
...p+I nP loaded cladding, 11...
・・n+-InP cranode layer, 12--- n+-I
nGaAs P cap layer. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure ←β→ ←Δ→ Figure 3 Figure 4〃' Figure 5

Claims (2)

【特許請求の範囲】[Claims] (1)第1の導電型もしくは半絶縁性の半導体基板上に
必要とあらば第1の導電型の緩衝層を介して、第1もし
くは第2の導電型で前記半導体基板、緩衝層よりも低キ
ャリヤ密度で高屈折率の光導波層を有し、第1の領域で
は前記光導波層上に第2の導電型で前記光導波層よりも
高キャリヤ密度で低屈折率の中間層、前記光導波層、中
間層よりも禁制帯幅の小さい活性層、第2の導電型で前
記活性層よりも禁制帯幅の大きいクラッド層を有する構
造で、第2の領域では前記光導波層上に前記中間層と同
一のクラッド層を有し、前記第1および第2の領域で前
記光導波層を共通とし、前記第1の領域の中間層と第2
の領域のクラッド層を共通とすることを特徴とする光集
積回路。
(1) If necessary, a semiconductor substrate of a first conductivity type or a semi-insulating type is placed on a semiconductor substrate of a first conductivity type or a semi-insulating type through a buffer layer of a first conductivity type. an optical waveguide layer with a low carrier density and a high refractive index, and an intermediate layer of a second conductivity type and a lower refractive index with a higher carrier density than the optical waveguide layer on the optical waveguide layer in the first region; The structure includes an optical waveguide layer, an active layer having a narrower forbidden band width than the intermediate layer, and a cladding layer of a second conductivity type and having a wider forbidden band width than the active layer, and in the second region, on the optical waveguide layer. The intermediate layer has the same cladding layer, the optical waveguide layer is common in the first and second regions, and the intermediate layer in the first region and the second region have the same cladding layer.
An optical integrated circuit characterized by having a common cladding layer in the region.
(2)第1の領域における第2の導電型の中間層と第1
の導電型のクラッド層もしくはコンタクト層間に順方向
電圧を印加し半導体レーザーを駆動し、第2の領域にお
ける第2の導電型のクラッド層と第1の導電型の半導体
基板もしくは緩衝層もしくは光導波層間に逆方向電圧を
印加し光の制御を行なわしめることを特徴とする特許請
求の範囲第1項記載の光集積回路。
(2) The intermediate layer of the second conductivity type in the first region and the first
A forward voltage is applied between the cladding layer or the contact layer of the conductivity type to drive the semiconductor laser, and the cladding layer of the second conductivity type and the semiconductor substrate or buffer layer or the optical waveguide of the first conductivity type are connected in the second region. 2. The optical integrated circuit according to claim 1, wherein light is controlled by applying a reverse voltage between the layers.
JP60006895A 1985-01-18 1985-01-18 Optical integrated circuit Pending JPS61166190A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60006895A JPS61166190A (en) 1985-01-18 1985-01-18 Optical integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60006895A JPS61166190A (en) 1985-01-18 1985-01-18 Optical integrated circuit

Publications (1)

Publication Number Publication Date
JPS61166190A true JPS61166190A (en) 1986-07-26

Family

ID=11650956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60006895A Pending JPS61166190A (en) 1985-01-18 1985-01-18 Optical integrated circuit

Country Status (1)

Country Link
JP (1) JPS61166190A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5117477A (en) * 1990-02-14 1992-05-26 Ricoh Company, Ltd. Optical functioning element using a transparent substrate with matching lattice constant

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5117477A (en) * 1990-02-14 1992-05-26 Ricoh Company, Ltd. Optical functioning element using a transparent substrate with matching lattice constant

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