JPS61158373A - Reduction system for dot character pattern - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reduction method for obtaining accurate reduced pattern dot characters with a relatively simple configuration.

[Prior Art] There are three conventional techniques for reducing a dot character pattern. The first is to simply delete bits according to the reduction ratio. For example, if the ring dot character pattern shown in Figure 6 is 24 x 24 dots and is to be reduced to a 16 x 16 dot pattern, if you simply remove every 3rd dot in 24 rows and columns, you can mechanically process the ring dots. A reduced pattern shown in FIG. 7 can be obtained.

The second method is an improvement on the first method. When a column or row is specified to be deleted and it is a straight dot, the deletion is stopped and the data is moved to the next column or row. be.

Figure 8 shows the result obtained by repeating the process of deleting the 3rd line in Figure 1, deleting the 5th line because it was impossible to do the 4th line, and deleting the 7th line instead of the 6th line. This is a pattern.

Although the process is a little more complicated than the first method, the resulting pattern is more accurate.

Third, a pre-trained designer looks at each character one by one, specifies columns and rows of dots that can be deleted when reducing the pattern from a global perspective, and places flags outside the columns and rows. (, when processing each character, delete flagged columns and rows to obtain a pattern.

[Problems to be Solved by the Invention] The problem with the prior art is that in the first method, only extremely inaccurate patterns as shown in FIG. 2 are obtained.

Regarding the second method, it is not always possible to shift the specified rows/columns to be deleted appropriately, and because the start or end is forcibly deleted, black toft rows/columns remain. Because it is easy to write, the spacing between the lines disappears, resulting in a mass of black lines, and the shape of the letters collapses.

Since the third method involves continuous manual work, it takes an extremely long time to process all the characters normally used in social activities. Therefore, the cost required to create a reduced pattern is extremely high, and once a reduced pattern has been created, if a character shape whose reduction ratio has been changed is to be obtained, it is necessary to start over from the beginning.

[Means for Solving the Problems] In order to improve the above-mentioned problems, the present invention employs a method in which a character pattern represented by a dot matrix is partially deleted and reduced. Extract and store glyph features for pre-processing with respect to the line direction and the fact that straight lines and blank spaces of 1 dot width cannot be deleted, and that dots other than straight lines and blank spaces of 2 dot width or more can be deleted. A first storage means, a second storage means for storing positional information to be deleted that is simply averaged in the column and row directions according to a predetermined reduction rate, and a simple method for comparing the positions of the outputs of the first and second storage means. a third storage means for selecting and storing a deletion position closest to the child deletion position, and obtaining a reduced character pattern by partially deleting a predetermined input character pattern based on the output of the third storage means; be.

[Operation] The output of the first storage means for storing positions where glyph features can be extracted and deleted is such that when reduction is performed by simple averaging, the position closest to the position to be deleted is selected and the column/row of dots is deleted. There is no unnecessary deletion, and the resulting pattern is beautiful.

[Embodiment] FIG. 1 is a diagram showing the configuration of a first embodiment of the present invention, in which 10 is a magnetic tape for storing the original dot pattern, 20 is a magnetic tape for storing the reduced character dot pattern, and 30 is a reduction ratio designation. A circuit for specifying a position to be deleted by simply averaging it in the column and row directions according to a predetermined reduction rate in accordance with a conventional circuit; 40 is a row direction deletion position determination circuit; 50 is a column direction deletion position determination circuit; 11°21 .31 is the buffer 1 memory, 12 is the dot pattern row direction feature extraction circuit, and 13 is the feature extraction circuit 1.
14 is a second storage section that stores the output of the simple average deletion position specifying circuit 30; 15 is a third storage section that stores the output of the first storage section 13 and the second storage section 14; 16 is a table that stores the output of the third storage section 15, and 17 is an alarm generation circuit that selects and stores the latter position that is close to the former position.
18 indicates a row direction dot deletion circuit which generates an alarm when the output of the first storage section 13 has a smaller number of positions than the output of the third storage section 14.

The inside of the column-direction deletion position determination circuit 5G has the same configuration as circuits 12 to 17. 2 shows a column-direction dot deletion circuit.

A case where the 24×24 dot pattern shown in FIG. 6 is reduced to a 16×16 pattern using the circuit configuration of FIG. 1 will be described. A dot pattern shown in FIG. 6 is stored on the magnetic tape 10, which is once stored one after another in the buffer memory 11 and then applied to the feature extraction circuit 12. The feature extraction circuit 12 extracts the features of the pattern by processing as described below. At this time, if the characters of the dot pattern are in Mincho font as shown in FIG. 6, the scales (decoration) are converted to white dots and processed. FIG. 2 is a diagram illustrating the process of reducing the original pattern. In FIG. 2A, the x mark indicates the converted white dot position. and feature extraction circuit 12
The rules of processing are that ``straight lines and blank spaces of 1 dot width cannot be deleted'' and ``dots other than straight lines and blank spaces of 2 dot width or more can be deleted'', and furthermore, by a circuit with the configuration described later, it is possible to delete in the row direction. The positional information to be deleted is determined, the position marked with a circle on the right side of FIG. 2 is set as a deletion candidate, and the positional information is stored in the first storage unit 13. On the other hand, the second storage unit 14 stores row direction deletion position information indicated by the numbers shown on the left side of FIG. 2A. Third storage unit 1
5, the first storage unit 13. The re-output of the second storage unit 14 is compared.

At the beginning of the comparison, the number of rows of position information on the left side of FIG. 2A is compared with the number of rows on the right side.

If it is the left side or the right side, proceed to the next step, and if it is the left side or the right side, a signal is sent to the alarm generation circuit 17 to perform the next process manually.

When the number of lines on the right side is large, the 11th deletion position on the right side that is closest to the deletion position on the left side is selected and stored in the third storage unit 15. For example, the line on the right side that is close to the 3rd line on the left side is 2, and the line on the right side that is closest to the 3rd line on the left side is 6. The line on the right near the line is 5. In this way, eight deletion positions are determined in the row direction, and the row in which the O marks are lined up in FIG. 2B is obtained.

Next, storage table 1 regarding the output of buffer memory 11
6. The deletion circuit 18 divides the predetermined row by 1.

Thereafter, deletion in the column direction is similarly selected in the circuit 50, and deletion of a predetermined row is executed in the deletion circuit 28.

FIG. 2C shows a reduced pattern of 16×16 dots obtained by the configuration of FIG.

FIG. 3 shows the main part of the circuit constituting the feature extraction circuit 12 in FIG. 1, that is, the circuit for determining the length of the dot row shown in FIG. 4. In FIG. 4, it is assumed that the dots inside the black frame indicate black dots, and the dots without the frame are white. Further, in FIG. 3, reference numerals 32 and 33 indicate flip-flops, 34 an inverter, 35 and 36 an AND circuit, 37 a linear detection signal terminal, 38 an end detection signal terminal, and 39 a reset signal terminal.

When applying the readout output of the buffer memory 11 to the feature extraction circuit 12, the dot pattern application terminal of the circuit shown in FIG.
Apply bit by bit serially. When they are both white, flip-flops 32, 33 are not set together. The AND circuit 35 is not opened. After the bits (both white) shown in FIG. Since 32 is black, 32 is set and the output becomes "1", and the output inverted by the inverter 34 causes the output of the AND circuit 35 to become "1". After a reset signal is applied to the reset signal terminal 39, when bit 2 in FIG. 4 is applied, the output of the AND circuit 35 similarly becomes "1". The same judgment is made for successive bit inputs, and ■
When @ is applied, the termination detection signal terminal 38 becomes "1" because of the inverter.The output of the AND circuit 35 becomes "1".
” The straight line length can be determined by the bit.

The feature detection circuit 12 includes another set of circuits shown in FIG. 3 for column direction detection. Then, by combining the address signal for reading the buffer 1 memory, the straight line detection signal, and the end detection signal, the dot columns and rows of the 0th order judgment result that can extract the features of the original pattern are determined according to the above rules. It is determined whether or not it can be deleted by checking the information, and a 0 mark is added as shown in FIG. 2A.

FIG. 5 is a diagram showing the configuration of a second embodiment of the present invention. When the character pattern is a Mincho typeface, the lines in the column direction are thicker than in the row direction, so the deletion position determination circuit 40 in the row direction only needs the deletion position table 16 (
, in the column direction, the entire configuration of the deletion position determination circuit 50 shown in FIG. 1 is used. According to this configuration, feature extraction of character patterns can be omitted in one direction, which has the effect of speeding up the processing.

[Effects of the Invention] In this way, according to the present invention, the characteristics of character patterns are extracted, the positions of deletion candidates are determined in advance, and then the positions of deletion candidates are compared with the deletion positions based on a simple average, and the official deletion is performed. Since the position is determined, the resulting reduced characters do not lose their shape and maintain accuracy.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the configuration of the first embodiment of the present invention, Fig. 2 is a diagram showing the process of reducing the original pattern, and Fig. 3 is a diagram showing the main parts of the configuration of the feature extraction circuit in Fig. 1. 4 is a diagram showing a part of the dot pattern for explaining the operation of FIG. 3, FIG. 5 is a diagram showing the configuration of the second embodiment of the present invention, and FIG. 6 is an example of the original dot pattern. 7 and 8 are diagrams showing examples of reduced patterns by conventional means. l〇-Magnetic tape 20 for storing the original dot pattern -
-Magnetic tape for storing reduced character dot patterns, 30--Reduction rate designation circuit 40--Row direction deletion position determination circuit 50--Column direction deletion position determination circuit 11, 21. 31--Buffer memory 12--Feature extraction circuit 13--First storage section 14-Second storage section 15-Third storage section 17--Alarm generation circuit Patent applicant Fujitsu Limited Agent Patent attorney Suzuki Eisuke Figure 2A Figure 2C Figure 6Figure 7

Claims (1)

[Claims] 1. In a method of partially deleting and reducing a character pattern represented by a dot matrix, straight lines and blank spaces of one dot width cannot be deleted in the column and row directions of the character pattern. , non-straight dots and 2
A first storage means that extracts and stores glyph features to be pre-processed based on the two rules that blanks larger than the dot width can be deleted; and position information to be deleted that is simply averaged in the column and row directions according to a predetermined reduction rate. and a third storage means that compares the positions of the outputs of the first and second storage means and selects and stores the deletion position closest to the simple average deletion position, A method for reducing a dot character pattern, characterized in that a reduced character pattern is obtained by partially deleting a predetermined input character pattern using an output from a storage means. 2. When comparing the output of the first storage means, which obtains the number of dot columns and lines that can be deleted by extracting glyph features, and the output of the second storage means, which obtains the position to be deleted according to the specified reduction ratio, the former is the latter. 2. The dot character pattern reduction method according to claim 1, wherein an alarm signal is generated when the value is larger.