JPS61157179A - Image pickup device - Google Patents

Abstract

PURPOSE:To delete a capacity dependency at the time of reading a signal of plural photoelectric converting elements by forming a thin film transistor on an (n) type silicon base material and making a (p) area of the base into the capacitor as a floating area. CONSTITUTION:A capacitor Cox is composed of an electrode 9, an insulation film 3 and a MOS construction of a (p) area, a bipolar transistor 14 is composed of respective parts of an (n)<+> area 7 as an emitter, a (p) area 6 as a base, an (n)<-> area as a corrector and an area 1 and the (p) area 6 is made into a floating area. In the reading action condition, an emitter and a wiring 8 is held at the floating condition and the corrector is held at a positive electric potential Vcc, through a wiring 10 a positive voltage Vr for reading is impressed to the electrode 9, and then, the positive electric potential Vr is divided for the capacity by an oxidizing film capacity Cox, a base and emitter junction capacity Cbe, and a base and corrector junction capacity Cbc, and a base electric potential is biased further in the forward direction by the condensed accumulation Vp, which occurs by a light irradiation.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a writing and imaging device using a photoelectric conversion element that collapses a photoelectric charge accumulation region whose potential is controlled via a capacitor.

The body imaging device according to the present invention includes, for example, an image input device,
It can also be applied to workstations, digital copying machines, word processors, barcode leagues, and photoelectric conversion object detection devices for autofocus in cameras, video cameras, 8mm cameras, and the like.

(Technical Background) In recent years, research on photoelectric conversion devices, particularly solid-state imaging devices, has been conducted mainly on two types: CCD type and MOS type.

A CCD type imaging device forms a potential well under an MO8 type capacitor electrode, and stores charges generated by incident light in this well. During readout, these potential wells are sequentially moved by a pulse applied to the electrode to accumulate the charges. It uses the principle that the generated charge is transferred to the output amplifier and read out. Therefore, the structure is relatively simple, the noise generated by the CCD itself is small, and low-light photography is possible.

On the other hand, the MO8 type imaging device accumulates charges generated by the incidence of light in each of the photodiodes made of pn junctions that constitute the light receiving section, and during readout, the MO8 switching transistors connected to each photodiode are sequentially turned on. The principle is that the accumulated charge is read out to the output amplifier. Therefore, C.C.
Although it is structurally more complex than the D type, it can have a large storage capacity and widen the dynamic range.

However, these conventional imaging devices have the following drawbacks, which have been a major hindrance in the pursuit of higher resolution in the future.

In a CCD type imaging device, 1) Since an MO8 type amplifier is installed on-chip as an output amplifier, a noticeable 1/f noise is generated on an image from the interface between silicon and silicon oxide film. 2) If the number of cells is increased to achieve higher density in order to achieve higher resolution, the maximum amount of charge that can be stored in one potential well decreases, making it impossible to maintain a dynamic range. 3) Since the structure is such that accumulated charges are transferred, if there is even one defect in a cell, charge transfer will stop there, resulting in poor manufacturing yield.

In the MO8 type imaging device, 1) a large signal voltage drop occurs during signal readout because a wiring capacitor is connected to each photodiode; 2) Large wiring capacity;
This generates a large amount of random noise. 3) M for scanning
Fixed pattern noise is mixed in due to variations in the parasitic capacitance of the OS switching transistors. This makes low-light imaging difficult, and when each cell is reduced in size to achieve higher resolution, the accumulated charge is reduced, but the wiring capacitance is not reduced so much that the S/N ratio is reduced.

As described above, the CCD type and MO8 type imaging devices have essential problems in achieving high resolution. New types of semiconductor imaging devices have been proposed for these imaging devices (Japanese Unexamined Patent Publication No. 56-150878;
-157073, JP-A-56-165473). - The method proposed here transfers the charge generated by light incidence to the control electrode (e.g. the base of a bipolar transistor, the static induction transistor SIT or M
(OS) transistor gate), and the accumulated charge is amplified using the amplification function of each cell and read out.

This method allows high output, wide dynamic range, low noise, and non-destructive readout, and has the potential for high resolution.

However, this method is basically an X-Y address method, and each cell has a basic structure that combines a conventional MO8 type cell with amplifying elements such as bipolar transistors and S/T transistors. There are limits to high resolution.

In addition, in conventional image sensors that can be read non-destructively, the output of each sensor cell is transferred to the wiring capacitance for the X-Y address and then read out from the output amplifier. It had the disadvantage that it deteriorated.

(Objective) The objective of the present invention is to provide an imaging device capable of solving the above-mentioned conventional problems, and in particular, to provide an imaging device that can eliminate capacitance dependence when reading signals from a plurality of photoelectric conversion elements. The purpose is

(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 and FIG. 2 are diagrams explaining the basic structure and operation of a photosensor cell that constitutes a photoelectric conversion device according to an embodiment of the present invention.

Figure 1(a) is a plan view of the optical sensor cell, Figure 1(b)
is a cross-sectional view taken along line A-A' of ζ, and FIG. 2 is its circuit. Note that common parts in each part are given the same number.

Although FIG. 1 shows a plan view of the aligned layout method, it goes without saying that the pixel shifting method (interpolation layout method) can also be used to increase the horizontal resolution.

This optical sensor cell has the following structure.

As shown in FIGS. 1(a) and 1(b), on an n-type silicon substrate 1, a passivation film 2; an insulating oxide film 3 made of a silicon oxide film; electrically insulating between adjacent photosensor cells. element isolation region 4 made of an insulating film or polysilicon film, etc.;
''region 5: On top of that, a region 6 that becomes the base of the bipolar transistor; an n+ region 7 that becomes the emitter of the bipolar transistor;
); a capacitor electrode 9 that faces the p-region 6 with the insulating film 3 in between and applies a pulse to the p-region 6 in a floating state; connected to the capacitor electrode 9; a wiring #10 formed on the back surface of the substrate 1; an n0 region 11 formed to make ohmic contact with the back surface of the substrate 1; and an electrode 12 for supplying the collector potential of the bipolar transistor. ing.

In the equivalent circuit shown in Fig. 2, capacitor Cox13
is composed of an MO8 structure including an electrode 9, an insulating film 3, and a p region 6, and the bipolar transistor 14 has an n+ region 7 as an emitter, a p region 6 as a base, an n- region 5 and a region 1 as a collector. It consists of each part. As is clear from these drawings, p region 6 is made into a floating region.

The equivalent circuit of the bipolar transistor 14 includes a base-emitter junction capacitance Cbe15, a base-emitter pn junction diode Dbe16, a base-collector junction capacitance Cbc17, a base-collector pn junction diode Dbc48, and a current source 19.20. expressed.

Next, the basic operation of the optical sensor cell having such a configuration will be explained.

The basic operation of this photosensor cell consists of a charge accumulation operation by light incidence, a read operation, and a refresh operation. In charge storage operation, for example, the emitter is grounded through wire 8 and the collector is biased to a positive potential through wire 12. Further, it is assumed that the base is in a reverse bias state with respect to the emitter 7 in advance.

In this state, when light 20 enters from the front side of the photosensor cell as shown in FIG. 1, electron-hole pairs are generated within the semiconductor.

Of these, electrons flow toward the n-region 1 because the n-region 1 is biased to a positive potential, but holes are rapidly accumulated in the p-region 6. Due to the accumulation of holes in the p region, the potential of the p region 6 gradually changes toward a positive potential. At this time, the potential Vp generated by the accumulation of holes excited by light in the base is given by V l) =Q/C. Q is the accumulated hole charge, and C is Cbc15 and Cbc1.
This is the junction capacitance obtained by adding 7.

What should be noted here is that as the resolution increases and the cell size decreases, the amount of light incident on each photosensor cell decreases, and the amount of accumulated charge Q decreases as well. As the cell size is reduced, the junction capacitance also decreases in proportion to the cell size, so the potential Vp generated by light incidence remains almost constant. This is because the optical sensor cell according to the present invention has an extremely simple structure, as shown in FIG. 1, and has the possibility of having an extremely large effective light-receiving surface.

The operation of reading out the voltage generated by the charges accumulated in p region 6 as described above to the outside will be described next.

In the read operation state, the emitter and wiring 8 are in a floating state,
The collector is held at a positive potential Vcc.

Now, if the potential when the base 6 is biased to a negative potential before light irradiation is -vb, and the accumulated voltage generated by light irradiation is Vp, then the pace potential is -vb +vp. . In this state, the wiring 10 is passed through the electrode 9.
When a positive voltage Vr for reading is applied to , this positive potential Vr is applied to the oxide film capacitance Cox13, the pace-emitter junction capacitance Cb e15, and the pace-collector junction capacitance Cbc.
17, and the pace potential becomes ox - vb + vp + cox + cbe + bo vr. Here, if the base potential is extra biased in the forward direction by Vbs shown in the following formula, -vb+ "" vr=vbsCox
+Cbe+Cbc The base potential is further biased in the forward direction as the accumulated voltage Vp generated by the light irradiation rises.

For this purpose, electrons are injected from the emitter to the pace, and since the collector potential is positive, they are accelerated by the drift electric field and reach the collector.

FIG. 3(a) is a graph showing the relationship between the read voltage and the accumulated voltage Vp when Vbs=0.6V.

According to the same graph, if the readout time is about 100 nsec or more (the time during which the readout voltage Vr is applied to the capacitor electrode 9), the linearity of the storage voltage Vp and the readout voltage can be ensured over a range of about 4 digits. , indicating that high-speed reading is possible.

In the above calculation example, the capacitance of the wiring 8 is 4 pF, and the junction capacitance C
This is the case where be+Cbc is 0.014 pF, and although the capacitance ratio is about 300 times different, the accumulated voltage Vp generated in p region 6 is not attenuated in any way, and due to the effect of bias voltage Vbs, it is extremely This indicates that a read operation was performed at high speed. This is because the amplification function of the optical sensor cell worked effectively. In this way, as the output voltage increases, fixed pattern noise and random noise caused by the output capacitance become relatively smaller, making it possible to obtain a signal with an extremely good S/N ratio.

First, when the bias voltage Vbs was set to 0.6■, 4
It has been shown that linearity on the order of orders of magnitude can be obtained with a high-speed readout time of about 100 nsec, and the relationship between this linearity, readout time, and bias voltage Vbs is shown in FIG. 3(b).

According to the graph shown in WCa diagram (b), the bias voltage V
bs, the read voltage is the desired percentage of the storage voltage (%)
It is possible to know the readout time required to reach . Therefore, once the readout time and required linearity are determined from the overall design of the imaging device, the required bias voltage Vbs can be determined using the graph in FIG. 3(b).

Another advantage of the optical sensor cell having the above configuration is that the holes accumulated in the p region 6 can be read out nondestructively because the probability of recombination of electrons and holes in the p region 6 is extremely small. This means that when the optical sensor cell according to the above configuration is configured as an imaging device, new functions can be provided in terms of system operation.

Furthermore, the time during which the accumulated voltage Vp can be held in the p region 6 is extremely long, and the maximum holding time is rather determined by the @ current thermally generated in the depletion layer of the junction. However, in the optical sensor cell described above, the region where the depletion layer extends is the n- region 5 with extremely low impurity concentration, so its crystallinity is good and few electron-hole pairs are thermally generated.

Next, the operation of refreshing the charges accumulated in p region 6 will be explained.

In the optical sensor cell having the above configuration, as already mentioned, the charges accumulated in the p region 6 are not eliminated by the read operation. Therefore, in order to input new optical information, a freshening operation is required to eliminate the previously stored charge. At the same time, it is necessary to charge the potential of p region 6, which is in a floating state, to a predetermined negative voltage.

In the optical sensor cell having the above configuration, the refresh operation is also performed by applying a positive voltage to the electrode 9 through the wiring 10, similarly to the read operation. At this time, the emitter is grounded through the wiring 8. The collector is grounded or at a positive potential through the electrode 12. FIG. 4(a) shows an equivalent circuit for refresh operation. However, an example is shown in which the collector side is grounded.

When a positive voltage Vrh is applied to the electrode 9 in this state, the base 22 has an oxide film capacitance C0X13 and a base
Due to the capacitance division of the emitter junction capacitance Cbe15 and the base-collector junction capacitance 1cbcl'7, a voltage is instantaneously applied as in the previous read operation. Due to this voltage, the base-emitter junction diode Dbe16 and the base-collector junction diode Dbc18 are forward biased and become conductive, and current begins to flow, and the pace potential gradually decreases.

At this time, the result of calculating the change in the potential of the base in a floating state is shown in FIG. 4(b) as an example of the time dependence of the base potential. The horizontal axis shows the elapse of time from the moment when the refresh voltage Vrh was applied to the electrode 9, that is, the refresh time, and the vertical axis shows the base potential, with the initial potential of the base being used as a parameter. The initial potential of the base is the moment when the refresh voltage Vrh is applied.
This is the potential exhibited by the base in a floating state, and is V r h
+Cox +Cbc and the charge stored in the base.

Looking at FIG. 4(b), it can be seen that the potential of the base always falls along a straight line on the semi-logarithmic graph after a certain period of time, regardless of the initial potential.

There are two ways in which the p region 6 can be charged to a negative potential by applying a positive voltage for a certain period of time through the MOS capacitor Cor and removing the positive voltage. One is p region 6
The holes with positive charge from n are mainly in the grounded state.
This is an operation in which negative charges are accumulated by flowing out into region 1.

On the other hand, electrons from the n-type region 7 and the n-region 1 flow into the p-region 6 and recombine with holes.
It is also possible to perform an operation in which negative charges are accumulated in the .

In the solid-state imaging device using the optical sensor cell according to the above configuration,
There is a complete refresh mode in which the base potential of all sensor cells is brought to zero volts by a refresh operation (in this case, 10 (see) is required in the example of Fig. 4(b)), although a certain constant voltage remains at the base potential. There are two transient refresh modes in which the fluctuation component due to the accumulated voltage Vp disappears (in this case, in the example of FIG.
e) Become a seaweed freshé pulse).

The choice of whether to operate in complete refresh mode or transient refresh mode is determined by the intended use of the imaging device.

The above is an explanation of the basic operations of the photosensor cell according to the above configuration, which consists of charge accumulation operation, readout operation, and refresh operation due to light incidence. Each operation is considered a basic cycle, and observation of incident light is performed to read out optical information. becomes possible.

As explained above, the basic structure of the optical sensor cell according to the above configuration is compared with the imaging device described in the above-mentioned Japanese Patent Application Laid-Open Nos. 56-150878, 1987-157073, and 1980-165473. It has an extremely simple structure and is fully compatible with future higher resolutions, and also has the advantages of low noise, high output, wide dynamic range, and non-destructive readout due to its excellent amplification function. It is preserved as is.

Next, a solid-state imaging device using the optical sensor cell described above will be described.

FIG. 5 is a circuit diagram of an embodiment of a solid-state imaging device according to the present invention, which is configured by two-dimensionally arranging the above-mentioned optical sensor cells.

A read pulse and a refresh pulse are applied to the basic photosensor cell 30 as the tenth photoelectric conversion element (this time indicates that the collector of the bipolar transistor is connected to the substrate and the substrate electrode), which is surrounded by the dotted line described above. horizontal line 31.31' for
31", a vertical shift register 32 constituting a readout means for generating a readout pulse, buffer MOS transistors 33.33', 33" between the vertical shift register 32 and the horizontal lines 31, 31', 31",
Buffer MO8) Transistor 33゜33', 33"
Terminal 34 for applying a pulse to the gate of the buffer MO8) for applying a refresh pulse; terminal 36 for applying a pulse to the gate of the transistor 35, 35', 35''; terminals 37, vertical lines 38, 38', 38", for reading out the stored voltage from the elementary photosensor cell 30.
Horizontal shift register 39 constituting readout means for generating pulses for selecting each vertical line, MO8) transistor 40.4 for gate for opening and closing each vertical line.
0', 40'', an output line 41 for reading out the accumulated voltage to the amplifier section, a MOS transistor 42 for refreshing the charge accumulated in the output line after reading out,
MOS transistor 42 terminal 43 for applying a refresh pulse, vertical line 38 in read operation
．． 38'.

MO to refresh the charge accumulated in 38"
S transistors 44, 44', 44", MOS) transistors 44, 44', 44", from terminals 45 for applying pulses to their gates, and vertical shift registers 32, which are shielded from light by At etc. Optical sensor cell 30 as a second photoelectric conversion element having conversion characteristics
A wiring 46 for applying a read pulse to the light-shielded optical sensor cell 30', a horizontal line 47 for applying a read pulse and a refresh pulse to the light-shielded optical sensor cell 30', a buffer MOS transistor 48 between the wiring 46 and the horizontal line 470,
Vertical lines 49, 49', 49'' for reading out the accumulated voltage from the photosensor cell 30', gate MOS transistors 50, 50' for opening and closing each vertical line,
50", output line 51 for reading out the accumulated voltage to the amplifier section, vertical line 49.49' in read operation
, 49'') transistors 52, 52', 52'', buffer MOS transistors 53 for applying refresh pulses, and refreshing the charges accumulated on the output line 51 after reading. MOS transistor 54
, a differential amplifier 55 for outputting the difference in signal voltage appearing on the output line 41 and the output line 51, an output line 56, etc., constitute an image sensor, and further includes terminals 34 and 36.
．． 37.43.45, a clock driver CKD that supplies drive pulses to the registers 32 and 39, and a clock generator CKG that supplies timing pulses to the clock driver CKD, the imaging apparatus is configured.

Visit, clock driver CKD, clock generator C
KG constitutes a control means.

The operation of this solid-state imaging device will be explained using the output pulse timing diagram of the clock driver CKD shown in FIG. 5 and FIG. 6.

In FIG. 6, section 61 is a refresher operation, section 6
2 corresponds to the storage operation, and section 63 corresponds to the readout operation.

Time 1. In this case, the substrate potential, that is, the collector potential 64 of the photosensor cell portion is kept at a ground potential or a positive potential, and FIG. 8 shows that it is kept at a ground potential. Regardless of whether it is a ground potential or a positive potential, as already explained, the only difference is the time required for refreshing, and there is no change in the basic operation. Potential 6 of terminal 45
5 is in a high state, MOS) transistor 44.4
4', 44".

52, 52', 52" are kept conductive and each party sensor cell is connected to a vertical line 38, 38', 38",
49. Grounded through 49', 49''.

Further, a voltage that makes the buffer MOS transistor conductive is applied to the terminal 36 as shown in the waveform 66, and the refresh buffer MO8 transistor 35.
35'.

35", 53 are in a conductive state. In this state, when a pulse is applied to the terminal 37 as shown in the waveform 67, a voltage is applied to the base of each optical sensor cell through the horizontal lives 31, 31', 31", 47. , as already explained, a refresh operation is entered and the previously stored charge is refreshed according to a complete refresh mode or a transient refresh mode. The pulse width of waveform 67 determines whether the mode is complete refresh mode or transient refresh mode.

At time t, the base of the transistor of each sensor cell becomes reverse biased with respect to the emitter, as described above, and the next storage period 62 is entered. In this refresh period 61, as shown in the figure, all other applied pulses are kept in a low state.

In the accumulation operation section 62, the substrate voltage, that is, the collector potential waveform 64 of the transistor is set to a positive potential. This allows electrons of the electron-hole pairs generated by light irradiation to quickly flow toward the collector side. However, keeping this collector potential at a positive potential is not an essential condition because the base is biased in the reverse direction with respect to the emitter, that is, images are taken with a negative potential.It is also basic to keep the collector potential at ground potential or a slightly negative potential. There is no change in the storage behavior.

In the storage operation state, the MOS transistors 44, 4
The potential 65 of the gate terminal 45 of 4', 44'', 52.52', 52'' is kept high as in the refresh period, and each M6B transistor is kept conductive. For this reason, the emitter of each photosensor cell is aligned with vertical lines 38.38', 38", 49.49'
, 49". When holes are accumulated in the pace due to strong light irradiation and it becomes saturated, that is, when the base potential becomes forward biased with respect to the emitter potential (ground potential). , the holes are vertical lines 38.38', 38", 49.49',
49", where the base potential change stops,
will be clipped. Therefore, the emitters of photosensor cells adjacent to each other in the vertical direction are aligned in the vertical line as
,3s',.

38", if the vertical lines 38, 38' and 38" are grounded in this way, no pluming phenomenon will occur.

To avoid this pluming phenomenon, even if the MOS transistors 44, 44', 44'' are in a non-conductive state and the vertical lines 38, 38', 38'' are in a floating state, the substrate potential, that is, the collector potential 64, is slightly lowered. This can also be achieved by setting the potential to be negative, and when the pace potential changes to a positive potential due to accumulation of holes, it flows toward the collector side before the emitter.

Following the accumulation section 62, time 1. This becomes the read section 63. This time 1. In , the MOS transistor 44
．． The potential 65 of the gate terminal 45 of 44', 44", 52.
The potential 68 of the gate terminals of S transistors 33, 33', 33", and 48 is set to high, and each MOS)
Makes the transistor conductive. However, this gate terminal 3
The timing to set the potential 68 of No. 4 to high is at time t,
It is not a necessary condition that the time is earlier than that.

At time t4, among the outputs of the vertical shift register 32, the address signal connected to the horizontal line 31 and the address signal connected to the wiring 46 are the same as the waveform 69 (hi
At this time, since the MOS transistors 33 and 48 are conductive, the three photosensor cells connected to the horizontal line 31 and the three photosensor cells connected to the horizontal line 47 are read out. This readout operation is as already described above, and the signal voltage generated by the signal charge accumulated in the pace region of each photosensor cell remains as it is on the vertical line 38, 38'.

38" appears.

On the other hand, from the optical sensor cell 30' which is shielded from light at the same time as , a signal voltage corresponding to the dark voltage is transmitted along the vertical line 49.49.
', 49''. At this time, the pulse width of the pulse voltage from the vertical shift register 32 is such that the read voltage with respect to the accumulated voltage is as shown in FIG.
The pulse width is set to maintain sufficient linearity. Further, as explained above, the pulse voltage is adjusted so that a forward bias is applied to the emitter by Vnias.

Also, in the embodiment of the present invention, these pulses 69.69',
69" is 70.70', 70".

It is characterized in that it is configured to maintain a high level while reading out one line of elements using 71 pulses is completed.

Then, at time t, among the outputs of the horizontal shift register 39, M connected to the vertical lines 38 and 49
Only the output to the gates of transistors 40 and 50 (OS) becomes high as shown in waveform 70, MOS transistors 40 and 50 become conductive, and the output signal enters differential amplifier 55 through output lines 41 and 51,
A signal voltage obtained by subtracting the difference between these, ie, the dark voltage, is output from the output terminal 56. After the signals are read out in this way, signal charges due to the wiring capacitance remain in the output lines 41 and 51, so at time t, the MOS)
A pulse as shown in the pulse waveform 71 is applied to the gate terminals 43 of the transistors 42 and 54, and the MOS transistor 4
2 and 54 are made conductive and output lines 41 and 5 are connected.
1 is grounded, and this remaining signal charge is transferred to the ground. Similarly, the switching MO
8) Transistor 40', 40'', 50.50'
, 50" are sequentially connected to the vertical line 38',
Read the signal outputs of 38", 49.49', 49". After reading the signals from each horizontally arranged line of photosensor cells in this way, the vertical lines 38, 38'
, 38", 49.49', and 49" have residual signal charges due to their wiring capacitances, similar to the output line 41, so each vertical line 38.38'.

M connected to 38", 49.49', 49"
OS) transistor 48.48', 48", 52.
52', 52'', and waveform 6 is applied to its gate terminal 45.
As shown by 5, it is set to high and conductive to refresh this residual signal charge.

Then, at time t, the vertical shift register 32
Of the outputs, the output connected to the horizontal line 31' and the wire 46 become the waveform 69' (high and 4), and the accumulated voltage of each photosensor cell connected to the horizontal lines 31' and 47 is 38.38'.

38", 49.49', 49". Thereafter, by the same operation as the sequential conduction, the output terminal 5
A signal was read from 6 and the signal was read out.

In this embodiment, as described above, a high-level address signal is applied to the horizontal address line during IH reading, and a light-shielded optical sensor cell 30' is provided. This will be explained in more detail using Figures and Figure 6.

The output waveform 69 of the vertical shift register is the horizontal line 31
The signal voltage read out to the vertical lines 38, 38', 38'' is transferred to the buffer MO81-transistor 40.゜40', 4
When 0'' is sequentially guided and transferred to the output line 41, the voltage does not drop due to the division ratio of the wiring capacitance between the vertical lines 38, 38' and 38'' and the output line 41.

That is, the signal voltages read out to the vertical lines 38, 38', 38'' appear on the output line /41 as they are.

This is exactly the same in the readout operation of the light-shielded optical sensor cell 30'. Therefore, there is an effect that no gain reduction occurs due to tolerance division. However, at this time, among the photosensor cells 30 on the right side, the readout pulse takes a longer time, so the output from the photosensor cells on the right side becomes larger even though the storage time is the same.

This phenomenon similarly occurs for the light-shielded optical sensor cell 30'. Therefore, the differential amplifier 55 of this embodiment has the effect of eliminating this phenomenon and also subtracting the dark voltage signal.

Still, in this embodiment, the same optical sensor cell 30 used in the sensor section is used as the light-shielded second optical sensor cell 30', and the second optical sensor cell 30' is the same as the sensor section 30. Provided on the substrate. by this,
A change in dark current due to a change in the temperature of the sensor unit 30 can be approximately detected as a change in dark current due to a change in temperature of the second photosensor cell 30'.

Therefore, the output of the differential amplifier 55 is proportional to the intensity of the incident light, and becomes an optical information signal that has a large output, a large S/N ratio, and is not affected by temperature changes.

It goes without saying that the present invention can also be applied to line sensors.

Also, as an operator stage, it not only performs subtraction, but also performs subtraction.
Predetermined weights may be added to the outputs of the first and second photoelectric conversion elements and then subtracted.

Further, although the case where a signal is applied to a horizontal line as an address signal is shown, the present invention is not limited to this.

(Effects) As described in detail above, since the imaging device according to the present invention can configure one pixel with one transistor, it is extremely easy to increase the density, and phenomena such as pluming and smearing are reduced. It also has high sensitivity and can have a wide evening dynamic range.

In addition, since the optical sensor cell itself has an amplification function,
A large output voltage can be obtained.

Furthermore, the imaging device according to the present invention has a simple configuration and can prevent the output signal level from decreasing due to capacitance division.

[Brief explanation of the drawing]

Figure 1(a) is a plan view of the optical sensor cell, Figure 1(b)
2 is an equivalent circuit diagram of the optical sensor cell, and FIG. 3 (a
) is a diagram showing the relationship between the read voltage and the accumulated voltage Vp when the bias voltage Vbs = 0.6 V,
FIG. 3(b) is a diagram showing the relationship between the readout time and the bias voltage Vbs, FIG. 4(a) is an equivalent circuit diagram of a photosensor cell during refresh operation, and FIG. 4(b) is a diagram showing the relationship between the readout time and the bias voltage Vbs. FIG. 5 is a circuit diagram of an embodiment of a solid-state imaging device according to the present invention in which the above-mentioned optical sensor cells are arranged two-dimensionally; FIG. 6 is a diagram illustrating the operation of this embodiment. This is a timing chart for 6...Base region 7...Emitter region 8...Emitter electrode 9...Capacitor as pole 30...Photosensor cell (10th photoelectric conversion element) 30'
... Optical sensor cell (second photoelectric conversion element) 55 ...
Differential amplifier application Person Canon Co., Ltd.

Claims (1)

[Claims] A plurality of photoelectric conversion elements accumulate carriers generated by photoexcitation in the control electrode area by controlling the potential of the control electrode area of the semiconductor transistor through a capacitor, and a predetermined plurality of photoelectric conversion elements are used to read out signals from each photoelectric conversion element. control means for controlling the photoelectric conversion element to sequentially read out the outputs of the predetermined plurality of photoelectric conversion elements while applying an address signal specifying a photoelectric conversion element to be read to the control electrode of the photoelectric conversion element. Imaging device.