JPS61154034U - - Google Patents
Info
- Publication number
- JPS61154034U JPS61154034U JP3636785U JP3636785U JPS61154034U JP S61154034 U JPS61154034 U JP S61154034U JP 3636785 U JP3636785 U JP 3636785U JP 3636785 U JP3636785 U JP 3636785U JP S61154034 U JPS61154034 U JP S61154034U
- Authority
- JP
- Japan
- Prior art keywords
- lock state
- phase
- locked loop
- circuit
- radio receiver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3636785U JPS61154034U (cs) | 1985-03-14 | 1985-03-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3636785U JPS61154034U (cs) | 1985-03-14 | 1985-03-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61154034U true JPS61154034U (cs) | 1986-09-24 |
Family
ID=30541479
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3636785U Pending JPS61154034U (cs) | 1985-03-14 | 1985-03-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61154034U (cs) |
-
1985
- 1985-03-14 JP JP3636785U patent/JPS61154034U/ja active Pending