JPS61150244A - Microwave monolithic ic - Google Patents

Microwave monolithic ic

Info

Publication number
JPS61150244A
JPS61150244A JP59272409A JP27240984A JPS61150244A JP S61150244 A JPS61150244 A JP S61150244A JP 59272409 A JP59272409 A JP 59272409A JP 27240984 A JP27240984 A JP 27240984A JP S61150244 A JPS61150244 A JP S61150244A
Authority
JP
Japan
Prior art keywords
circuit
bias circuit
substrate
bridge
active element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59272409A
Other languages
Japanese (ja)
Other versions
JPH0473626B2 (en
Inventor
Fumiaki Emori
江森 文章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59272409A priority Critical patent/JPS61150244A/en
Publication of JPS61150244A publication Critical patent/JPS61150244A/en
Publication of JPH0473626B2 publication Critical patent/JPH0473626B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5381Crossover interconnections, e.g. bridge stepovers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To enable the reduction in chip size and in cost by a method wherein lines included in a DC bias circuit which drives the active element are formed by using bridge wirings called air bridges at least at one point. CONSTITUTION:The DC bias circuit 4 having an active element 2, matching circuits 3, and bridge wiring part 5 is formed on the main surface of a semi- insulation compound substrate 1. In this bias circuit 4, the line part arranged in parallel with the direction of microwave propagation in the matching circuits 3 is formed out of a bridge wiring 5 called the air bridge having spaces between the line and the substrate 1 by levitation from the main surface of the substrate 1. Since a layer of low dielectric constant is interposed between the circuit line and the substrate, the capacitance between the matching circuit 3 and the bias circuit 4 is reduced, and the distance from the matching circuit 3 and the bias circuit 4 becomes short. Accordingly, the chip size of a MMIC can be reduced, and its reduction in cost is realized, resulting in the improvement in integration degree.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はガリウム砒素、インジウムリン(以下GaAs
、InPと記す)等の半絶縁性化合物基板上に形成され
たマイクロ波モノリシック集積回路(以下MMICと記
す〕に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to gallium arsenide, indium phosphide (hereinafter referred to as GaAs).
The present invention relates to a microwave monolithic integrated circuit (hereinafter referred to as MMIC) formed on a semi-insulating compound substrate such as InP).

〔従来の技術〕[Conventional technology]

この種のMMICは、半絶縁性化合物基板上に電界効果
トランジスタ(以下PETと記す)構造を有する能動素
子と、゛との能動素子の機卵會発揮させる受動素子によ
る整合回路と、電源供給のバイアス回路等とから構成さ
れる。このMMICは、ハイブリッド型集積回路に比べ
て高周波特性に優れ、小型・低価格化が可能であp、か
つ信頼性も高いため、特に数IQGHz領域に於いて実
用化が望まれている。
This type of MMIC consists of an active element having a field-effect transistor (hereinafter referred to as PET) structure on a semi-insulating compound substrate, a matching circuit consisting of a passive element that takes advantage of the functionality of the active element, and a power supply. It consists of a bias circuit, etc. This MMIC has excellent high frequency characteristics compared to hybrid integrated circuits, can be made smaller and cheaper, and has high reliability, so its practical use is particularly desired in the several IQGHz range.

従来のMMICにおいては、整合回路と、バイアス回路
などの整合回路以外の回路とが、半絶縁性化合物基板上
に一様に密着して形成されていたので、特に整合回路以
外の回路は、レイアウト上の制約から整合回路内のマイ
クロ波伝搬方向と並行に線路全配置する工うに、特性改
善と相反するようなレイアウトを強いられていた。
In conventional MMICs, matching circuits and circuits other than matching circuits such as bias circuits are formed uniformly and closely on a semi-insulating compound substrate. Due to the above constraints, in order to arrange all the lines parallel to the direction of microwave propagation in the matching circuit, a layout that conflicts with improving the characteristics has been forced.

第2図は従来のMMICの構成例の斜視図である。FIG. 2 is a perspective view of a configuration example of a conventional MMIC.

このMMIeは半絶縁性化合物基板lの主表面上に能動
素子2、整合回路3お工び直流バイアス回路4が形成さ
れて構成されている。この直流バイアス回路4内は、回
路のレイアウト上の制約によって、整合回路3内のマイ
クロ波伝搬方向に並行にその線路6が配列され、この線
路6Fs、整合回路3と同一基板1の表面に一様に密着
して形成されている。
This MMIe is constructed by forming an active element 2, a matching circuit 3, and a DC bias circuit 4 on the main surface of a semi-insulating compound substrate l. In this DC bias circuit 4, lines 6 are arranged in parallel to the microwave propagation direction in the matching circuit 3 due to circuit layout constraints, and the lines 6Fs are aligned on the same surface of the substrate 1 as the matching circuit 3. They are formed in close contact with each other.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

一般に、ICの低価格化のためにはICのチップサイズ
を小さくする事が重要であり、MMICも最小限のチッ
プサイズで回路を形成しなくてはならないが、従来のM
MI(、’では、バイアス回路4の形状が能動素子2の
マイクロ波機In発揮する整合回路3に影御全及ぼさな
いように、相互の回路を離す必要があるため、そのチッ
プサイズが大きくなり、低価格化を妨げるという欠点が
あった。
In general, it is important to reduce the IC chip size in order to lower the price of ICs, and MMICs also have to form circuits with the minimum chip size.
In MI(,', it is necessary to separate the circuits from each other so that the shape of the bias circuit 4 does not completely affect the matching circuit 3 that exhibits the microwave function of the active element 2, so the chip size becomes large. , which had the disadvantage of hindering price reduction.

本発明の目的は、このような欠点全解決し、チップサイ
ズケ小型化し、低価格化したMMI(、”i提供するこ
とにある。
The object of the present invention is to provide an MMI which overcomes all of these drawbacks, reduces the chip size, and reduces the cost.

〔問題点を解決するための手段〕 本発明の構成は、半絶縁性化合物基板の主表面上に少な
くとも能動素子および直流バイアス回路・全形成したマ
イクロ波モノリシック集積回路に於いて、前記能動素子
を駆動する直流バイアス回路に含まれる線路が少なくと
も一箇所エアーブリッジと呼ばれる橋状配線音用い′て
形成されることにより、給電回路にマイクロ波信号の漏
洩全防止したこと全特徴とする。
[Means for Solving the Problems] The configuration of the present invention is such that in a microwave monolithic integrated circuit in which at least an active element and a DC bias circuit are entirely formed on the main surface of a semi-insulating compound substrate, the active element is The main feature is that the line included in the DC bias circuit to be driven is formed using a bridge-like wiring called an air bridge in at least one place, thereby completely preventing leakage of microwave signals to the power supply circuit.

〔実施例〕〔Example〕

次に本発明について図面全参照して詳細に説明する。 Next, the present invention will be explained in detail with reference to all the drawings.

第1図は本発明の一実施例の斜視図である。本実施例は
、半絶縁性化合物基&1の主表面上に能動素子2、整合
回路3および橋状配線部5を有する直流バイアス回路4
が形成されて構成される。
FIG. 1 is a perspective view of an embodiment of the present invention. In this embodiment, a DC bias circuit 4 has an active element 2, a matching circuit 3, and a bridge-like wiring section 5 on the main surface of a semi-insulating compound group &1.
is formed and composed.

このバイアス回路4内で整合回路3内のマイクロ波伝搬
方向と並行に配置する線路部は、半絶縁性化合物基板1
の主表面上から浮かして線路と基板1間に空間を有する
エアーブリッジと呼ばれる橋状配線5によって形成され
る。
In this bias circuit 4, a line portion arranged parallel to the microwave propagation direction in the matching circuit 3 is formed by a semi-insulating compound substrate 1.
It is formed by a bridge-like wiring 5 called an air bridge that floats above the main surface of the board 1 and has a space between the line and the substrate 1.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、バイアス回路4
の大部分全基板1より浮かして構成できるので、回路内
の線路と基板間に誘電率の低い層をはさむ事咳なり、そ
のため整合回路3とバイアス回路4との間のキャパシタ
ンスが低減され、整合回路3とバイアス回路4の距離を
短くすることが可能となり、MMICのチップサイズを
小さくする事ができる。これに伴ってその低価格化が実
現され、また集積度上向上させて、IC1l’lのレイ
アウトの自由度も一段と高められるという効果がある。
As explained above, according to the present invention, the bias circuit 4
Since most of the circuit can be configured to be floating above the entire substrate 1, it is not necessary to sandwich a layer with a low dielectric constant between the line in the circuit and the substrate. Therefore, the capacitance between the matching circuit 3 and the bias circuit 4 is reduced, and the matching It becomes possible to shorten the distance between the circuit 3 and the bias circuit 4, and the chip size of the MMIC can be reduced. This has the effect of lowering the cost, improving the degree of integration, and further increasing the degree of freedom in the layout of the IC 1l'l.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の斜視図、第2図は従来のM
MICの構成例の斜視図である。図において 1・・・半絶縁性化合物、2・・・能動素子、3・・・
整合回路、4・・・バイアス回路、5・・・バイアス回
路の橋状配線部、6・・・バイアス回路内線路でめる。 ・二、。
FIG. 1 is a perspective view of one embodiment of the present invention, and FIG. 2 is a conventional M
FIG. 2 is a perspective view of a configuration example of an MIC. In the figure, 1... semi-insulating compound, 2... active element, 3...
Matching circuit, 4... Bias circuit, 5... Bridge-like wiring portion of the bias circuit, 6... Line within the bias circuit. ·two,.

Claims (1)

【特許請求の範囲】[Claims] 半絶縁性化合物基板の主表面上に少なくとも能動素子お
よび直流バイアス回路を形成したマイクロ波モノリシッ
ク集積回路に於いて、前記能動素子を駆動する前記直流
バイアス回路に含まれる線路が、少なくとも一箇所エア
ーブリッジと呼ばれる橋状配線を用いて形成することに
より、マイクロ波信号の漏洩を防止した事を特徴とする
マイクロ波モノリシック集積回路。
In a microwave monolithic integrated circuit in which at least an active element and a DC bias circuit are formed on the main surface of a semi-insulating compound substrate, a line included in the DC bias circuit that drives the active element is connected to an air bridge at least at one point. A microwave monolithic integrated circuit characterized by preventing leakage of microwave signals by forming it using bridge-like wiring called .
JP59272409A 1984-12-24 1984-12-24 Microwave monolithic ic Granted JPS61150244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59272409A JPS61150244A (en) 1984-12-24 1984-12-24 Microwave monolithic ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59272409A JPS61150244A (en) 1984-12-24 1984-12-24 Microwave monolithic ic

Publications (2)

Publication Number Publication Date
JPS61150244A true JPS61150244A (en) 1986-07-08
JPH0473626B2 JPH0473626B2 (en) 1992-11-24

Family

ID=17513497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59272409A Granted JPS61150244A (en) 1984-12-24 1984-12-24 Microwave monolithic ic

Country Status (1)

Country Link
JP (1) JPS61150244A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593557U (en) * 1982-06-30 1984-01-11 三菱電機株式会社 Monolithic microwave integrated circuit
JPS61305U (en) * 1984-06-06 1986-01-06 株式会社東芝 microstrip line

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593557B2 (en) * 1980-04-08 1984-01-24 川崎製鉄株式会社 Radial cell for plating strips
JPS5747768A (en) * 1980-09-05 1982-03-18 Murata Manufacturing Co Piezoelectric ceramic composition

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593557U (en) * 1982-06-30 1984-01-11 三菱電機株式会社 Monolithic microwave integrated circuit
JPS61305U (en) * 1984-06-06 1986-01-06 株式会社東芝 microstrip line

Also Published As

Publication number Publication date
JPH0473626B2 (en) 1992-11-24

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