JPS61149442U - - Google Patents

Info

Publication number
JPS61149442U
JPS61149442U JP3273685U JP3273685U JPS61149442U JP S61149442 U JPS61149442 U JP S61149442U JP 3273685 U JP3273685 U JP 3273685U JP 3273685 U JP3273685 U JP 3273685U JP S61149442 U JPS61149442 U JP S61149442U
Authority
JP
Japan
Prior art keywords
stereo
intermediate frequency
stereo demodulation
predetermined voltage
demodulation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3273685U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3273685U priority Critical patent/JPS61149442U/ja
Publication of JPS61149442U publication Critical patent/JPS61149442U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Superheterodyne Receivers (AREA)
  • Stereo-Broadcasting Methods (AREA)
JP3273685U 1985-03-07 1985-03-07 Pending JPS61149442U (US07860544-20101228-C00003.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3273685U JPS61149442U (US07860544-20101228-C00003.png) 1985-03-07 1985-03-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3273685U JPS61149442U (US07860544-20101228-C00003.png) 1985-03-07 1985-03-07

Publications (1)

Publication Number Publication Date
JPS61149442U true JPS61149442U (US07860544-20101228-C00003.png) 1986-09-16

Family

ID=30534527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3273685U Pending JPS61149442U (US07860544-20101228-C00003.png) 1985-03-07 1985-03-07

Country Status (1)

Country Link
JP (1) JPS61149442U (US07860544-20101228-C00003.png)

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