JPS61141228A - Fm demodulator - Google Patents

Fm demodulator

Info

Publication number
JPS61141228A
JPS61141228A JP26283784A JP26283784A JPS61141228A JP S61141228 A JPS61141228 A JP S61141228A JP 26283784 A JP26283784 A JP 26283784A JP 26283784 A JP26283784 A JP 26283784A JP S61141228 A JPS61141228 A JP S61141228A
Authority
JP
Japan
Prior art keywords
circuit
data
output
signal
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26283784A
Other languages
Japanese (ja)
Inventor
Nobuya Nagao
長尾 暢也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP26283784A priority Critical patent/JPS61141228A/en
Publication of JPS61141228A publication Critical patent/JPS61141228A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To apply proper demodulation without any variance in the center frequency by sampling and holding only the mean DC level of an output data period of an FM demodulator and using the result as an AFC voltage to recover the DC component of the FM demodulation output. CONSTITUTION:A detection output 12 of the FM detection circuit 11 is led to a data identification circuit 20 and a switch circuit 21, and an output reproducing data 22 of the circuit 20 is fed to a timing signal generating circuit 23. The circuit 23 generates a timing pulse 24 corresponding to the data period to turn on the circuit 21 for the data period only, a detection output 12 is led to an LPF13 and the mean DC level 25 of the data period is held. The level 25 is fed back negatively to a tuner circuit 2 as an AFC voltage 7 via a differential amplifier 15. Further, the level 25 is used also as a reference bias of the circuit 20, the threshold value for data identification is optimized and the reproduction of accurate data is attained.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、音声データ、映像信号等が時分割で伝送さ
れてくる変調信号を復調するためのFM復調器に関する
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an FM demodulator for demodulating a modulated signal in which audio data, video signals, etc. are transmitted in a time-division manner.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

衛星放送に適用される信号伝送形態のひとつとして時分
割伝送が有力である。っ第3図は上記時分割伝送の一種
を示すものであり、1水平期間において、音声データ、
FM変調されたY信号、(C−Y)信号が時分割構成さ
れている。このときの音声データはベースバンドのディ
ジタルデータとなっている。
Time division transmission is one of the most popular signal transmission formats applied to satellite broadcasting. Figure 3 shows a type of time-division transmission, in which audio data,
The FM modulated Y signal and (C-Y) signal are configured in a time division manner. The audio data at this time is baseband digital data.

第4図に従来のFM復調器の構成を示す。変調信号1は
チューナ回路2に供給され、任意のチャンネルに対応す
る変調信号3が選局出力される。
FIG. 4 shows the configuration of a conventional FM demodulator. A modulated signal 1 is supplied to a tuner circuit 2, and a modulated signal 3 corresponding to an arbitrary channel is selectively output.

この選局はチーーニング電圧発生回路4の出力するチュ
ーニング電圧5およびAFC回路6の出力するAFC電
圧7の双方をAFC重畳回路17において重畳して得ら
れる選局信号8によシ、チューナ回路2内の局部発振器
9の発振周波数を可変として行われる。選局された変調
信号3はAGC増幅器10により利得調整された後、F
M検波回路11に導びかれる。FM検波回路11により
復調された検波出力12はAFC回路6に導びかれる。
This tuning is carried out by the tuning signal 8 obtained by superimposing both the tuning voltage 5 output from the tuning voltage generation circuit 4 and the AFC voltage 7 output from the AFC circuit 6 in the AFC superimposition circuit 17, and is generated within the tuner circuit 2. This is done by making the oscillation frequency of the local oscillator 9 variable. The selected modulated signal 3 is gain-adjusted by the AGC amplifier 10, and then F
The signal is guided to the M detection circuit 11. A detection output 12 demodulated by the FM detection circuit 11 is guided to the AFC circuit 6.

AFC回路6では検波出力圧を低域F波器(L P F
 ) 13によシ平滑化することによシ映像成分の平均
電圧14を得、この電圧14を差動増幅器15に供給す
る。
The AFC circuit 6 uses the detected output pressure as a low-frequency F wave generator (L P F
) 13 to obtain an average voltage 14 of the video component, and this voltage 14 is supplied to a differential amplifier 15.

差動増幅器15は所定の基準バイアス16と前記平均電
圧14とを比較し、差に応じた前記AFC電圧7を出力
する。このAFC電圧7は前述したようKAFC重畳回
路17においてチーーニング電圧5と重畳され、チュー
ナ回路2内の局部発振器9に負帰還される。これによシ
、チューナ回路2の出力する変調信号の中心周波数の安
定化が図られ、適正な復調が行われる。
A differential amplifier 15 compares a predetermined reference bias 16 and the average voltage 14, and outputs the AFC voltage 7 according to the difference. As described above, this AFC voltage 7 is superimposed with the tuning voltage 5 in the KAFC superimposition circuit 17, and is negatively fed back to the local oscillator 9 in the tuner circuit 2. As a result, the center frequency of the modulated signal output from the tuner circuit 2 is stabilized, and proper demodulation is performed.

しかしながら、第4図に示した従来のFM復調器を用い
て、第3図に示した時分割変調信号を復調しようとした
場合には、映像信号によって中心周波数が変動するため
、音声データの直流成分も変動してしまい適正なる音声
データの復調ができなくなってしまうという問題点があ
った。
However, when trying to demodulate the time-division modulated signal shown in Figure 3 using the conventional FM demodulator shown in Figure 4, the center frequency varies depending on the video signal, so There was a problem in that the components also fluctuated, making it impossible to properly demodulate audio data.

〔発明の目的〕[Purpose of the invention]

本発明は上記問題点に鑑み成されたものであり時分割変
調信号を復調する様に、中心周波数の変動をなくし、適
正に音声データの復調を行うことを可能とするFM復調
器を提供することを目的とする。
The present invention has been made in view of the above problems, and provides an FM demodulator that eliminates fluctuations in the center frequency and can properly demodulate audio data, like demodulating a time-division modulated signal. The purpose is to

〔発明の漿要〕[Summary of the invention]

本発明のFM復調器は、FM復調器の出力のデータ期間
の平均直流レベルのみを、サンプルホールドしてその電
圧をAFC電圧として用いることKよfi、FM復調出
力の直流成分を再生することによシ、中心周波数の変動
なく適正なる復調動作を行うものであるう 〔発明の実施例〕 以下、図面に基づいて本発明のFM復調回路の一実施例
を説明する。第1図に本発明の一実施例に係るFM復調
器の構成を示す。第4図に示したFM復調器と同一部分
には同一番号を付しその説 、味 明は省略する。FM検波回路1】の出力する検波出力1
2ハデ一タ識別回路(データスライサ)20およびスイ
ッチ回路21へ導びかれる。前記データスライサ加の出
力する再生データnはタイミング信号発生回路乙に供給
されるウタイミング発生回路3はデータ期間に対応した
タイミングパルススを発生し、これによりスイッチ回路
21の開閉制御が行われ、前記検波出力12の低域P波
器13への供給の有無が制御される。第2図は前記タイ
ミングパルススのタイミングチャートを示しており、ス
イッチ21はデータ期間のみONとなシ、検波出力12
が低域P波器13へ導びかれ、低域F波器13にデータ
期間の平均直流レベル5が充電される。上記データ期間
以外はスイッチ21はOFFとなっており、検波出力1
2は低域戸波器13には供給されない。この期間におい
ては低域p波器13の放電路が速断され、前述のデータ
期間の平均直流レベルがか保持される。こうして得られ
た平均直流レベルδは差動増幅器15を介してAFC電
圧7としてチューナ回路2へ負帰還される。また前記平
均直流レベル5はデータスライサ(イ)の基準バイアス
としても用いられ、これによりデータ識別のためのしき
い値は最適化され、データ識別上の誤り率を低下させる
ことかできる。
The FM demodulator of the present invention can sample and hold only the average DC level of the data period of the output of the FM demodulator and use that voltage as an AFC voltage, and can reproduce the DC component of the FM demodulated output. Therefore, proper demodulation operation can be performed without fluctuation of the center frequency. [Embodiment of the Invention] An embodiment of the FM demodulation circuit of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of an FM demodulator according to an embodiment of the present invention. The same parts as those of the FM demodulator shown in FIG. 4 are given the same numbers, and their explanation will be omitted. Detection output 1 output from FM detection circuit 1
The signal is guided to a two-bit data identification circuit (data slicer) 20 and a switch circuit 21. The reproduced data n outputted from the data slicer is supplied to a timing signal generation circuit B. The timing generation circuit 3 generates a timing pulse corresponding to the data period, thereby controlling the opening and closing of the switch circuit 21. Whether or not the detection output 12 is supplied to the low-pass P wave generator 13 is controlled. FIG. 2 shows a timing chart of the timing pulses, in which the switch 21 is ON only during the data period, and the detection output 12 is
is guided to the low-pass P-wave device 13, and the low-pass F-wave device 13 is charged with the average DC level 5 during the data period. The switch 21 is OFF except for the above data period, and the detection output is 1.
2 is not supplied to the low frequency door transducer 13. During this period, the discharge path of the low-pass p-wave generator 13 is quickly cut off, and the average DC level of the data period described above is maintained. The average DC level δ thus obtained is negatively fed back to the tuner circuit 2 as an AFC voltage 7 via the differential amplifier 15. The average DC level 5 is also used as a reference bias for the data slicer (a), thereby optimizing the threshold for data identification and reducing the error rate in data identification.

〔発明の効果〕〔Effect of the invention〕

以上、本発明のFM復調器によれば、データ期間の直流
レベルを再生することにより、データの中心周波数を一
定に保持することができ、映像信号の平均レベル(依存
しない適正なる音声の復調が果せる。すなわち、映像信
号の変化によるデータのアイ開口率の劣化を防ぐことが
でき、正確なデータ再生を行うことができる。
As described above, according to the FM demodulator of the present invention, by reproducing the DC level of the data period, the center frequency of the data can be held constant, and the average level of the video signal (appropriate audio demodulation independent of That is, it is possible to prevent deterioration of the data eye opening ratio due to changes in the video signal, and accurate data reproduction can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係るFM復調器の構成図、
第2図はタイミングパルスのタイムチャート、第3図は
時分割変調信号の模式図、第4図は従来のFM復調器の
構成図である。 l・・・変調信号、  2・・・チューナ回路、4・・
・チェー二ング電圧発生回路、 5・・・チェーニング電圧、6・・・AFC回路、7・
・・AFC電圧、8・・・選局信号、10・・・AGC
増幅器、11・・・FM検波回路、12・・・検波出力
、13・・・低域戸波器。 l5・・・差動増幅器、 16・・・基準バイアス、2
1・・・スイッチ回路、乙・・・タイミング信号発生回
路。 代理人 弁理士  則 近 憲 佑 (ほか1名) 第1図 IIZ図
FIG. 1 is a configuration diagram of an FM demodulator according to an embodiment of the present invention;
FIG. 2 is a time chart of timing pulses, FIG. 3 is a schematic diagram of a time-division modulation signal, and FIG. 4 is a configuration diagram of a conventional FM demodulator. l...Modulation signal, 2...Tuner circuit, 4...
・Chaining voltage generation circuit, 5... Chaining voltage, 6... AFC circuit, 7.
...AFC voltage, 8...Tuning signal, 10...AGC
Amplifier, 11...FM detection circuit, 12...Detection output, 13...Low frequency door filter. l5...Differential amplifier, 16...Reference bias, 2
1... Switch circuit, B... Timing signal generation circuit. Agent: Patent attorney Noriyuki Chika (and 1 other person) Figure 1 IIZ

Claims (1)

【特許請求の範囲】[Claims] 音声情報を含むデータとFM変調された映像信号とが時
分割伝送されてくる変調信号を入力とし、チューニング
電圧とAFC電圧とを重畳して得られる選局信号により
前記変調信号中の所望の変調信号を選局するチューナ回
路と、選局された変調信号の利得調整を行うAGC増幅
器と、利得調整された変調信号を復調するFM検波回路
と、低域ろ波器およびこの低域ろ波器の出力と所定の基
準バイアスとを比較し前記AFC電圧を出力する差動増
幅器とからなるAFC回路とを備えるFM復調器におい
て、前記FM検波回路の復調出力中の前記音声情報を含
むデータ期間の復調出力のみを前記AFC回路の低域ろ
波器に供給することを特徴とするFM復調器。
A modulation signal in which data including audio information and an FM-modulated video signal are time-divisionally transmitted is input, and a desired modulation in the modulation signal is performed using a tuning signal obtained by superimposing a tuning voltage and an AFC voltage. A tuner circuit that selects a signal, an AGC amplifier that adjusts the gain of the selected modulated signal, an FM detection circuit that demodulates the gain-adjusted modulated signal, a low-pass filter, and this low-pass filter. and a differential amplifier that compares the output of the FM detector with a predetermined reference bias and outputs the AFC voltage. An FM demodulator characterized in that only the demodulated output is supplied to a low-pass filter of the AFC circuit.
JP26283784A 1984-12-14 1984-12-14 Fm demodulator Pending JPS61141228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26283784A JPS61141228A (en) 1984-12-14 1984-12-14 Fm demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26283784A JPS61141228A (en) 1984-12-14 1984-12-14 Fm demodulator

Publications (1)

Publication Number Publication Date
JPS61141228A true JPS61141228A (en) 1986-06-28

Family

ID=17381303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26283784A Pending JPS61141228A (en) 1984-12-14 1984-12-14 Fm demodulator

Country Status (1)

Country Link
JP (1) JPS61141228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5781588A (en) * 1994-11-10 1998-07-14 Matsushita Electric Industrial Co., Ltd. FSK signal receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5781588A (en) * 1994-11-10 1998-07-14 Matsushita Electric Industrial Co., Ltd. FSK signal receiver
US5987075A (en) * 1994-11-10 1999-11-16 Matsushita Electric Industrial Co., Ltd. FSK signal receiver

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