JPS61141168A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To produce semiconductor device with resistor layer subject to extremely high resistance value and high yield by a method wherein an impurity layer and an oxide film coating the impurity layer are provided on the surface layer of a semiconductor substrate while the impurity layer is heattreated either in the atmosphere of mixed gas containing oxygen exceeding 5vol% and residual nitrogen or in the atmosphere of oxgen gas. CONSTITUTION:A silicon oxide film 3 is formed on an N-type epitaxial growing layer 2. Then a pattern in resistor layer region is formed on the oxide film 3 to remove said oxide film 3 by etching process. Next another thin oxide film 4 is formed at high temperature oxidizing atmosphere on the layer 2 (resis tor layer region) and residual oxide film 3 further implanted with specified dosage of boron to be heattreated at high temperature atmosphere of mixed gas forming P type diffusion resistor layer 5 in the layer 2. Finally the thin oxide film 4 on layer 2 corresponding to the electrode forming parts on both ends of resistor layer is removed to deposit a boron silicate glass 6 as boron source on the thin oxide film 4 and the patterned layer 2 so that the glass may be thermodiffused in the layer 2 to form a P<+> region 7 bringing the glass 6 into ohmic contact with electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device that can obtain a high resistance layer having a high sheet resistance value.

Prior Art and Problems When manufacturing a semiconductor device such as a bipolar IC, a base region of a transistor and a resistance layer are usually formed at the same time. This is because the range of the sheet resistance value of the resistance layer in the semiconductor device 2 is almost the same as the range of the sheet resistance value of the base region of the transistor in the same semiconductor device (for example, the sheet resistance value of the resistance layer is about 50 to 300Ω). By forming both at the same time, a decrease in manufacturing efficiency can be suppressed. In addition, the upper limit of the resistance value of the resistance layer of the circuit in a semiconductor device was required to be only about 1Ω, so even if the sheet resistance is E as described above, it is difficult to practically manufacture a semiconductor device. I was able to do that.

However, if the resistance value of the resistance layer is required to be as high as, for example, 50Ω due to the requirements for one circuit, it is possible to form the resistance layer on the semiconductor device with a sheet resistance value in the above range. Have difficulty.

That is, in order to obtain a resistive layer with a high resistance value, it is necessary to either increase the length of the resistive layer or decrease the width of the resistive layer on the substrate constituting the semiconductor device.
The former requires a large area, resulting in poor integration, and the latter is already close to the limit width of one layer at present, so a significant increase in sheet resistance cannot be expected.

Furthermore, the sheet resistance value is adjusted to the above range (50 to 30
Even if an attempt is made to obtain a resistive layer having a high resistance value by increasing the resistivity to more than about 0 Ω/cm 2 ), it is difficult to manufacture a semiconductor device having such a resistive layer with a high yield. That is,
Normally, a large number of semiconductor devices 1ff are produced from one semiconductor wafer.
(IC) chip is obtained, but in the wII manufacturing process,
When forming a resistance layer, the required amount of impurities is deposited at the required locations over the entire wafer, and then 9 votes (
N2) Heat diffusion treatment in an atmosphere. From the viewpoint of manufacturing efficiency, such thermal diffusion treatment is usually carried out with a plurality of semiconductor urchins arranged side by side in a quartz tube, for example.

However, the sheet resistance values at various points within the surface of the semiconductor wafer obtained by the above-mentioned heat treatment vary considerably, and as a result, the proportion of chips that can be used as products decreases, and the manufacturing process of semiconductor devices is reduced. Remains become extremely compassionate.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a method for manufacturing a semiconductor device that solves one or more of the above problems, provides a high sheet resistance value, and has an extremely high yield.

Summary of the Invention The present invention provides an impurity layer and an oxide film covering the impurity layer on the surface layer of a semiconductor substrate, and then forms an impurity layer.

An impurity diffusion resistance layer is formed on the semiconductor substrate by heat treatment in a mixed gas atmosphere containing 5% by volume or more of oxygen and the remainder being nitrogen, or in an oxygen gas atmosphere. The reason for this limitation is that when the oxygen content is less than 5%, the variation in sheet resistance value within the wafer surface becomes extremely large.

Embodiment of the Invention FIGS. 1(A) to 1(G) show an example of a manufacturing process according to the present invention for a resistive layer portion of a semiconductor device.

In this example, a p-type silicon (Si) semiconductor base &l
A layer with an n-type epitaxial layer 2 formed thereon is used. First, as shown in FIG. 1(A), a silicon oxide film (SiOz) is deposited on layer 1 in a still-temperature oxidizing atmosphere.
form.

Next, as shown in FIG. 1(B), a pattern of the resistive layer region is formed on the oxide film 3 by photolithography (using a photoresist), and then the oxide film 3 in the resistive layer region is removed by etching. (The photoresist is also removed for that purpose).

Then, as shown in FIG. 1C, a thin oxide 1II4 is formed on the holed (patterned) layer 2 (on the resistive layer region) and on the remaining oxide@3 in a high temperature oxidation atmosphere.

Next, as shown in FIG. 1(0), a thin llI! is applied to the patterned portion of layer 2 by ion implantation. A predetermined amount of boron (Baron) is implanted through 4; then, a p-type diffused resistance layer 5 is formed in layer 2 by heat treatment in a high temperature atmosphere of a mixed gas according to the present invention. The thin oxide film 4 only needs to be thinner than the maximum thickness at which ion implantation can be performed with a predetermined efficiency (depending on the value of ion implantation energy, for example, 2000 A, 8 degrees).

Next, as shown in FIG. 1(E), the diffused resistor 7! In the same manner as patterning &5, the thin oxide film 4 on the layer 2 corresponding to the electrode formation portions at both ends of the resistance layer is removed.

Then, as shown in FIG.
Glass (hereinafter referred to as 8SG) 8 is applied 11 times, and this is thermally diffused into the layer 2 to form a p+ region 7 for making ohmic contact with the electrode.

Then, phosphosilicate glass 8' (phosphos
ili-cate glass) is deposited and this is subjected to 7 anneals.

Next, B5G3 and PSG8' on p◆ region 7 are patterned in the same manner as above, and aluminum (text A) as an electrode is deposited on this patterned part and the remaining B5G3 and PSG8' by vapor deposition, etc. Patterning was performed in the same manner as shown in Figure 1 (G).
An electrode 8 is formed as shown in FIG.

Next, specific experimental examples will be explained to clarify the effects of the present invention.

First, prepare multiple 3 inch (75 φ) n-type semiconductor wafers with a thin oxide film (1000 layers) 4 formed on their surfaces.
Ion implantation was applied to the entire surface of all wafers with an implant dose of 1, OX 10' at an energy of 75 keV.
/ Boron was injected so that the diameter was 2. Next, the required number of processed wafers were placed upright in a quartz tube with an inner diameter of 120 amφ and placed side by side at a predetermined interval, and the inside of the quartz tube was flushed with nitrogen (100% N2) at a temperature of 1200°C and a processing time of 40 minutes.
) The wafer was heat-treated in a gas atmosphere to form a diffusion layer on the surface layer of the wafer.

Similarly, as a gas, nitrogen (N2) was used at various mixing ratios.
A plurality of mixed gases consisting of and oxygen (02) and oxygen (02 100%) gas were prepared, and the required number of wafers were each prepared in the gas atmosphere for each m* gas under exactly the same conditions as above except for the gas atmosphere. was heat-treated to form a diffusion layer on its surface layer.

Regarding the wafer with the diffusion layer formed in this way, in order to investigate the variation in the sheet resistance value of the diffusion layer, as shown in FIG. The sheet resistance was measured at each of 12 points (equally spaced), and from the results, the average value of the sheet resistance and the dispersion of the sheet resistance value within the surface of all the required number of wafers for each gas were determined. Representative examples of the results are shown in Table 1, and the dispersion of sheet resistance values is shown graphically in FIG.

T: Average value of sheet resistance within the entire wafer surface for each glass ρ: Sheet resistance value at each point on the wafer surface (i = 1.2..., n) as, C notation Based on the following.

From Table 1 and above, it is clear that by using a mixed gas containing at least 5% oxygen (remaining nitrogen) in the heat treatment atmosphere after impurity deposition or ion implantation, wafers with extremely small variations in sheet resistance can be obtained. It is. Further, it is clear that the variation in sheet resistance value becomes smaller when the oxygen concentration in the mixed gas is 25% or more, and further becomes smaller when the same concentration is 50% or more.

DETAILED DESCRIPTION OF THE INVENTION As described in detail, according to the present invention, a semiconductor device having a resistance layer having an extremely high sheet resistance value can be manufactured at a high yield.

[Brief explanation of the drawing]

Figures 1 (^) to (G) are diagrams showing an example of the manufacturing process of a semiconductor device according to the present invention, Figure 2 is a diagram showing sheet resistance measurement points of sea urchin I\, and Figure 3 is a diagram showing variations in sheet resistance. FIG. 1... Semiconductor device, 2... Epitaxial growth layer,
3... Oxide film, 4... Thin film, 5... Diffused resistor, 6.6'... BSG, 7... P1 region, 8...
electrode.

Claims (1)

[Claims] An impurity layer and an oxide film covering the impurity layer are provided on the surface layer of a semiconductor substrate, and then the impurity layer is heated under a mixed gas atmosphere containing 5% by volume or more of oxygen and the remainder being nitrogen. A method for manufacturing a semiconductor device, comprising forming a diffusion resistance layer of the impurity on the semiconductor substrate by performing heat treatment in an oxygen gas atmosphere.