JPS61140684U - - Google Patents
Info
- Publication number
- JPS61140684U JPS61140684U JP2312085U JP2312085U JPS61140684U JP S61140684 U JPS61140684 U JP S61140684U JP 2312085 U JP2312085 U JP 2312085U JP 2312085 U JP2312085 U JP 2312085U JP S61140684 U JPS61140684 U JP S61140684U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- video signal
- synthesis
- signal
- inter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000003786 synthesis reaction Methods 0.000 claims description 4
- 230000001934 delay Effects 0.000 claims 1
- 230000003111 delayed effect Effects 0.000 claims 1
- 230000002194 synthesizing effect Effects 0.000 claims 1
- 230000003313 weakening effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Picture Signal Circuits (AREA)
- Processing Of Color Television Signals (AREA)
Description
第１図は本考案の一実施例の雑音低減回路の構
成を示すブロツク図、第２図は従来回路の構成を
示すブロツク図である。
１１……合成回路、１２……遅延回路、１３…
…クロマインバーター、１４……画質改善回路、
１４ａ……減算回路、１４ｂ……絶対値回路、１
４ｃ……制御回路。
FIG. 1 is a block diagram showing the configuration of a noise reduction circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional circuit. 11...Synthesis circuit, 12...Delay circuit, 13...
...Chroma inverter, 14...Image quality improvement circuit,
14a... Subtraction circuit, 14b... Absolute value circuit, 1
4c...control circuit.
Claims (1)
フレーム分遅延させる遅延回路と、 この遅延された映像信号をライン間相関に基づ
き一旦Ｙ／Ｃ分離し、色信号の位相のみが反転さ
れた映像信号を出力する色信号位相反転回路と、 前記遅延回路に供給される映像信号と前記色信
号位相反転回路の出力を合成することによりフレ
ーム間相関を有しない雑音成分を相殺せしめる合
成回路とを備えた雑音低減回路において、 映像信号のライン間相関の強さを検出し、これ
が所定値以下である間は前記合成回路における合
成機能を弱める手段とを備えたことを特徴とする
テレビジヨン画像信号の雑音低減回路。[Scope of claim for utility model registration] Approximately 1 NTSC television system video signal
a delay circuit that delays the video signal by a frame; a color signal phase inversion circuit that temporarily separates the delayed video signal into Y/C based on inter-line correlation and outputs a video signal in which only the phase of the color signal is inverted; A noise reduction circuit comprising a synthesis circuit that cancels out noise components having no inter-frame correlation by synthesizing the video signal supplied to the circuit and the output of the color signal phase inversion circuit, A noise reduction circuit for a television image signal, comprising means for detecting the intensity and weakening the synthesis function of the synthesis circuit while the intensity is below a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2312085U JPS61140684U (en) | 1985-02-20 | 1985-02-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2312085U JPS61140684U (en) | 1985-02-20 | 1985-02-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61140684U true JPS61140684U (en) | 1986-08-30 |
Family
ID=30516066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2312085U Pending JPS61140684U (en) | 1985-02-20 | 1985-02-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61140684U (en) |
-
1985
- 1985-02-20 JP JP2312085U patent/JPS61140684U/ja active Pending
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