JPS61134928A - Signal detection - Google Patents

Signal detection

Info

Publication number
JPS61134928A
JPS61134928A JP25699484A JP25699484A JPS61134928A JP S61134928 A JPS61134928 A JP S61134928A JP 25699484 A JP25699484 A JP 25699484A JP 25699484 A JP25699484 A JP 25699484A JP S61134928 A JPS61134928 A JP S61134928A
Authority
JP
Japan
Prior art keywords
signal
circuit
output
reference voltage
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25699484A
Other languages
Japanese (ja)
Other versions
JPH0310172B2 (en
Inventor
Masateru Sasaki
佐々木 政照
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP25699484A priority Critical patent/JPS61134928A/en
Publication of JPS61134928A publication Critical patent/JPS61134928A/en
Publication of JPH0310172B2 publication Critical patent/JPH0310172B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To discriminate accurately a recorded area and an unrecorded area of a medium from each other by deciding the area, where the counted number of output pulses of a comparing circuit is equal to or larger than a prescribed value, as a data recorded part when an envelope signal having a voltage higher than a reference voltage is inputted. CONSTITUTION:A reproduced signal (1) is integrated, and an envelope signal (2) is outputted to a comparing circuit 8. A comparator 14 in the comparing circuit 8 compares this signal (2) with a reference voltage Vrelf set to an about half of a peak voltage Vp.p of the reproduced signal (1), and the comparator 14 transmits an output (3) to a terminal R of a counter circuit 10 while the envelope signal (2) exceeding the reference voltage -Vrelf is inputted. Meanwhile, a comparator 15 in the comparing circuit 9 compares the reproduced signal (1) with a reference voltage Vrelf 2 set to an about 1/3 of the peak voltage Vp.p of the reproduced signal (1) and pulses both of positive and negative edges of an output signal (pulse waveform) exceeding the reference voltage Vrelf2 and transmits these pulses to a terminal C of the counter circuit 10. A counter 17 in the counter circuit 10 stops the counting operation when 8 pulses of an output (4) of the comparing circuit 9 which is inputted when the output (3) of the comparator 14 is turned on.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、光学的にデータの記録/再生を行う追記型光
記憶装置に係り、特に媒体上のデータ記録済み部分と未
記録部分とを確実に判定する信号検出方式に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a write-once optical storage device that optically records/reproduces data, and particularly relates to a write-once optical storage device that optically records/reproduces data. This invention relates to a signal detection method for reliable determination.

情報処理装置の大容量の外部記憶装置として期待されて
いる光記憶装置の1つとして、データの記録/再生が可
能(但し、データの書換えは不可能)な追記型光記憶装
置があり、この追記型媒体1は第4図に示すように形成
されている。
One type of optical storage device that is expected to serve as a large-capacity external storage device for information processing equipment is the write-once optical storage device, which is capable of recording and reproducing data (however, data cannot be rewritten). The write-once medium 1 is formed as shown in FIG.

即ち、追記型媒体1は透明基板aの上に記録層すが形成
されている。この記録層すはプリフォーマット部Cとグ
ループ(溝)部dから成っており。
That is, the write-once medium 1 has a recording layer formed on a transparent substrate a. This recording layer consists of a preformat section C and a group (groove) section d.

ブリフォーマ7ト部Cとグループ(溝)部dは。The preformer 7 part C and the group (groove) part d are.

透明基板a上にスタンプ技術を用いて形成され。It is formed on a transparent substrate a using a stamping technique.

その上に記録層すが蒸着されている。A recording layer is deposited thereon.

尚第4図(A)は追記型媒体1の概要図、第4図(B)
は追記型媒体1の上面図、第4図(C)は追記型媒体l
の断面図及び第4図(D)は追記型媒体1のグループ(
溝)部dへのデータ記録状況をそれぞれ示す。
Note that FIG. 4(A) is a schematic diagram of the write-once medium 1, and FIG. 4(B) is a schematic diagram of the write-once medium 1.
is a top view of the write-once medium 1, and FIG. 4(C) is a top view of the write-once medium 1.
The sectional view and FIG. 4(D) show the group of write once medium 1 (
The data recording situation in groove) section d is shown.

上述のような追記型媒体1へのデータの記録は。Data is recorded on the write-once medium 1 as described above.

グリフオーマット部Cの情報を読取り目標位置へ位置付
けし1位置付けされたグループ(溝)部d上に半導体レ
ーザ4から発光した光を対物レンズ6等で集束し光ビー
ムとし、この光ビームを照射して記録層すの照射熱反応
により第4図(D)に示すようなピット(穴)を開け、
記録する。
The information in the glyph format section C is read and positioned to the target position, and the light emitted from the semiconductor laser 4 is focused by an objective lens 6 etc. onto the group (groove) section d, which is positioned 1, to form a light beam, and this light beam is irradiated. By the irradiation heat reaction of the recording layer, pits (holes) as shown in FIG. 4(D) are made.
Record.

又、記録時のグループ(溝)部d上の追従は。Also, tracking on the group (groove) portion d during recording is as follows.

回転している追記型媒体1のグループ(溝)部dを検出
器3で検出し、得られる光ピツクアップ制御信号により
グループ(iiaり部d上へのトラ、キングを行う。
The group (groove) portion d of the rotating write-once medium 1 is detected by the detector 3, and tracking onto the group (iia groove) portion d is performed based on the obtained optical pickup control signal.

更に、検出器3は偏向プリズム5により入射する追記型
媒体1上からの反射光を検出して、記録されたデータの
読出しも行う。尚、第5図は光ヘッド2の構成概要図を
示す。
Furthermore, the detector 3 detects the incident reflected light from the write-once medium 1 through the deflection prism 5, and reads the recorded data. Incidentally, FIG. 5 shows a schematic diagram of the configuration of the optical head 2. As shown in FIG.

一般に、グループ(溝)部dの間隔は2μm以下、ピッ
ト(穴ンのサイズは略1μm程度と非常に小さいもので
ある。尚プリフォーマット部Cの情報を読取った時のレ
ベルと、グループ(溝)部dのデータを読取った時のレ
ベルとは、第6図に示すようなレベル関係にある。
In general, the interval between group (groove) parts d is 2 μm or less, and the size of pits (holes) is very small, about 1 μm. ) There is a level relationship as shown in FIG. 6 with the level when the data of section d is read.

一般に、グループ(溝)部d上へのデータ記録は、上記
のように記録層すでの照射熱反応によりピット(穴)を
開ける方式であるため、データ記録済み領域と未記録領
域を正確に判別する必要がある。
In general, data recording on the group (groove) part d is performed by creating pits (holes) by the irradiation heat reaction already in the recording layer as described above, so it is possible to accurately distinguish between data recorded areas and unrecorded areas. need to be determined.

かかるデータ記録済み領域、未記録領域の判別をより確
実に検出し、しかも簡易な回路構成で実現可能な信号検
出方式が期待されている。
There is a need for a signal detection method that can more reliably detect the discrimination between data-recorded areas and unrecorded areas and that can be realized with a simple circuit configuration.

〔従来の技術と発明が解決しようとする問題点〕第7図
は従来の信号検出方式図で、 (A)はブロックダイヤ
グラム、 (B)は信号検出波形をそれぞれ示す。
[Prior art and problems to be solved by the invention] FIG. 7 is a diagram of a conventional signal detection system, in which (A) shows a block diagram and (B) shows a signal detection waveform.

従来の信号検出方式では、グループl)部dからの反射
光を検出器3が検出して出力する再生出力信号■は第7
図(B)の(1)領域に示す波形となり、これを積分回
路7で積分した後の出力(再生出力信号■のエンベロー
プ信号であり1点線で示す)は信号■となる。
In the conventional signal detection method, the reproduced output signal ■ which the detector 3 detects and outputs the reflected light from the group l) part d is the seventh
The waveform is shown in region (1) of FIG. 3B, and the output after integrating this in the integrating circuit 7 (which is an envelope signal of the reproduced output signal ■ and shown by a one-dot line) becomes a signal ■.

この信号■を比較器8で基準電圧Vreflと比較して
、基準電圧Vref1以上の電圧が得られれば。
This signal ■ is compared with the reference voltage Vrefl by the comparator 8, and if a voltage equal to or higher than the reference voltage Vref1 is obtained.

信号■が出力し、基準電圧Vrefl以下の電圧であれ
ば、信号■は出力しない。尚基準電圧Vreflは通常
、再生出力信号■のピーク時の電圧Vp、 pの略1/
2程度に設定される。
The signal ■ is output, and if the voltage is lower than the reference voltage Vrefl, the signal ■ is not output. Note that the reference voltage Vrefl is usually approximately 1/of the voltage Vp, p at the peak of the reproduced output signal ■.
It is set to about 2.

第7図CB)の(1)領域が基準電圧Vref1以上の
電圧が得られた部分、即ち、データ記録済み領域であり
、第7図(B)の(2)領域が基準電圧Vref 1以
下の電圧しか得られなかった部分、即ち、未記録領域と
して従来の信号検出方式では図示してない判別部で判別
していた。
The area (1) in FIG. 7(CB) is the area where a voltage higher than the reference voltage Vref1 is obtained, that is, the data recorded area, and the area (2) in FIG. 7(B) is the area where the voltage higher than the reference voltage Vref1 is obtained. In the conventional signal detection method, a portion where only a voltage was obtained, that is, an unrecorded area, was determined by a discriminating section (not shown).

しかし、このような従来の信号検出方式では。However, with such conventional signal detection methods.

未記録領域のグループ(溝)部d上に欠陥等が存在した
場合、その欠陥の再生出力信号■がデータ記録済み領域
と同様なピーク出力を有する信号(即ち、第7図(B)
の(イ)、(ロ)の部分)として検出され、記録済み領
域の信号と誤検出すると言う問題点があった。
If a defect or the like exists on the group (groove) portion d of the unrecorded area, the reproduced output signal ■ of the defect is a signal having the same peak output as that of the data recorded area (i.e., Fig. 7(B)).
(a) and (b)), and there was a problem in that it could be mistakenly detected as a signal from a recorded area.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、上記問題点を解消した新規な信号検出方式を
実現することを目的とするものであり。
The present invention aims to realize a new signal detection method that solves the above problems.

該問題点は、再生出力信号のエンベロープ値が第1の所
定電圧レベルより大きい時、出力がオンとなる信号エン
ベロープ検出手段と、前記再生出力部の所定部分の出力
を第2の所定電圧レベルで比較して、前記第2の電圧レ
ベルより大きい信号をパルス信号として出力するレベル
パルス検出手段と、前記レベルパルス検出手段で検出し
たパルス数を計数し、該エンベロープ検出信号がオフと
なった時に計数をリセットするパルス計数手段とを設け
、前記パルス計数手段の出力が所定計数値以上になった
部分をデータ記録済み部分と判定する本発明による信号
検出方式により解決される。
The problem consists of a signal envelope detection means whose output is turned on when the envelope value of the reproduced output signal is greater than a first predetermined voltage level, and a signal envelope detector whose output is turned on when the envelope value of the reproduced output signal is greater than a first predetermined voltage level; level pulse detection means for comparing and outputting a signal larger than the second voltage level as a pulse signal, and counting the number of pulses detected by the level pulse detection means, and counting when the envelope detection signal turns off. This problem is solved by the signal detection method according to the present invention, which includes a pulse counting means for resetting the pulse counting means, and determines a portion where the output of the pulse counting means exceeds a predetermined count value as a data-recorded portion.

〔作用〕[Effect]

即ち、再生出力信号のピーク電圧の1/3電位の第2の
基準電圧を設定し、この第2の基準電圧以上の再生出力
信号が入力した場合、パルス信号を出力するレベルパル
ス検出手段2例えば比較回路を設け、第1の基準電圧(
例えば、再生出力信号のピーク電圧の1/2電位の基準
電圧)以上の再生出力信号のエンベロープ信号が入力し
た場合。
That is, a second reference voltage of 1/3 potential of the peak voltage of the reproduced output signal is set, and when a reproduced output signal higher than this second reference voltage is input, the level pulse detection means 2 outputs a pulse signal, for example. A comparison circuit is provided, and the first reference voltage (
For example, when an envelope signal of the reproduced output signal is input which is equal to or higher than the reference voltage (1/2 potential of the peak voltage of the reproduced output signal).

前記比較回路の出力パルスでその継続時間幅を計数して
、所定値以上の計数値を得た領域をデータ記録済み部分
と判定することにより、より確実に簡易な回路構成で記
録済み領域及び未記録領域の判別をすることを可能とし
た。
By counting the duration width of the output pulses of the comparison circuit and determining the area for which the count value is greater than a predetermined value as the data recorded area, recorded areas and unrecorded areas can be more reliably determined with a simple circuit configuration. This makes it possible to determine the recording area.

〔実施例〕〔Example〕

以下本発明の要旨を第1図〜第3図に示す実施例により
具体的に説明する。
The gist of the present invention will be specifically explained below with reference to embodiments shown in FIGS. 1 to 3.

第1図は本発明に係る信号検出方式の一実施例を示すブ
ロックダイヤグラム、第2図は第1図の具体的な回路構
成の一実施例、第3図は本発明に係る信号検出方式のタ
イムチャート図をそれぞれ示す。尚全図を通じて同一符
号は同一対象物を示す。
FIG. 1 is a block diagram showing an embodiment of the signal detection method according to the present invention, FIG. 2 is an example of the specific circuit configuration of FIG. 1, and FIG. 3 is a block diagram showing an embodiment of the signal detection method according to the present invention. Time chart diagrams are shown respectively. The same reference numerals indicate the same objects throughout the figures.

次に1本実施例の動作を説明する。Next, the operation of this embodiment will be explained.

再生信号■は積分回路7内の差動増幅器11で増幅され
、増幅された正信号と負信号を整流回路12で全波整流
される。尚整流動作はエミッタコモンの21固のトラン
ジスタと、コンデンサCI、C2,抵抗R1,,R2と
で行われる。
The reproduced signal (2) is amplified by the differential amplifier 11 in the integrating circuit 7, and the amplified positive and negative signals are full-wave rectified by the rectifier circuit 12. The rectification operation is performed by a 21-wire transistor with a common emitter, capacitors CI and C2, and resistors R1, R2.

再生信号■のエンベロープ検出のための積分回路部分は
、整流回路12のエミッタに接続されているエミッタ抵
抗R3とコンデンサC3とで構成され、時定数としてr
 =C3R3を得る。ここで、τは再生信号■の周波数
より決定される値であり、再生信号■の最高周波数の1
15〜1/20ぐらいに選択する。
The integrating circuit section for detecting the envelope of the reproduced signal ■ is composed of an emitter resistor R3 and a capacitor C3 connected to the emitter of the rectifier circuit 12, and has a time constant of r.
= C3R3 is obtained. Here, τ is a value determined from the frequency of the reproduced signal ■, and is 1 of the highest frequency of the reproduced signal ■.
Select around 1/20 to 1/20.

積分された信号は、バッファ回路13を経由して比較回
路8ヘ工ンベロープ信号■が出力される。
The integrated signal is outputted to the comparison circuit 8 via the buffer circuit 13 as an envelope signal (2).

尚バッファ回路13は、高入力インピーダンスを有する
回路であり、積分回路7に対する比較回路8からの影響
を除くために用いられている。
The buffer circuit 13 is a circuit having high input impedance, and is used to eliminate the influence of the comparison circuit 8 on the integration circuit 7.

比較回路8内比較器14では6積分回路7から入力する
エンベロープ信号■を1例えば再生信号■のピーク電圧
VP、I)の1/2程度に設定(電圧Vccを可変抵抗
VRIで設定)した基準電圧Vref 1とで比較して
、基準電圧Vreflを越えたエンベロープ信号■が入
力している間は出力■をオンとし、カウンタ回路10の
端子Rに送出する。尚比較器14は。
In the comparator 14 in the comparator circuit 8, the envelope signal ■ inputted from the six integrating circuits 7 is set to, for example, about 1/2 of the peak voltage VP, I) of the reproduced signal ■ (the voltage Vcc is set by the variable resistor VRI) as a standard. When compared with the voltage Vref 1, while the envelope signal ■ which exceeds the reference voltage Vrefl is being input, the output ■ is turned on and sent to the terminal R of the counter circuit 10. Furthermore, the comparator 14 is.

一般の低速比較器(例えば、比較可能信号周波数がIM
Hz程度のもの)である。
A general low-speed comparator (for example, if the comparable signal frequency is IM)
Hz).

一方、比較回路9内の比較器15は2例えば再生信号■
のピーク電圧vp、pの1/3程度に設定(電圧Vcc
を可変抵抗VR2で設定)した基準電圧Vref2で再
生信号■を比較して、基準電圧Vref2を越えた出力
信号(パルス波形)の正・負両エツジをパルス化回路1
6で正常にパルス化し、カウンタ回路10の端子Cに送
出する。
On the other hand, the comparator 15 in the comparator circuit 9 outputs 2, for example, the reproduced signal
Set to about 1/3 of the peak voltage vp, p (voltage Vcc
The reproduced signal ■ is compared with the reference voltage Vref2 (set by the variable resistor VR2), and both positive and negative edges of the output signal (pulse waveform) exceeding the reference voltage Vref2 are converted into pulses by the pulse circuit 1.
6, it is normally pulsed and sent to terminal C of the counter circuit 10.

尚パルス化回路16は信号遅延を目的とするインバータ
部と、排他的論理和回路とからなっている。
The pulsing circuit 16 includes an inverter section for the purpose of signal delay and an exclusive OR circuit.

又比較器15は、高速の比較器(例えば、比較可能信号
周波数が20MHz程度のもの)であり、再生信号■の
最高周波数に対して充分に応答する速度を有するもので
ある。
The comparator 15 is a high-speed comparator (for example, the comparable signal frequency is about 20 MHz), and has a sufficient speed to respond to the highest frequency of the reproduced signal (2).

カウンタ回路10内カウンタ17は、バイナリカウンタ
であり、比較器14の出力■がオンの時に入力する比較
回路9の出力■を8パルスカウントした時、8パルス目
のカウント値をインバータ18を通じてリセット端子り
に戻し、カウンタ17の計数動作をストップさせるよう
に構成されている。
The counter 17 in the counter circuit 10 is a binary counter, and when it counts 8 pulses of the output ■ of the comparator circuit 9 that is input when the output ■ of the comparator 14 is on, the count value of the 8th pulse is sent to the reset terminal through the inverter 18. The counter 17 is configured to return to its original state and stop the counting operation of the counter 17.

即ち9本実施例では、エンベロープ信号■が規定レベル
を越えてから再生信号■の工・ノジバルスを8パルス計
数しなければ、記録済み領域であることが判定(判定は
8パルス目の計数値を図示してない判定回路で受は判定
する)出来ないようになっている。
In other words, in this embodiment, if the envelope signal ■ exceeds the specified level and the reproduction signal ■ does not count 8 pulses, it is determined that the area is a recorded area (the determination is made based on the count value of the 8th pulse). (A judgment circuit (not shown) determines whether the receiver is receiving the signal) is not possible.

従って、このような信号検出方式の場合は、媒体1の欠
陥が橿端に多くない限り、充分に使用することが可能と
なる。
Therefore, such a signal detection method can be used satisfactorily as long as there are not many defects in the medium 1 at the stem end.

〔発明の効果〕〔Effect of the invention〕

以上のような本発明によれば、媒体の記録済み領域と未
記録領域との判別が、媒体の欠陥に影響されることなく
正確に、しかも簡易な回路構成で実現可能となる。
According to the present invention as described above, it is possible to accurately discriminate between recorded areas and unrecorded areas of a medium without being affected by defects in the medium, and moreover, with a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る信号検出方式の一実施例を示すブ
ロックダイヤグラム。 第2図は第1図の具体的な回路構成の一実施例。 第3図は本発明に係る信号検出方式のタイムチャート図
。 第4図(A)は追記型媒体1の概要図。 第4図(B)は追記型媒体1の上面図。 第4図(C)は追記型媒体1の断面図。 第4図(D)は追記型媒体1のグループ(溝)部へのデ
ータ記録状況。 第5図は光ヘッドの構成概要図。 第6図は媒体の読取り波形図。 第7図は従来の信号検出方式図で、 (A)はブロック
ダイヤグラム、 (B)は信号検出波形図。 をそれぞれ示す。 図において。 1は媒体、       2は光ヘッド。 3は検出器、      4は半導体レーザ。 5は偏向プリズム、   6は対物レンズ。 7は積分回路、     8.9は比較回路。 10はカウンタ回路、11は差動増幅器。 12は整流回路、13はバッファ。 14、15は比較器、16はパルス化回路。 17はカウンタ、1Bはインバータ。 をそれぞれ示す。 L−−−J
FIG. 1 is a block diagram showing an embodiment of a signal detection method according to the present invention. FIG. 2 shows an example of the specific circuit configuration of FIG. 1. FIG. 3 is a time chart diagram of the signal detection method according to the present invention. FIG. 4(A) is a schematic diagram of the write-once medium 1. FIG. 4(B) is a top view of the write-once medium 1. FIG. 4(C) is a sectional view of the write-once medium 1. FIG. 4(D) shows the state of data recording in the group (groove) portion of the write-once medium 1. FIG. 5 is a schematic diagram of the configuration of the optical head. FIG. 6 is a waveform diagram for reading a medium. FIG. 7 is a diagram of a conventional signal detection method, where (A) is a block diagram and (B) is a signal detection waveform diagram. are shown respectively. In fig. 1 is the medium, 2 is the optical head. 3 is a detector, 4 is a semiconductor laser. 5 is a deflection prism, and 6 is an objective lens. 7 is an integration circuit, 8.9 is a comparison circuit. 10 is a counter circuit, and 11 is a differential amplifier. 12 is a rectifier circuit, and 13 is a buffer. 14 and 15 are comparators, and 16 is a pulse generator. 17 is a counter, 1B is an inverter. are shown respectively. L---J

Claims (1)

【特許請求の範囲】[Claims]  光学的にデータを記録する媒体から読取ったデータを
再生出力する再生出力部と、前記再生出力部からの再生
出力信号がデータ記録済み部分の再生出力信号か、それ
ともデータ未記録部分の再生出力信号かを検出する検出
部とを備えてなる記憶装置において、前記再生出力信号
のエンベロープ値が第1の所定電圧レベルより大きい時
、出力がオンとなる信号エンベロープ検出手段と、前記
再生出力部の所定部分の出力を第2の所定電圧レベルで
比較して、前記第2の電圧レベルより大きい信号をパル
ス信号として出力するレベルパルス検出手段と、前記レ
ベルパルス検出手段で検出したパルス数を計数し、該エ
ンベロープ検出信号がオフとなった時に計数をリセット
するパルス計数手段とを設け、前記パルス計数手段の出
力が所定計数値以上になった部分をデータ記録済み部分
と判定することを特徴とする信号検出方式。
a reproduction output section that reproduces and outputs data read from a medium for optically recording data; and whether the reproduction output signal from the reproduction output section is a reproduction output signal of a data-recorded portion or a reproduction output signal of a data-unrecorded portion. A storage device comprising: a signal envelope detection means whose output is turned on when the envelope value of the reproduction output signal is larger than a first predetermined voltage level; level pulse detection means for comparing the outputs of the portions at a second predetermined voltage level and outputting a signal larger than the second voltage level as a pulse signal; and counting the number of pulses detected by the level pulse detection means; A pulse counting means for resetting a count when the envelope detection signal is turned off, and a portion where the output of the pulse counting means exceeds a predetermined count value is determined to be a data-recorded portion. Detection method.
JP25699484A 1984-12-05 1984-12-05 Signal detection Granted JPS61134928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25699484A JPS61134928A (en) 1984-12-05 1984-12-05 Signal detection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25699484A JPS61134928A (en) 1984-12-05 1984-12-05 Signal detection

Publications (2)

Publication Number Publication Date
JPS61134928A true JPS61134928A (en) 1986-06-23
JPH0310172B2 JPH0310172B2 (en) 1991-02-13

Family

ID=17300239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25699484A Granted JPS61134928A (en) 1984-12-05 1984-12-05 Signal detection

Country Status (1)

Country Link
JP (1) JPS61134928A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62184629A (en) * 1986-02-07 1987-08-13 Sharp Corp Optical memory device
JPH01189071A (en) * 1988-01-22 1989-07-28 Sharp Corp Information recording and reproducing device
JPH02187927A (en) * 1989-01-13 1990-07-24 Matsushita Electric Ind Co Ltd Optical disk device
JPH02306431A (en) * 1989-05-19 1990-12-19 Olympus Optical Co Ltd Optical recording/reproducing device
JPH04322886A (en) * 1991-04-24 1992-11-12 Furukawa Alum Co Ltd Method and device for resistance welding of metallic plate
US5317549A (en) * 1991-04-30 1994-05-31 Sharp Kabushiki Kaisha Information recording and reproducing apparatus
US5430702A (en) * 1994-02-16 1995-07-04 International Business Machines Corporation Calibration of readback threshold in an optical storage device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62184629A (en) * 1986-02-07 1987-08-13 Sharp Corp Optical memory device
JPH0474780B2 (en) * 1986-02-07 1992-11-27
JPH01189071A (en) * 1988-01-22 1989-07-28 Sharp Corp Information recording and reproducing device
JPH02187927A (en) * 1989-01-13 1990-07-24 Matsushita Electric Ind Co Ltd Optical disk device
JPH02306431A (en) * 1989-05-19 1990-12-19 Olympus Optical Co Ltd Optical recording/reproducing device
JPH04322886A (en) * 1991-04-24 1992-11-12 Furukawa Alum Co Ltd Method and device for resistance welding of metallic plate
US5317549A (en) * 1991-04-30 1994-05-31 Sharp Kabushiki Kaisha Information recording and reproducing apparatus
US5430702A (en) * 1994-02-16 1995-07-04 International Business Machines Corporation Calibration of readback threshold in an optical storage device

Also Published As

Publication number Publication date
JPH0310172B2 (en) 1991-02-13

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