JPS61134093A - Integrated element including semiconductor laser - Google Patents

Abstract

PURPOSE:To obtain the titled element of high integration degree with mounts of the semiconductor laser and the transistor, by a method wherein a semiconductor laser and a transistor are arranged in stack in the layer thickness direction. CONSTITUTION:In the state of no bias on an electrode 6, current is passed to a stripe region 12 by impressing positive and negative voltages on a P type electrode 9 and an N type electrode 10, respectively; thereby, laser oscillation is carried out in an active layer 3 close to said region. When a negative voltage higher than to the electrode 9 is impressed on the electrode 6 in this state of laser oscillation, a current path to the active layer 3 becomes narrow because of the spread of a depletion layer 11, and the current to the active layer 3 can be reduced. When the voltage impressed on the electrode 6 is reversely stepped down, the depletion layer 11 reduces, and the current to the active layer 3 can be increased. Since the current flowing through the active layer 3 can be thus controlled according to the voltage impressed on the electrode 6, the titled element can be regarded as a kind of FET having the electrode 6 as the gate, electrode 9 as the source, and semiconductor laser as the drain.

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to an integrated device including a semiconductor laser used in optical communication, information processing equipment, etc.

Conventional technology and its problems> Conventionally, devices in which a semiconductor laser and a transistor to drive it are integrated on the same substrate have the merits of reducing stray capacitance and miniaturization, and active research and development is progressing. I'm so excited. Such integrated elements are described in the magazine [Applied Physics Letters (AFL) J vol.
, 41, pp. 126-128, a semiconductor laser region and a transistor region are two-dimensionally arranged on a substrate.

For this reason, it is necessary to integrate semiconductor lasers and transistors on a substrate with a relatively large area, and when integrating a large number of semiconductor lasers and transistors, it is necessary to use a substrate with a very large area and increase the integration rate. However, it has some drawbacks, such as the lack of improvement.

<Object of the Invention> An object of the present invention is to eliminate these drawbacks and to provide an integrated value device including a semiconductor laser with a high degree of integration.

<Structure of the Invention> The structure of a condensed LIT device including a semiconductor laser of the present invention includes: a first re-cladding layer of a first conductivity type provided on a semiconductor substrate; an active layer formed on the first cladding layer; , a second cladding layer of the second conductivity type formed on the active layer, a current confinement layer of the first conductivity type formed on the second cladding layer except for the striped region, and a current confinement layer of the first conductivity type formed on the second cladding layer except for the striped region; A third cladding layer of two conductivity types is formed on the layer and the striped region, a first electrode is provided on the third cladding layer, and a second electrode is provided on the current confinement layer. and a third electrode provided on the semiconductor substrate. Transistor controlled as control terminal and I/c1
It is characterized by making 11 works.

<Example> Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view of an embodiment of the present invention. In the figure, 1 is an n-GaAs substrate, 2 is an n-type first cladding layer (n-At xn □Ga □-xn 1As, Xn
□=0.2~0.8), 3 is an active layer (GaAs, thickness ≦0.5 μm, typically thickness ~Q, 1 μm), 4 is a p-type second cladding layer (P-AJl process). , □Ga, -xpI
As, xp1=0.2~0.8 p≧i X 10
” ' Cm-3 thickness = 0.1-2μm, typical Vcu
0.3 to 0.5 Arn ) t 5 C current confinement layer (
n-Alxn2Ga1□n2As, Xn2=0~0.8
．． Thickness 0.1-'-2μms typically u~0.5μm
), 6 is the electrode, 7 is the p-type third cladding layer CP-Al1, 2Ga, ! -xp2As, xp2=0.2~α8
．． P≦lX10'6. Thickness 0.3~2 prrl,
Typically #:tO, 5 μm to 1 μm), 8 is a cap layer (P-GaAs), 9 is an ICp type electrode, 10 is a Hn type electrode, 11 is a depletion layer region, and 12 is a stripe region (with a width of 0. 5-3 μm, 9th stage, and 2 μm].

In this embodiment, while the electrode 6 is not biased, positive and negative voltages are applied to the p-type electrode 9 and the n-type electrode 10, respectively, and the striped region 12 is coated with electric current. Laser excavation is performed in the active layer 3 in this vicinity. While performing this laser oscillation, if a voltage is applied to the electrode 6 which is positive and which is also higher than the p-type electrode 9, the depletion layer 11
is extended, the current path to the active layer 3 becomes narrower, and the current flowing to the active layer 3 can be reduced. Conversely, when the voltage applied to the electrode 6 is reduced, the depletion layer 11 becomes smaller and the active layer 3 becomes smaller.
It is possible to increase the current to. In this way, the voltage applied to the electrode 6 can be adjusted to control the amount of money flowing into the active layer 3, so it can be used as a type of field effect transistor with the electrode 6 as the gate, the electrode 9 as the source, and the semiconductor laser as the drain. It is regarded. However, in this embodiment, since the semiconductor laser region and the transistor region are integrated in the layer direction, the semiconductor laser and the transistor can be completely integrated in the same area as a normal semiconductor laser.

Therefore, even when a plurality of semiconductor lasers and transistors are integrated, it is possible to achieve a high degree of integration.

In the manufacturing method of this example, crystal growth is performed twice. First, in the initial crystal growth, an n-type first cladding layer 2. Active layer 3. p-type temperature 2 cladding layer 4. Current confinement layer 5t - sequentially grown. Next, stripe regions 12 are formed using a photoetching method or the like. In the next second crystal growth, p-type three cladding layers 7.
Cap layer 8t - grown sequentially. Next, a p-type electrode 9 is formed.

Next, the p-type hot 3 cladding layer 7t'' is removed by photo-etching, the surface of the current confinement layer 50 is exposed, and the electrode 6 is formed, and finally the n-type electrode 10 is formed.

In this embodiment, although the active layer 3 has a single layer structure, it is not limited to this, but may have a multi-layer structure with a multiple quantum well structure or a light guide layer.

Further, in this embodiment, the current confinement layer 5 is formed on the active layer 3, but the current confinement layer may be formed on the opposite side. Further, in this example, the second p-type cladding layer has a single layer structure, but this is made of, for example, p-A4GaAs and P-Al.
A multilayer structure made of GaAs may be used to reduce the resistance on the p side. Furthermore, in this example, AA is used as the material.
'It is possible to use GaAs/GaAs system, but not limited to IlZ.
nGaAs P/I n P system, In-GaAlA
Materials such as s/InP may also be used.

<Effects of the Invention> As explained above, according to the present invention, since the semiconductor laser and the transistor are arranged to overlap in the layer thickness direction, the semiconductor laser and the transistor can be arranged in the same area as a normal semiconductor laser. It is possible to implement integration with semiconductor lasers and transistors with a high degree of integration, making it possible to realize highly integrated semiconductor lasers and transistors.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an embodiment of the present invention. In the figure, 2 is an n-type first cladding layer, 3 is an active layer, and 4 is a p-type second cladding layer.

Claims (1)

[Claims] A first cladding layer of a first conductivity type provided on a semiconductor substrate, an active layer formed on the first cladding layer, and a second cladding of a second conductivity type formed on the active layer. a current confinement layer of a first conductivity type formed on the second cladding layer except for the striped region; and a current confinement layer of a second conductivity type formed on the current confinement layer and the striped region. a third cladding layer, a first electrode provided on the third cladding layer, a second electrode provided on the current confinement layer, and a third electrode provided on the semiconductor substrate. An integrated element including a semiconductor laser, characterized in that the semiconductor laser is operated by the first and third electrodes, and the output of the semiconductor laser is operated as a transistor that controls the output of the semiconductor laser by using the second electrode as a control terminal. .