JPS6113249B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reference voltage source circuit, and is particularly directed to a reference voltage source circuit configured with bipolar transistors and which obtains a highly stable output.

The inventor of the present invention previously considered a reference voltage source circuit as shown in FIG. 1, which can obtain a stable reference voltage.

In Figure 1, the power terminal Vcc and the ground terminal GND
A resistor R ₆ and a diode D ₁ connected in series between
The npn transistor _Q1 constitutes the start-up circuit,
Two pnp transistors Q ₃ and Q ₄ and a resistor R ₄ as well as an npn transistor Q ₂ and a resistor R ₅ constitute a constant current source circuit. The npn transistor _Q5 driven by the output of the constant current source circuit is a control transistor. The circuit consisting of npn transistors Q ₆ and Q ₇ , diode-connected transistor Q ₈ , and resistors R ₁ to _{R 3} is a constant voltage circuit that generates a temperature compensated reference voltage Vref, as will be explained in detail later. In addition, in steady state, the above starting transistor
The base operating voltage (V _BE ) of Q ₁ is set to approximately half the base operating voltage of the constant current drive transistor Q ₂ , and therefore, in the steady state, transistor Q ₁ is off. It's summery. The operation of such a circuit is as follows.

First, when the power is turned on, the startup circuit (resistor R ₆ diode D ₁ , transistor Q ₁ ) operates, and the startup transistor Q ₁ is turned on _.
A bias current is applied to the bases of transistors Q ₃ and Q ₄ by the collector current of . transistor
Transistor _Q5 controlled by the collector current of _Q4
is turned on, and the output voltage from its emitter side is
Vref is obtained. When the control transistor _Q5 is turned on, the base potential of the transistor _Q2 becomes higher than the base potential of the transistor _Q1 , so the transistor _Q2 is turned on, and conversely, the starting transistor is turned on.
Q ₁ is turned off.

Therefore, in the steady state after the circuit starts up,
Constant current circuits R ₅ , Q ₂ , R ₄ , Q ₃ , Q ₄ are output terminals Vref
receive bias from

In a constant voltage circuit that generates a temperature-compensated reference voltage Vref, a circuit in which the control transistor _Q5 is omitted and the collector of the transistor _Q6 is directly connected to the output terminal is described, for example, in a circuit published by Kindai Kagakusha on September 15, 1975. "Analog Integrated Circuits" pages 130-131
This is a known method.

In such a constant voltage circuit, a difference ΔV _BE between the base-emitter voltages of transistors Q ₈ and Q ₇ expressed by the following equation (1) is applied to a resistor R ₁ connected to the emitter of transistor Q ₇ . That will happen.

ΔV _BE =V _BEQ6 −V _BEQ7 =KT/qlnI _EQ6 /I _EQ7 ………(1) Here, K is Boltzmann constant, T is absolute temperature,
q is the electronic charge, _IEQ8 is the emitter current of transistor _Q8 , and _IEQ7 is the emitter current of transistor _Q7 .

Therefore, the voltage drop V ₂ across the resistor R ₂ is determined by the following equation (2).

V ₂ = R ₂ /R ₁・ΔV _BE ......(2) On the other hand, the reference voltage Vref is the voltage drop between the base and emitter voltage V _BEQ6 of the transistor Q ₆ and the voltage drop across the resistor R ₂ .
It is equal to the sum of V ₂ and can be obtained as shown in equation (3) below.

Vref=V _BEQ6 +R ₂ /R ₁・ΔV _BE (3) Therefore, the temperature dependence of the reference voltage Vref is
By partially differentiating equation (3) with respect to temperature T, the following equation (4) is obtained.

∂Vref/∂T=∂V _BEQ6 /∂T+R ₂ /R ₁
・∂(ΔV _BE )/∂T = ∂V _BEQ6 /∂T+R ₂ /R ₁・K/qln
I _EQ8 /I _EQ7 ......(4) Since the temperature dependence of the transistor base-emitter voltage V _BE is -2 mV/℃, the above (4)
The first term in the equation ∂V _BEQ6 /∂T is −2 mV/°C.
Since K/q=26mV/300°K, R ₂ /R ₁ =
When I _EQ8 /I _EQ7 = 10, the second term of the above equation (4) becomes 1.99 mV/°C. Therefore, the first term and the second term of the above equation (4) cancel each other out, and the temperature dependence ∂Vref/∂T of the reference voltage Vref can be made approximately zero.

Therefore, the reference voltage Vref under this condition has the following value from the above equations (2) and (3).

Vref=V _BEQ6 +R ₂ /R ₁・ΔV _BE =V _BEQ6 +R ₂ /R ₁・KT/qlnI _EQ8 /I _E
Q7 = 0.6 [V] + 10 x 0.026 [V] x 2.3 = 0.6 [V] + 0.598 [V] ≒ 1.2 [V] On the other hand, control transistor _Q5 operates as an emitter follower transistor, so the output terminal
1.2 regardless of variations in the load connected to Vref
It operates to generate a reference voltage Vref of [V].

By the way, the constant current circuits R ₅ , Q ₂ , R ₄ , Q ₃ , and Q ₄ are arranged to supply a stable bias current to the base of the control transistor Q ₅ .

By the way, according to the inventor's study, in the circuit shown in FIG.
It has become clear that the power supply voltage dependence characteristics of Q ₂ , Q ₃ , Q ₄ , resistors R ₄ , R ₅ ) determine the power supply voltage dependence characteristics of the constant output voltage Vref.

The reason for this is as follows.

In other words, when the voltage between the collector and emitter of a transistor increases due to a significant increase in the power supply voltage Vcc, the width of the depletion layer at the collector-base junction increases, and as a result, the effective base width decreases.
An early effect occurs in that the effective emitter ground current amplification factor increases and ultimately its collector current increases.

On the other hand, in monolithic ICs, lateral
Since the impurity concentration in the base region of a PNP transistor is lower than that of a vertical NPN transistor, the width of the depletion layer at the collector-base junction of a lateral PNP transistor increases significantly, and
Compared to NPN, lateral PNP transistors produce a significant Early effect.

Therefore, if the circuit shown in Figure 1 is made into a monolithic IC and the PNP transistors Q ₃ and Q ₄ are composed of lateral PNP transistors, the power supply voltage
When Vcc increases significantly, the collector current of transistor Q ₄ increases significantly due to the Early effect, and as a result, the base current of control transistor Q ₅ increases significantly and its conductivity also increases significantly, so that the output voltage Vref increases as described above. A problem arises in that the voltage rises from a stable value (ie, about 1.2 volts) to a value close to the power supply voltage Vcc. On the other hand, despite the increase in the supply voltage Vcc, the _lateral
The collector-emitter voltage of the PNP transistor _Q3 is clamped by its base-emitter voltage, and the Early effect is not a problem with this transistor _Q3 .

In order to eliminate the above-mentioned drawbacks, the inventor of the present invention considered providing another stabilized power supply 2 upstream of the reference voltage source circuit 1 shown in FIG. 1, as shown in FIG. 2. The stabilized power supply 2 includes npn transistors _Q20 , _Q21 , resistors _R12 to _R15 , and a diode _D3 . By using this circuit, even if the power supply voltage Vcc fluctuates, fluctuations in the emitter voltage of the transistor _Q4 can be suppressed, thereby stabilizing the output voltage. However, the voltage drop caused by the resistor _R12 Voltage loss based on the forward voltage drop between the base and emitter of transistor _Q20 increases. In the pre-regulated power supply 2 as shown in Fig. 2, its output voltage is equal to the base-emitter voltage V _BE of the transistor.
Since it occurs as a function of It is also necessary to use a somewhat higher power supply voltage. In addition, the output voltage of the stabilized power supply circuit 2 (the emitter voltage of the transistor _Q20 ) must be set at a high power supply voltage because a margin must be included to account for fluctuations in the values of the resistors _R15 to _R15 . It is necessary to use

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a reference voltage source circuit that has low power loss and can provide a highly stable constant voltage output even with fluctuations in power supply voltage.

A brief overview of typical inventions disclosed in this application is as follows.

In other words, the control circuit includes a constant voltage circuit 5 that generates a predetermined reference voltage (Vref) from its output terminal, and a collector-emitter path connected between the power supply terminal Vcc and the output terminal of the constant voltage circuit 5. a constant current circuit for generating a constant current in response to the transistor Q ₅ and the reference voltage Vref generated from the output terminal of the constant voltage circuit 5 and supplying the constant current to the base of the control transistor Q ₅ ; 4, the reference voltage source circuit further includes a level shift circuit 7 that generates a voltage shifted by a predetermined voltage level from the reference voltage Vref, and the constant current circuit 4 has an emitter connected through a resistor _R5 . A first PNP transistor _Q3 whose base and collector are connected to each other, and _whose emitter and base are connected to the emitter and base of the first PNP transistor _Q3 , respectively. a second PNP transistor Q ₄ connected to each other, and the base and collector of the first PNP transistor Q ₃ are connected to each other.
connected to the collector of the NPN transistor Q ₂ and the corctor of the second PNP transistor Q ₄ connected to the base of the control transistor Q ₅ ;
A level shift voltage generated from the level shift circuit 7 is applied to the emitter of the first PNP transistor _Q3 and the emitter of the second PNP transistor _Q4 (Fig. 3). reference).

According to the above configuration, even though the power supply voltage Vcc increases significantly, the level shift voltage generated from the level shift circuit 7 is maintained at a voltage level shifted by a predetermined voltage level from the reference voltage Vref. The emitter potential of the PNP transistor _Q3 and the emitter potential of the second PNP transistor _Q4 are maintained at this stable level shift voltage. Thus, the control _transistor
Since the base current of Q ₅ is stabilized, the reference voltage Vref generated from the output terminal of the constant voltage circuit 5 is maintained at a stable value.

The present invention will be specifically described below using examples and with reference to the drawings.

FIG. 3 is a circuit diagram showing an embodiment of the reference voltage source circuit according to the present invention. In the figure, 3 is a starting circuit. This circuit 3 includes a series circuit consisting of a resistor R ₆ (approximately 12KΩ) and diodes D ₁ and D ₂ , a starting npn transistor Q ₁ driven by the output of this series circuit, and this starting transistor Q ₁
It consists of a speed-up PNP transistor _Q9 whose collector is connected to its base. 4 is a constant current source circuit, which includes two pnp transistors Q ₃ and Q ₄ ,
Drive npn transistor Q ₂ and resistor R ₄ (111Ω),
Consists of R ₅ (1.89KΩ). Drive transistor Q ₂
The corctor of the speed-up transistor Q _{9 is connected to the base of the transistor Q 9} via a resistor R ₇ (6.8KΩ). Further, the emitter of the driving transistor _Q2 is commonly connected to the emitter of the starting transistor _Q1 . Here, the base potential of the starting transistor Q ₁ is set to approximately half the base potential of the driving transistor Q ₂ in a steady state. 5 is a constant voltage circuit that generates a reference voltage Vref as in FIG. 1, and includes a diode-connected npn transistor _Q8 , an npn transistor _Q7 , and an npn transistor _Q6 that sinks the output current of the constant current source circuit 4. and resistance R ₁ (36.4Ω
8), R ₂ (10.73KΩ), R ₃ (5.36KΩ), and an oscillation prevention capacitor C ₁ (10pF). Reference numeral 6 denotes a control circuit, which is composed of an npn transistor _Q5 . 7 is a level shift circuit, which includes a current mirror circuit (pnp transistors _Q13 , _Q14 ), a level shift diode _Q12 , and a pnp transistor.
Q ₁₀ , npn transistor Q ₁₁ and resistor R ₈ (1KΩ)
Consisting of A reference voltage Vref is applied to the bases of the transistors Q ₁₀ and Q ₁₁ of this level shift circuit 7, and a level shift voltage output (PNP transistor
The collector voltage of Q ₁₃ ) is applied to the emitters of transistors Q ₃ and Q ₄ of the constant current source circuit 4.

The operation of the above circuit is as follows.

First, when the power is turned on, the resistor R ₆ and the diode
The series circuit of D ₂ and D ₁ is biased, and the starting transistor Q ₁ and speed-up transistor
_Q9 turns on. (At this time, since the pnp transistor _Q9 is present, the startup transistor _Q1 operates faster). The output terminal Vref receives a bias from the power supply Vcc by the pnp transistor _Q9 in the on state, and a voltage is generated at the output terminal. When the voltage at this terminal Vref reaches a level higher than the base potential of the transistor Q ₁ by the base-emitter forward voltage, the starting transistor Q ₁
and Q ₉ is turned off, and transistor Q ₂ of the constant current source circuit 4 is turned on. By turning on the constant current driving transistor _Q2 , the constant current source circuit 4 comes to operate steadily. At this time, the emitter current of transistor _Q2 is determined by the potential of terminal Vref and the resistance
Depends on the value of R ₅ . Since the potential of the terminal Vref is a constant voltage as described later, the emitter current becomes a constant current. The collector current of transistor _Q2 is a constant current approximately equal to its emitter current. The base and corctor of transistor _Q3 are
A bias current is received from the collector of the transistor _Q2 , and a voltage is generated between its emitter and collector.

By inserting and connecting a resistor _R4 between the base and the collector, the emitter-collector voltage of transistor _Q3 is kept almost constant even with variations in the bias current, that is, variations in the collector current of transistor _Q2 . be made into Therefore, the emitter-collector voltage of the transistor _Q3 remains constant even if the potential of the output terminal Vref varies.

The base-emitter of the transistor _Q4 is biased by the emitter-collector voltage of the transistor _Q3 . A collector current corresponding to the base-emitter bias flows through the collector of transistor _Q4 .

The emitter potential of the transistor _Q4 is equal to the output potential of the level shift circuit 7, and the collector potential is equal to the potential of the output terminal Vref and the control transistor _Q5.
It is equal to the sum of the base-emitter forward voltage of

To explain the operation of the level shift circuit 7,
Since the potential at the output terminal is a value shifted by a predetermined voltage level from the potential at the output terminal Vref, the emitter-collector voltage of the transistor _Q4 becomes a constant voltage regardless of fluctuations in the power supply voltage Vcc. Therefore, the variation in the collector current of transistor Q ₄ due to the Early effect can be ignored.

Although not particularly limited, the constant voltage circuit 5 is composed of three transistors Q ₆ , Q ₇ , Q ₈ and three resistors R ₁ , R ₂ , R ₃ as in FIG. 1, and provides a temperature-compensated reference voltage Vref. occurs. That is, the base-emitter voltage V _BEQ6 of transistor Q ₆ and the base-emitter voltage V _BEQ7 of transistor Q ₇
The differential voltage ΔV _BE =V _BEQ8 -V _BEQ7 is added to the resistor R ₁ to set the emitter current of the transistor Q ₇ flowing through the resistor R ₁ and to set the voltage drop across the resistor R ₂ . That is, by offsetting the temperature dependence of the base-to-emitter voltage V _BEQ8 of the transistor _Q8 by the temperature dependence of the voltage drop across the resistor _R2 , a temperature-compensated reference voltage is obtained.
Vref is what you get. If there is no need to temperature compensate the reference voltage Vref, the constant voltage circuit 5 may be a simpler Zener diode or PN.
It goes without saying that the junction diode can be replaced by another constant voltage circuit in which a plurality of junction diodes are connected in series.

The potential of the output terminal Vref is maintained at a constant voltage due to the strong negative feedback effect in the negative feedback loop described above.

In the level shift circuit 7, a current determined by the potential of the terminal Vref and the emitter resistor _R8 flows through the collector of the npn transistor _Q11 , and this collector current flows to the pnp transistors _Q14 and _Q13 forming the current mirror circuit. .

As a result of the current mirror, the collector current of transistor Q ₁₄ and the collector current of transistor Q ₁₃ are proportional to each other, so that transistor Q ₁₃
The collector current of is proportional to the collector current of the npn transistor _Q11 . diode connected
The current from the collector of the transistor Q 13 flows through the npn transistor Q ₁₂ and the emitter of the pnp transistor Q ₁₀ connected in series with this transistor, and between the output terminal, i.e. in this case the base of the transistor Q ₁₀ , and the emitter of the pnp transistor Q ₁₀ connected in _series with this transistor. A forward voltage drop occurs between the two pn contacts and the collector. Since the forward voltage current characteristic of the pn junction exhibits a substantially constant voltage characteristic, the collector potential of the transistor _Q13 is kept at a substantially constant potential with respect to the output terminal Vref.

Therefore, despite a significant increase in the power supply voltage Vcc, the voltage from the level shift circuit 7 to the constant current circuit 4 is
Since the level shift voltage applied to the emitters of PNP transistors Q ₃ and Q ₄ is maintained at a stable value, the base current of control transistor Q ₅ is stabilized without causing any early effect with respect to PNP transistor Q ₄ Therefore, the reference voltage Vref generated from the output terminal of the constant voltage circuit 5 is maintained at a stable value.

In the level shift circuit 7, since the collector potential of the transistor _Q11 changes depending on the power supply voltage Vcc, its collector current changes slightly due to the Early effect, and the collector current of the transistor _Q13 also changes slightly. However, the forward biased transistors Q ₁₂ and Q ₁₀
Due to the non-linear characteristics at the p-n junction, fluctuations in the collector potential of transistor _Q13 can be ignored.

In the level shift circuit 7, from the terminal Vref
A base current flows into the base of the npn transistor _Q11 , and in contrast, a base current flows into the terminal Vref from the pnp transistor _Q10 having a complementary configuration to the transistor _Q11 . As a result, the apparent current supplied from the terminal Vref to drive the level shift circuit 7 is reduced, and the influence from the level shift circuit 7 on the terminal Vref is reduced. transistor
The current amplification factors of Q ₁₁ and Q ₁₂ are equal, and the transistor
If the current magnification of the current mirror circuit composed of Q ₁₄ and Q ₁₃ is set to 1, the above drive current becomes zero.

Semiconductor integrated circuit technology allows pnp transistors to be configured as lateral transistors and npn transistors to be configured as vertical transistors on one silicon substrate. In this case, the current amplification factor of the lateral transistor is usually smaller than the current amplification factor of the vertical transistor due to its structure. If there is a difference in current amplification factor between transistors Q ₁₀ and Q ₁₁ in complementary configuration, the current amplification factor can be increased by making the effective collector peripheral length of lateral transistor Q ₁₃ larger than the effective collector peripheral length of lateral transistor Q ₁₄ by known means. Change the
The sum of the base currents of transistors _Q11 and _Q10 can be made almost zero. Such a level shift circuit that can drive a small or almost zero drive current is particularly suitable for a constant voltage circuit like the embodiment, but
Of course, it can be used for other circuits.

As described above, according to the present invention, since the collector-emitter voltage V _CE of the constant current source transistor Q ₄ becomes constant, fluctuations in the reference voltage due to the Early effect as described above can be prevented, and the power supply voltage This provides a highly stable reference voltage source circuit even with fluctuations in . According to the experimental results of the inventor of the present application, the voltage fluctuation rate was zero between 2.8V≦Vcc≦10V. Also,
Since a stabilized power supply circuit with poor temperature characteristics as shown in FIG. 2 is not provided, power loss does not increase.

Furthermore, since the temperature-compensated detection circuit 5 is provided, a highly stable reference voltage can be obtained even with changes in ambient temperature.

The present invention is not limited to the above embodiments, and various modifications can be made.

For example, the constant voltage circuit 5 in the example circuit shown in FIG. 3 is as shown in the modified example of FIG.
By connecting the base and collector through the resistor _{R11 ,} the change in the voltage between the collector and emitter is reduced in response to potential fluctuations at the terminal _Vref . It may be configured by three npn transistors _Q15 to _Q17 , a constant current sinking transistor _Q6 , and an oscillation prevention capacitor _C1 . With such a configuration, it becomes easy to determine the resistance value. That is, resistors R ₉ , R ₁₀ and constant current drive transistor Q ₂
The resistors R ₅ connected to are both 12KΩ, and the resistor R ₁₁ is 600Ω.
Ω.

FIG. 5 shows another embodiment of the present invention. The difference from the circuit shown in FIG. 3 is that the control circuit 6 is replaced with a pnp transistor Q ₁₉ and an npn transistor.
_Q18 , and the level shift diode in the level shift circuit 7 has been removed. In this way, the control circuit 6
By providing the pnp transistor 6, the circuit can start operating earlier when the power supply voltage rises. Incidentally, operation can be started at a voltage 0.6V lower than that of the circuit shown in FIG.

Furthermore, each element shown in FIG. 3 can be modified in the following aspects.

(1) Remove collector resistor R ₇ of transistor Q ₉ .

(2) Insert a resistor between the emitter and base of transistor _Q9 .

(3) Connect the pnp transistor of transistor _Q9 in a current mirror connection.

(4) Let the current flowing through diode _D1 be a constant current.

(5) Insert a resistor into any electrode of the transistor.

(6) Transistor _Q12 is pnp.

(7) One, two, or all of the bases of transistors Q ₂ , Q ₁₀ , and Q ₁₁ are biased by resistance division from Vref.

(8) Connect each arbitrary transistor to Darlington.

(9) Remove the emitter resistor _R1 of transistor _Q7 and insert a resistor between the base and collector of transistor _Q8 .

The present invention can be widely used as a reference voltage source circuit.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of the reference voltage source circuit used by the inventor for experiments, Figure 2 is a circuit diagram when a stabilized power supply circuit is added to Figure 1, and Figure 3 is a circuit diagram of the reference voltage source circuit used by the present inventor for experiments. An example circuit diagram of such a reference voltage source circuit,
FIG. 4 is a partially enlarged circuit diagram in another example of the present invention,
FIG. 5 is a circuit diagram illustrating a further example of the present invention. DESCRIPTION OF SYMBOLS 1... Reference voltage source circuit, 2... Stabilized power supply circuit, 3... Starting circuit, 4... Constant current source circuit, 5...
... Constant voltage circuit, 6 ... Control circuit, 7 ... Level shift circuit, Q ₁ to _{Q 24} ... Transistor, R ₁ to R ₁₄
...resistor, D ₁ , D ₂ ... diode, C ₁ ... capacitor.

Claims (1)

[Claims] 1. A constant voltage circuit that generates a predetermined reference voltage from its output terminal, a control transistor whose collector-emitter path is connected between a power supply terminal and the output terminal of the constant voltage circuit, and the constant voltage circuit. A reference voltage source circuit comprising a constant current circuit for generating a constant current in response to the reference voltage generated from the output terminal of the control transistor and supplying the constant current to the base of the control transistor, The constant current circuit further includes a level shift circuit that generates a voltage whose level is shifted by a predetermined voltage level from the reference voltage, and the emitter of the constant current circuit is grounded via a resistor.
An NPN transistor, a first PNP transistor whose base and collector are connected, and a first PNP transistor whose emitter and base are connected, respectively.
a second PNP transistor connected to the emitter and base of the PNP transistor; the base and collector of the first PNP transistor are connected to the collector of the NPN transistor; A collector of the PNP transistor is connected to the base of the control transistor, and a level shift voltage generated from the level shift circuit is applied to the emitter of the first PNP transistor and the emitter of the second PNP transistor. A reference voltage source circuit characterized by: