JPS61132082A - Current type inverter - Google Patents

Current type inverter

Info

Publication number
JPS61132082A
JPS61132082A JP59253281A JP25328184A JPS61132082A JP S61132082 A JPS61132082 A JP S61132082A JP 59253281 A JP59253281 A JP 59253281A JP 25328184 A JP25328184 A JP 25328184A JP S61132082 A JPS61132082 A JP S61132082A
Authority
JP
Japan
Prior art keywords
current
base
transistor
circuit
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59253281A
Other languages
Japanese (ja)
Other versions
JPH036743B2 (en
Inventor
Masatake Metsugi
目次 正武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59253281A priority Critical patent/JPS61132082A/en
Publication of JPS61132082A publication Critical patent/JPS61132082A/en
Publication of JPH036743B2 publication Critical patent/JPH036743B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To economically transmit power to a load even in a range that the frequency is high by composing a power inverter of a series unit of a diode and a transistor. CONSTITUTION:A power reactor 1 has power modules 17-19 of thyristors, and a power inverter 6 has power modules 61, 62 of transistors and power modules 65-68 of diodes. The base drive circuit 7 of the transistor has a base drive signal generator 70 and base drive amplifiers 71-74. The generator 70 generates a timing signal of switching the modules 61, 62 of the transistors with a voltage zero point as a reference from the signal of a voltage detector 35 for the load voltage at normal time.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は電力変換装置のうち商用周波数の交流電力を
1より高い周波数の交流に変換する装置、いわゆる高周
波インバータのうち特に電流]婦インバータに関するも
のである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a power conversion device that converts AC power at a commercial frequency to AC power at a frequency higher than 1, particularly a high-frequency inverter. It is something.

〔従来の技術〕[Conventional technology]

第7図は従来の電流形インバータを示す回路図であり、
図において(1)はサイリスタ(ロ)〜QISのブリッ
ジ接続で構成された順変換回路、(2)は直流リアクト
A/、(3)はサイリスタ6])〜−のブリッジ接続で
構成された逆変換回路、(4)は負荷電圧の検出信号を
受けて逆電圧時間を確保するタイミングでサイリスタ(
6)〜ate 01)〜@4を点弧させる信号を出すゲ
ート制御回路、(5)はコンデンサ悴υとコイA/lZ
とからなる並列共振回路である。
FIG. 7 is a circuit diagram showing a conventional current source inverter.
In the figure, (1) is a forward conversion circuit consisting of a bridge connection of thyristor (b) to QIS, (2) is a forward conversion circuit consisting of a bridge connection of thyristor (b) to QIS, (2) is a reverse conversion circuit consisting of a bridge connection of thyristor (6) to -. The conversion circuit (4) receives the load voltage detection signal and converts the thyristor (
6) ~ate 01) ~ Gate control circuit that outputs a signal to fire @4, (5) is the capacitor S υ and Coil A/lZ
It is a parallel resonant circuit consisting of

次に動作について説明する。順変換装置(1)のサイリ
スタ(ロ)〜αQはゲート制御回路(4)のゲート信号
により負荷電圧が所定の値となる位相角で通流し端子R
8Tの三相交流側からの電力を端子P、、Nへ直流電圧
に変えて出す。直流リアクトA/ (2)は次の 。
Next, the operation will be explained. The thyristors (B) to αQ of the forward converter (1) conduct at the phase angle at which the load voltage reaches a predetermined value according to the gate signal of the gate control circuit (4), and connect to the terminal R.
The power from the three-phase AC side of the 8T is converted to DC voltage and output to terminals P, N. DC reactor A/ (2) is as follows.

逆変換回路(3)1並列共振回路(5)を経由する閉回
路中の電流を1はぼ定電流とみなせる程度に平滑化する
作用をする。逆変換回路(3)のサイリスタ(2)〜−
は自己消弧能力がないため、第8図に示す各部の電圧電
流波形のように常に進み力率で運転し第8図(b)に示
tTsなるサイリスタのターンオフタイム以上の逆電圧
期間を設けるようにゲート制御回路(4)で制御してい
る。(至)はそのタイミングを決める基点となるべき負
荷電圧の零点を検出するための電圧検出器である。サイ
リスタ6])CI41.!1.サイリスタに)−が交互
に導通を繰返すことによって並列共像回路(5)には第
5図(alに示すような正弦波の電圧Vと方形波の電流
iが与えられる。
The inverse conversion circuit (3) acts to smooth the current in the closed circuit passing through the parallel resonant circuit (5) to such an extent that it can be regarded as an approximately constant current. Thyristors (2) to - of the inverse conversion circuit (3)
Since it does not have a self-extinguishing ability, it is always operated with a leading power factor as shown in the voltage and current waveforms of each part shown in Fig. 8, and a reverse voltage period of tTs, which is longer than the thyristor turn-off time shown in Fig. 8 (b), is provided. This is controlled by the gate control circuit (4). (to) is a voltage detector for detecting the zero point of the load voltage, which is the reference point for determining the timing. Thyristor 6]) CI41. ! 1. By repeating alternate conduction of the thyristors), a sinusoidal voltage V and a square wave current i as shown in FIG. 5(al) are applied to the parallel conimage circuit (5).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の電流形インバータは以上のように、サイリスタを
転流失敗させることなく正常に動作させるためには1サ
イリスタのターンオフタイム以上の逆電圧時間を設ける
必要がある。従って、周波数が高い領域になって1サイ
ク〃の周期が短かくなっても常に一定時間(およそ80
μs!c)の逆電圧時間すなわち電圧電流6位相差時間
を必要とするため一力率が非常に悪くなり負荷へ経済的
に電力を送ることができないという問題点があった。こ
の場合、ターンオフタイムの短かいサイリスタを採用す
ることも考えられるが、定格電圧を同一とすると製作が
困難なことから高価となる問題点があった。
As described above, in the conventional current source inverter, in order to operate the thyristor normally without commutation failure, it is necessary to provide a reverse voltage time longer than the turn-off time of one thyristor. Therefore, even if the frequency becomes high and the period of one cycle becomes short, it will always take a certain period of time (approximately 80
μs! Since the reverse voltage time (c), that is, six voltage-current phase difference times is required, there is a problem that the power factor becomes extremely poor, making it impossible to economically send power to the load. In this case, it may be possible to use a thyristor with a short turn-off time, but if the rated voltage is the same, it would be difficult to manufacture and therefore expensive.

この発明は上記のような問題点を解消するためになされ
たもので、安価でかつ周波数が高い領域でも負荷に経済
的に電力を送ることのできる電流形インバータを得るこ
とを目的とする。
The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a current source inverter that is inexpensive and can economically send power to a load even in a high frequency range.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る電流形インバータは、ダイオードとトラ
ンジスタの直列構成からなる逆変換回路と、上記トラン
ジスタのベース駆動回路とを備えたものである。
A current source inverter according to the present invention includes an inverse conversion circuit formed of a series configuration of a diode and a transistor, and a base drive circuit for the transistor.

〔作用〕[Effect]

この発明におい七は、トランジスタのベースドライブに
より逆変換回路を構成したので、電圧零点前の必要時間
がサイリスタ式の逆電圧時間に比較して低減される。
Seventh aspect of the present invention is that the inverse conversion circuit is configured by driving the base of a transistor, so that the time required before the voltage reaches zero point is reduced compared to the inverse voltage time of the thyristor type.

〔実施例〕        。〔Example〕 .

以下、この発明の一実施例を図について説明する。第1
図において、(1)はサイリスタのパワーモジニー/L
/(ロ)〜Q埴で構成された順変換回路、(2)は直流
リアクトμ、(6)はトランジスタのパワーモジニ−I
L/@14mとダイオードのパワーモジニーlv−〜−
で構成された逆変換回路、(5)はコンデンサIIとコ
イ/I/wで構成された並列共振口1路s@lは電圧検
出器、―は電流検出器、(7)はペースドライブ信号発
生回路−とペースドライブアンプヴυ〜(741で構成
された。トランジスタのベース駆動回路である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is the power modulation/L of the thyristor.
/(b) ~ Forward conversion circuit composed of Q-shaped cells, (2) is DC reactor μ, (6) is transistor power modi-I
L/@14m and diode power mod LV---
(5) is a parallel resonance port 1 path composed of capacitor II and coil/I/w s@l is a voltage detector, - is a current detector, (7) is a pace drive signal It consists of a generation circuit and a pace drive amplifier υ (741). It is a base drive circuit of a transistor.

次に、上記のように構成された電流形インバータの動作
について説明する。但し、順変換側回路の動作は従来と
同様であるから説明を省略する。
Next, the operation of the current source inverter configured as described above will be explained. However, since the operation of the forward conversion side circuit is the same as the conventional one, the explanation will be omitted.

ベースドライブ信号発生回路σqでは1定常時の負荷電
圧についての電圧検出器(至)の信号から、電圧零点を
基準としてトランジスタのパワーモジニーlvmill
 1Bの切換のタイミング信号を発生している。
The base drive signal generation circuit σq calculates the power modulus of the transistor lvmill with reference to the voltage zero point from the signal of the voltage detector (to) for the load voltage at one steady state.
1B switching timing signal is generated.

その信号がベースドライブアンプff1l−Hニ与、t
うれ、パワーモジニー/L’(財)−の内部トランジス
タ(61a) (62b)および(61b) (62a
)を交互に、駆動して出力電流の経路を切換えている。
The signal is applied to the base drive amplifier ff1l-H, t
Yes, the internal transistors (61a) (62b) and (61b) (62a
) are alternately driven to switch the output current path.

この切換動作中は全トランジスタが流通している瞬間が
金、す、その重なり期間は負荷条件で異なってくる。そ
こで負荷電流の零点を1電流検出器−の信号で確認し、
ベースドライブ(In (70a) (70b)のタイ
ミングが電圧零点と電流零点が一定範囲内におさまるよ
うにフィードバック2一プで制御している。第8図(A
)はベースドライブアンプクυとトランジスタの1組(
61a)の詳細図でベースドライブアンプク0はトラン
ジスタ(61a)を駆動中は端子(71a)から(71
b)。
During this switching operation, there is a moment when all transistors are in communication, and the overlapping period differs depending on the load conditions. Therefore, check the zero point of the load current using the signal from the 1 current detector,
The timing of the base drive (In (70a) (70b) is controlled by feedback 2-p so that the voltage zero point and current zero point are within a certain range.
) is a pair of base drive amplifier υ and a transistor (
In the detailed diagram of 61a), base drive amplifier 0 is connected from terminal (71a) to (71a) while driving transistor (61a).
b).

に第8図(B)の電流波形に示すトランジスタの駆動ベ
ース電流IB、を流し8Rダーリントン接続形のトラン
ジスタ(61a)を飽和領域Cζ駆動している。
A driving base current IB of the transistor shown in the current waveform of FIG. 8(B) is applied to drive the 8R Darlington connection type transistor (61a) in the saturation region Cζ.

次の半すイクμには端子(71b)から(71a)に電
圧を加えて電流波形に示すIB2の蓄積キャリヤ放出の
電流を流して速やかなトランジスタ(61a)の電流し
ゃ断動作を行わせ、その後は微弱な外乱等では誤動作し
ないようにバイアス電圧をかけている。
In the next half-circuit μ, a voltage is applied from the terminal (71b) to (71a) to flow a current for discharging the accumulated carriers of IB2 shown in the current waveform to quickly cut off the current of the transistor (61a), and then A bias voltage is applied to prevent malfunction due to weak disturbances.

なお、トランジスタの駆動ベース電流IB1を流すとト
ランジスタは1μ弐程度の遅れでコレクタからエミッタ
に電流I(が通流するのに対しトランジスタしゃ断のた
めのキャリヤ吸収電流IB2を流してもIB2が流れ続
けている時間中はトランジスタは電流阻止能力が回復し
ていなく、かなり長い時間(5〜20μs!c)コレク
タからエミッタへの電流Icを流し続けるのでベースト
ライブ信号発生回路−の端子(7oa) (70b)の
信薔は同一タイミングで相互に反転するものであっても
自動的に全トランジスタの通流の期間が確保できる。し
かしその重なり期間が、自然転流する期間より長くなる
と負荷のコンデンサ’6Qの放電回路を形成して大電流
が流れるためトランジスタの責務が急増しついには破壊
に至る危険があるため逆流阻止用のダイオード(至)〜
關が必要である。
Note that when the drive base current IB1 of the transistor is applied, the current I (I) flows from the collector to the emitter of the transistor with a delay of about 1μ2, but even if the carrier absorption current IB2 for transistor cutoff is applied, the current IB2 continues to flow. During this period, the current blocking ability of the transistor has not recovered, and the current Ic continues to flow from the collector to the emitter for a fairly long time (5 to 20 μs!c). ) can automatically ensure a period of conduction for all transistors even if they are mutually inverted at the same timing.However, if the overlapping period is longer than the period of natural commutation, the load capacitor '6Q Since a discharge circuit is formed and a large current flows, the duty of the transistor increases rapidly, and there is a risk that it may eventually be destroyed.
A connection is necessary.

逆に端子(70a)、(7ob)の信号が共に休止する
空白期間がある場合はトランジスタ(61aX61b)
(62a)(62b)が全部通流阻止の状態が発生する
。このとき、直流リアクト/l/ (2)は電流を継続
させようと作用し高電圧を発生するので通流阻止の動作
をしtこトランジスタは絶縁破壊されてしまうことにな
る。
Conversely, if there is a blank period in which the signals of terminals (70a) and (7ob) are both at rest, the transistor (61aX61b)
(62a) and (62b) are all blocked. At this time, the DC reactor /l/ (2) acts to continue the current and generates a high voltage, which acts to block current flow and cause dielectric breakdown of the transistor.

従ってこの現象を防止するためには必ず電流を転流させ
て直流リアクト1v(2)の電流が継続する回路を確保
しながら交互をこ切換えることが条件となる。
Therefore, in order to prevent this phenomenon, it is necessary to commutate the current to ensure a circuit in which the current of the DC reactor 1v(2) continues, and to switch alternately.

本回路では基本的に逆電圧時間は不要なのでサイリスタ
式と異なり遅れ力率による運転も可能であるが、遅れ力
率の場合は転流しようとする回路に逆電圧が増勢しつつ
あり進み力率の状態に比較して転流の推進力は弱いため
、完全1ζ転流が完了しないうちにトランジスタが通流
阻止をする可能性が高く、この時は全トランジスタ通流
阻止に準する過電圧を発生し、トランジスタを破壊する
危険性が大きい。
This circuit basically requires no reverse voltage time, so unlike the thyristor type, it is possible to operate with a lagging power factor, but in the case of a lagging power factor, the reverse voltage is increasing in the circuit to be commutated, resulting in a leading power factor. Since the driving force for commutation is weak compared to the state of However, there is a great risk of destroying the transistor.

従って安定と安全を確保するために第2図(a)〜(i
)に示すようにわずかな進み力率で制御し運転を行う。
Therefore, in order to ensure stability and safety, Figure 2 (a) to (i)
), the operation is controlled with a slight lead power factor.

従って、ベースドライブ信号のタイミングはトランジス
タのしゃ断動作時間(IB2が流レテカラ全OFF状態
になるまでの時間)を考慮して転流時間が確保できる状
態に制御される。通常転流型なり時間は6μ式程度なの
で電圧零点前5〜20μ式のタイミングが得られること
になり、サイリスタ式の逆電圧時間(80a弐以上)に
対して格段に短かい時間となり高周波でも高力率の運転
が可能となる。
Therefore, the timing of the base drive signal is controlled in such a manner that the commutation time can be secured in consideration of the transistor's cut-off operation time (the time until IB2 is completely turned off). Since the commutation type normally has a time of about 6 μm, it is possible to obtain a timing of 5 to 20 μm before the voltage zero point, which is much shorter than the reverse voltage time of the thyristor type (80 μm or more), and even at high frequencies. Power factor operation becomes possible.

第4図は第2図における転流の部分と第8図(B)1の
ベース駆動電流の関係を時間軸を拡大して示したもので
ある。
FIG. 4 shows the relationship between the commutation portion in FIG. 2 and the base drive current in FIG. 8(B) 1 on an enlarged time axis.

この図においてコレクターエミッタ間電流ICは対のト
ランジスタが通流を開始したため負荷回路の電圧の方向
が転流を助勢するのでキャリヤの吸収いかんにかかわら
ず減少して転流を完了する。
In this figure, the collector-emitter current IC decreases regardless of whether carriers are absorbed or not, and the commutation is completed because the direction of the voltage in the load circuit assists the commutation since the paired transistors have started conducting.

この゛ときのトランジスタは電流kが流れているときキ
ャリヤ吸収電流IB2を流して通流阻止をした時と異な
り、はるかに飽和の深い状態からの通流阻止であり、か
つコレクタからベースへの[圧印加がなく、キャリヤ移
動勢力が弱いため、転流開始から電圧零点(T、〜T、
)の時間が短かい時は、T4に示すように電流kが再通
流した後に通流阻止状態になり、この電流のしゃ断によ
りトランジスタの接続されたブリッジの回路インダクタ
ンス務ζ比例した過電圧が発生する。即ち、運転に際し
T1〜T、の約2opsの進み力率相当の時間をもだ、
す力)、電流の大きさを過電圧が許容値に納まるi囲で
運転を行っている。
The transistor at this time is different from the case where the carrier absorption current IB2 is caused to flow when the current k is flowing to block the current flow, and the current flow is blocked from a much deeper state of saturation, and the flow from the collector to the base [ Since there is no pressure applied and the carrier moving force is weak, the voltage zero point (T, ~T,
) is short, as shown in T4, after the current k flows again, the current is blocked, and this current cutoff generates an overvoltage proportional to the circuit inductance ζ of the bridge to which the transistor is connected. do. In other words, during operation, it takes time equivalent to the leading power factor of about 2 ops from T1 to T.
(force) and current within the range i within which the overvoltage is within the allowable value.

この発明の他の実施例は第5図に示すようにトランジス
タ(61a)に対するベース駆動回路(7)は、ベース
とエミッタに接続する第1の回路ユニットσOと、コレ
クタとベースに接続する第2の回路ユニット@■とで構
成されている。
In another embodiment of the present invention, as shown in FIG. 5, the base drive circuit (7) for the transistor (61a) includes a first circuit unit σO connected to the base and emitter, and a second circuit unit σO connected to the collector and base. It consists of a circuit unit @■.

第6図はこの場合の動作を説明したもので第4図と同様
な時点を示している。ここで電流IB1・IB2を流し
ているのは第4図と同様であるが、電流IB2ト同期し
てコレクタからベースに工xなる電15IEヲ流してい
る点が異なる。IB2を流しつつコレクタとベース間に
電圧を加えているため、コレクタとベース間のキャリヤ
がIxなる電流となって速やかに吸収される。従って第
4図の電流IB2の流れる時間に対し60チ以下の時間
(10a式程度)で流れ終えて通流阻止状態となる。
FIG. 6 explains the operation in this case and shows the same point in time as FIG. 4. The flow of currents IB1 and IB2 here is the same as in FIG. 4, but the difference is that current 15IE, ie, current x, is flowed from the collector to the base in synchronization with the current IB2. Since a voltage is applied between the collector and the base while flowing IB2, carriers between the collector and the base become a current Ix and are quickly absorbed. Therefore, the current IB2 ends flowing in a time of 60 inches or less (approximately 10a type) compared to the flow time of the current IB2 shown in FIG. 4, and the current flow is blocked.

なお、上記実施例では逆変換回路(6)の構成として2
素子内鷺形のトランジスタのパワーモジューρll11
1121と1素子のダイオードのパワーモジュー〃−〜
−を示したが、逆に1素子のトランジスタのパワーモジ
ュー/L/4個を直流側に、2素子内薦のダイオードの
パワーモジュール2個を高周波出力側に接続する構成と
しても良い。
In the above embodiment, the configuration of the inverse conversion circuit (6) is 2.
In-element heron-shaped transistor power module ρll11
1121 and 1 element diode power module
- is shown, but conversely, it is also possible to have a configuration in which /L/4 one-element transistor power modules are connected to the DC side and two two-element diode power modules are connected to the high-frequency output side.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によればサイリスタに変えて、汎
用のパワーモジュールのトランジスタとダイオードで構
成したので、装置が安価にでき、また、サイリスタ式よ
りも高い周波数で使用できるという効果がある。
As described above, according to the present invention, since the thyristor is replaced with a transistor and a diode of a general-purpose power module, the device can be made at low cost and can be used at a higher frequency than the thyristor type.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による電流形インバータを
示す回路概念図、第2図はその回路動作説明の波形図、
第8図は第1図のベース駆動回路の接続の詳細及び駆動
電流波形を示す図、第4図は第8図での転流時点の動作
説明の波形図、第5図はこの発明の他の実施例を示すベ
ース駆動回路の接続図、第6図は第6図での転流時点の
動作説明の波形図、第7図は従来のサイリスタ式電流形
インバータの回路概念図、第8図は第7図の回路動作説
明の波形図である。図において、(5)は並列共振回路
、(6)は逆変換回路、(7)はベース駆動回路、ll
1−はトランジスタ、−〜−はダイオードである。 なお、各図中同一符号は同一または相当部分を示す。
FIG. 1 is a conceptual circuit diagram showing a current source inverter according to an embodiment of the present invention, and FIG. 2 is a waveform diagram illustrating the circuit operation.
FIG. 8 is a diagram showing the details of the connection of the base drive circuit in FIG. 1 and the drive current waveform, FIG. 4 is a waveform diagram explaining the operation at the time of commutation in FIG. 8, and FIG. 6 is a waveform diagram explaining the operation at the time of commutation in FIG. 6, FIG. 7 is a circuit conceptual diagram of a conventional thyristor type current source inverter, and FIG. 7 is a waveform diagram illustrating the operation of the circuit shown in FIG. 7. FIG. In the figure, (5) is a parallel resonant circuit, (6) is an inverse conversion circuit, (7) is a base drive circuit,
1- is a transistor, and - to - are diodes. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (2)

【特許請求の範囲】[Claims] (1)並列共振回路を負荷に有する電流形インバータに
おいて、ブリッジ接続された逆変換回路の各辺をトラン
ジスタと逆流阻止用のダイオードとの直列接続構成とし
、上記トランジスタのベース駆動回路を備えたことを特
徴とする電流形インバータ。
(1) In a current source inverter having a parallel resonant circuit as a load, each side of the bridge-connected inverse conversion circuit is configured with a transistor and a reverse current blocking diode connected in series, and a base drive circuit for the transistor is provided. A current source inverter featuring:
(2)ベース駆動回路はベースとエミッタ間に可逆の電
圧を与えてオン動作時のベース電流、オフ動作時のベー
ス・エミッタ間の接合の蓄積キャリア放出電流を流す第
1の回路ユニットと、コレクタからベースに電圧を与え
上記ベース・エミッタ間の接合の蓄積キャリア放出電流
と同期してコレクタ・ベース間の接合の蓄積キャリア放
出電流を流す第2の回路ユニットからなることを特徴と
する特許請求の範囲第1項記載の電流形インバータ。
(2) The base drive circuit includes a first circuit unit that applies a reversible voltage between the base and the emitter to flow the base current during ON operation and the accumulated carrier discharge current at the junction between the base and emitter during OFF operation, and the collector. A second circuit unit that applies a voltage to the base and causes a discharge current of accumulated carriers in the collector-base junction to flow in synchronization with a discharge current of accumulated carriers in the junction between the base and emitter. A current source inverter according to range 1.
JP59253281A 1984-11-29 1984-11-29 Current type inverter Granted JPS61132082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59253281A JPS61132082A (en) 1984-11-29 1984-11-29 Current type inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59253281A JPS61132082A (en) 1984-11-29 1984-11-29 Current type inverter

Publications (2)

Publication Number Publication Date
JPS61132082A true JPS61132082A (en) 1986-06-19
JPH036743B2 JPH036743B2 (en) 1991-01-30

Family

ID=17249097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59253281A Granted JPS61132082A (en) 1984-11-29 1984-11-29 Current type inverter

Country Status (1)

Country Link
JP (1) JPS61132082A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010041769A (en) * 2008-08-01 2010-02-18 Kitashiba Electric Co Ltd Current inverter
JP2010041768A (en) * 2008-08-01 2010-02-18 Kitashiba Electric Co Ltd Current inverter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5889073A (en) * 1981-11-24 1983-05-27 Hitachi Ltd Current type inverter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5889073A (en) * 1981-11-24 1983-05-27 Hitachi Ltd Current type inverter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010041769A (en) * 2008-08-01 2010-02-18 Kitashiba Electric Co Ltd Current inverter
JP2010041768A (en) * 2008-08-01 2010-02-18 Kitashiba Electric Co Ltd Current inverter

Also Published As

Publication number Publication date
JPH036743B2 (en) 1991-01-30

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