JPS61131609A - Oscillating circuit - Google Patents

Oscillating circuit

Info

Publication number
JPS61131609A
JPS61131609A JP59251853A JP25185384A JPS61131609A JP S61131609 A JPS61131609 A JP S61131609A JP 59251853 A JP59251853 A JP 59251853A JP 25185384 A JP25185384 A JP 25185384A JP S61131609 A JPS61131609 A JP S61131609A
Authority
JP
Japan
Prior art keywords
gate
output
capacitor
circuit
inverter gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59251853A
Other languages
Japanese (ja)
Inventor
Shigeru Hosoda
茂 細田
Hideo Ishiguro
石黒 秀雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59251853A priority Critical patent/JPS61131609A/en
Publication of JPS61131609A publication Critical patent/JPS61131609A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To change a duty ratio and a frequency of an oscillated output by inserting a phototransistor (TR) to a feedback circuit of a Schmitt inverter gate. CONSTITUTION:When an output of the Schmitt inverter gate 1 is at a high level, a capacitor 2 is charged through a photodetector element 5, a diode 4 and a resistor 3. When the charging voltage of the capacitor 2 reaches a high level threshold value of the gate 1, the output of the gate 1 is inverted to be at a low level and the capacitor 2 is discharged via a resistor 3 only. When the voltage across the capacitor 2 reaches the low level threshold level of the gate 1, the output of the gate 1 is inverted again to a high level. In changing the impedance of the photodetector 5 by a light emitting diode 6, the charging time constant of the capacitor 2 is made variable and then the duty ratio and the oscillating frequency of the oscillated output of the gate 1 are made variable.

Description

【発明の詳細な説明】 り発明の利用分野1 本発明は、シュミー4トインバータゲートを用いた発香
回路に関する。
DETAILED DESCRIPTION OF THE INVENTION FIELD OF APPLICATION OF THE INVENTION 1 The present invention relates to a fragrance generating circuit using a Schmidt inverter gate.

〔発明の背景J 従来からシュミットインバータゲートに用いた発eb路
として、例えばCq出版社トランジスタ技術1980年
2月号246頁「発香回路」に記載されたものが仰られ
ている。この従来の発振回路の回路図1−第5図及び第
7図に示す。第6図及び第6図は大々第5図及び第7図
に示すシュミ吋トインバータゲート10入力傷号波形と
出力信号波形である。
[Background of the Invention J] Conventionally, as an EB circuit used in a Schmidt inverter gate, there is said to be one described in, for example, "Scenting Circuit", p. 246, Transistor Technology, February 1980, published by Cq Publishing. This conventional oscillation circuit is shown in circuit diagrams 1-5 and 7. 6 and 6 are the input signal waveform and output signal waveform of the Schmidt inverter gate 10 shown in FIGS. 5 and 7, respectively.

1lfLs図に示す発振回路では、シュミットインバー
タゲート1の出力が@H’ レベルの場合、′JP々パ
シタ2が帰還抵抗3tブ「して充電される。この為シュ
ミットインバータゲート1の久方電圧V!は上昇しTu
t(秒)後@Hルベルしきい値電圧vtiに達スると、
シュミ噌トイ/パータゲート1の出力は反転し、@L”
レベルとなる。
In the oscillator circuit shown in Figure 1lfLs, when the output of the Schmitt inverter gate 1 is at the @H level, the 'JP' capacitor 2 is charged through a feedback resistance of 3t. ! rises and Tu
After t (seconds) @H Lebel threshold voltage vti is reached,
Shumiso toy/parter gate 1 output is inverted, @L”
level.

シュミ呼トイノパータゲート1の出力が1Lmレベルと
なると、中々パシタ2に充電されていた電荷は*還抵抗
3ヤ弁して放電される。この為、シェミ吋トインバータ
ゲート10入力゛シ圧Vlは低下し、TL、(秒)後”
Lルベルしきい値電圧VI&に達スると、シュミットイ
ンバータゲート1の出力は反転し、−H”レベルとなる
When the output of the simulator gate 1 reaches the 1Lm level, the charge that had been charged in the pacita 2 is discharged through the return resistor 3. Therefore, the input pressure Vl of the input inverter gate 10 decreases, and after TL, (seconds).
When the L level threshold voltage VI& is reached, the output of the Schmitt inverter gate 1 is inverted and becomes -H'' level.

上記に述べた動作を〈9返すことKよ01本口路は周期
T1■Tl、+’l’、、(秒)の矩形波を出力する。
Returning the above operation by <9, the 01 main path outputs a rectangular wave with a period of T1, Tl, +'l', , (seconds).

里7図に示す発掘回路では、シュミ畔トインバータゲー
ト1の出力がH”レベルの場合、ダイオード4は順万同
礒圧が印加さ几て導通状態となり、キャパシタ2は、帰
還抵抗3′2よび5荀弁して光電される。従って、シュ
ミ吋トインパータゲート1 f)入力’vJT圧+t 
V Xは上昇し、?!+2 L秒】後II H1ルベル
しきいイ@竜圧V!!+に達し、シニミ9トインバータ
ゲート10出力は反転し、−L″レベルなる。
In the excavation circuit shown in Fig. 7, when the output of the Schmidt inverter gate 1 is at H'' level, the diode 4 becomes conductive due to the applied voltage, and the capacitor 2 is connected to the feedback resistor 3'2. Therefore, Schmidt Imperter Gate 1 f) Input 'vJT pressure + t
VX increases, ? ! +2 L seconds】Later II H1 Rubel Threshold I @Dragon Pressure V! ! +, and the output of the inverter gate 10 is inverted and becomes -L'' level.

シュミ岬トインバータゲート1の出力が1Lルベルff
?るとs’イオード4に逆方向電圧が印加されて非導通
状態となり、キャパシタ2に充′峨さ几てい7’(電荷
は帰還抵抗6のみt弁して放電さルる。従ッテ、シュミ
岬トイノパータゲート1の入力早出Vτは低下し、T1
12【秒]後@Vレベルしきい値電圧VIE、に達する
と、シュミ岬トインバー都 タゲート1の出力は反転し、”H″レベルなる。
Shumi Misaki to inverter gate 1 output is 1L level ff
? Then, a reverse voltage is applied to the s' diode 4, which makes it non-conductive, and the capacitor 2 is charged and discharged through the feedback resistor 6. The input early output Vτ of Cape Shumi Toinopata gate 1 decreases, and T1
After 12 [seconds], when the V level threshold voltage VIE is reached, the output of the Schmidt gate 1 is inverted and becomes the "H" level.

上記に述へた動作にくり返すことにより、本口路は自制
T2”TyI2+Tb2(秒]の矩形波を出力する。
By repeating the above-described operation, the main exit path outputs a rectangular wave of self-control T2''TyI2+Tb2 (seconds).

第5図の発振回路の出力信書のデユーティ比及び発振周
波数f、は、夫々’1’i+/(TII*+Tc+ )
−i++50X(’、’Ti+中Tc+ )及びf+−
1/(T11++Tb1)HEどなる。また、W、7図
の発条回路の出力信号のデユーティ比及び発畿周波数f
2は、大々TI2/(Ti2+’l’b2)及びf2s
1/(’1’w2+T&2]H”となる。これ等の値は
いずれも一定値である。つまり、シュず一トインバータ
ゲート會用−た従来の発掘回路は、デユーティ−比及び
発珈尚波数を任意の傭に変化さぜることかで@ないとい
う欠点を有している。
The duty ratio and oscillation frequency f of the output letter of the oscillation circuit in FIG. 5 are '1'i+/(TII*+Tc+), respectively.
-i++50X(','Ti+Tc+) and f+-
1/(T11++Tb1) HE roars. In addition, W, the duty ratio and firing frequency f of the output signal of the spring circuit in Figure 7
2 is roughly TI2/(Ti2+'l'b2) and f2s
1/('1'w2+T&2]H". All of these values are constant values. In other words, the conventional excavation circuit used for Schudzut inverter gates has a duty ratio and a It has the disadvantage that it is not possible to change the wave number arbitrarily.

し発明の目的〕 本発明の目的は、シュミイトインバータゲートを用いた
チューティ比及び発振周波数が可変な発撮向路七揚供す
ることにある。
OBJECTS OF THE INVENTION It is an object of the present invention to provide an oscillation path using a Schmidt inverter gate in which the Tute ratio and oscillation frequency are variable.

(発明の概要〕 発掘回路の帰還胞路内に、受九量によってイノビーダン
スが変化する受元素子金設け、受元素子の受元量を任意
に変化させて発振回路の出力のデユーティ−比pよび発
香周波数を可変にする。
(Summary of the invention) A receiving element whose innovidance changes depending on the receiving quantity is provided in the return channel of the excavation circuit, and the duty ratio of the output of the oscillation circuit is changed by arbitrarily changing the receiving quantity of the receiving element. and make the fragrance frequency variable.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例ig+図乃至第4図を参照して
説明する。
Hereinafter, one embodiment of the present invention will be described with reference to FIG. ig+ to FIG. 4.

+@1図に2ける発掘回路では、シュミ噌トイノバータ
ゲート10人力邪にキャパシタ2を接続し、シュミイト
イ7バータゲート1の出力信号を入力部に正帰還する帰
還回路として、アノード勿ゲート1の入力部に接続しt
ダイオード4と、該ダイオード4のカソードに直列に接
続し九受尤素子5と菅、帰還抵抗3に並列に接続したも
のを使用している。受元素子5は、これと対に配設さ几
之発元素子6に流す電流の値に応じて、つまり受元量に
応じてそのインピーダンスが変化する。
+@1 In the excavation circuit shown in Figure 2, a capacitor 2 is connected to the inverter gate 10 of the inverter gate 1, and the input of the anode gate 1 is used as a feedback circuit that positively feeds back the output signal of the inverter gate 1 to the input section. Connect to the part
A diode 4, which is connected in series to the cathode of the diode 4, and connected in parallel to a receiving element 5, a tube, and a feedback resistor 3 is used. The impedance of the receiving element 5 changes depending on the value of the current flowing through the receiving element 6 arranged in pair therewith, that is, depending on the amount of the receiving element.

斯かる構成により、第1図に示す発掘回路は、シュミ岬
トイ7バータゲート1の出力が“H”ノベルの場仕、ダ
イオード4に順万同醜圧が印加さ几て導通状態となり、
キャパシタ2は帰還抵抗52よひ受元素子5を弁して光
電される。この為第2因に示すように、シュミ岬トイン
バータゲート1の入力電圧Vxは上昇し、Tl3(秒)
後−H’レベルし言い[′IIL圧Vtiに達し、シュ
ミ噌トインバータゲート1の出力は反転し、゛L′″レ
ベルとなる。
With this configuration, the excavation circuit shown in FIG. 1 has the output of Shumi Misaki Toy 7 barter gate 1 in the "H" novel setting, and the diode 4 is applied with the same pressure and becomes conductive.
The capacitor 2 is photoelectrically operated by the feedback resistor 52 and the receiving element 5. For this reason, as shown in the second factor, the input voltage Vx of the Schmidt inverter gate 1 increases, Tl3 (seconds)
After reaching the -H' level, the IIL voltage Vti is reached, and the output of the simulated inverter gate 1 is inverted and becomes the 'L' level.

シュミ呼トイノバータゲート1の出力d(@]、′″レ
ベルとなると、ダイオード4に逆方向電圧が印加されて
非導通状態となQ、’Payパシタ2に充電さ几ていt
11L荷は帰還抵抗3のみを介して放1さ1、シュミ岬
トインバータゲート1の入力′電圧Vlは抵下し、 T
m3(秒)後゛L°レベルしきい値電圧VtLに達スる
と、シュミ噌トインバータゲート10出力は反転し、”
H″ノベルなる。
When the output d(@) of the inverter gate 1 reaches the ``'' level, a reverse voltage is applied to the diode 4 and it becomes non-conducting.
The 11L load is released only through the feedback resistor 3, and the input voltage Vl of the Schmidt inverter gate 1 drops to T.
After m3 (seconds), when the L° level threshold voltage VtL is reached, the output of the simulated inverter gate 10 is inverted.
It's an H'' novel.

上記に述べた動作’t<r)返すことにより、本口路は
周期T、=a’l’H3+TL3C秒)の矩形波を出力
するが、受″/l、素子5は受ft、tに応じてイノビ
ーダンスが変化するため、本回路に2いて、受ft、 
散’r:変化させるとキャパシタ2の充″IL時間ガ5
紮可変できることになる。
By returning the operation 't<r) described above, the main path outputs a rectangular wave with a period T, = a'l'H3+TL3C seconds). Since the innovidance changes accordingly, there are 2 in this circuit and the received ft,
Flow rate: When changed, the charging time of capacitor 2 is increased by 5.
It will be possible to change the ligature.

従って、発元素子6に流す峨流I會質化させるコトに工
り、キャパシタ2の光電時間Ttxs k約0〜TI、
3 (秒)の範囲で変化させることができる。
Therefore, the photoelectric time Ttxs k of the capacitor 2 is set to about 0 to TI, by creating a strong current I flowing through the power generating element 6.
It can be changed within a range of 3 (seconds).

この為、デユーティ比は約0〜50 (X) 、発振周
波数は’/Tbs〜’/2Tt、5(Hz)の範囲内で
任意の1!VC可変となる。
Therefore, the duty ratio is about 0 to 50 (X), and the oscillation frequency is '/Tbs~'/2Tt, any 1! within the range of 5 (Hz). VC is variable.

第3図は、本発明の別の実施例に係る発振回路の回路図
である。第3図の発BID路に2ける*還吻路として、
アノード紮ゲート1の出力部に接続したダイオード7と
、該ダイオード7のカソードに直列に接続した受光素子
8とを1帰還抵抗3に並列に接続したものを使用してい
る。そして、発覚素子9に流す′題fiIk変えること
により、受光素子7の受光量を変えるようにしである。
FIG. 3 is a circuit diagram of an oscillation circuit according to another embodiment of the present invention. As the *return route to the departure BID route in Figure 3,
A diode 7 connected to the output part of the anode ligation gate 1 and a light receiving element 8 connected in series to the cathode of the diode 7 are connected in parallel to one feedback resistor 3. The amount of light received by the light receiving element 7 is changed by changing the subject fiIk that is applied to the detection element 9.

第1図の発振回路はキャパシタ2の充電時間Tyzaを
変化させるものであるのに対し、第3図の発振@J@は
充′!iE@間Thkf化させるものである。第3図の
発振回路では、デユーティ比を約50〜100(%)“
、発振周波数kl/Tma〜1/2Tma(Hz)の範
囲で任意の値に可変となる。
The oscillation circuit of FIG. 1 changes the charging time Tyza of the capacitor 2, whereas the oscillation @J@ of FIG. 3 changes the charging time Tyza of the capacitor 2. This is to convert iE@ to Thkf. In the oscillation circuit shown in Figure 3, the duty ratio is approximately 50 to 100 (%).
, the oscillation frequency can be varied to any value within the range of kl/Tma to 1/2Tma (Hz).

第4図は、本発明の更に別の実施例に係る発車1路の1
路幽である。第4図の発掘回路に2ける帰過画路として
、γノードtゲート1の入力部に接続しtダイオード4
と該ダイオード40カソードに直列に接続した受光素子
5から成る一路と、アノード荀ゲート1の出力部に接続
したタイオード7と該ダイオード7のカソードに市夕1
1に!続しt受光素子8から成る一路とを、並列に接続
したもの會使用している。そして、夫々の受光素子5゜
8の受光量は、夫々に対向する発覚素子6,9に流す′
峨流11+I2によって変えるようにしである。
FIG. 4 shows one of the departure routes according to yet another embodiment of the present invention.
It's a road trip. As a return path in the excavation circuit of FIG.
a diode 40 connected in series to the cathode of the photodetector 5; a diode 7 connected to the output of the anode gate 1; and a diode 7 connected to the cathode of the diode 7.
To 1! A pair of light receiving elements 8 connected in parallel is used. The amount of light received by each light-receiving element 5.8 is sent to detection elements 6 and 9 facing each other.
It is supposed to be changed by the current 11+I2.

斯かる構成により、第4図の発振回路は、シュi吋トイ
ンパータゲート1の出力が@H#レベルの場合、ダイオ
ード4は頗万同′峨圧が印加されて導通状態となり、ダ
イオード7は逆方向電圧が印加されて非導通状態となる
。このtめ、キャパシタ2は受光素子5を弁して光電さ
れることにより、シュミ岬トイ7共−タゲート1の入力
電圧vXが上昇し、7w5(秒)後−8”レベルしきい
値電圧V工。
With such a configuration, in the oscillation circuit shown in FIG. 4, when the output of the shutter inverter gate 1 is at the @H# level, the diode 4 becomes conductive due to the application of high pressure, and the diode 7 becomes conductive. A reverse voltage is applied, resulting in a non-conducting state. At this time, the capacitor 2 is photoelectronized by activating the light receiving element 5, so that the input voltage vX of the Shumi Misaki toy 7 and the gate 1 rises, and after 7W5 (seconds), the threshold voltage V is at the -8'' level. Engineering.

に達し、シュミリトインバータゲート1の出力は反転し
、゛L″レベルとなる。
The output of the simulation inverter gate 1 is inverted and becomes the "L" level.

シュミ吋トイ7バータゲート1の出力が@L”レベルと
なると、ダイオード4は逆万同峨圧が印■さnて非導通
状態となり、ダイオード7は順方向り圧がt=i17F
Oさ几て導通状態となる。これによりキャパシタ2に充
電されていtシ荷は受光素子8r弁して放電され、シュ
ミダトイ/ノ(−タゲート1の入力電圧は低下し、Tc
5(秒)後′L″ノベルしきい値シ圧VIムに違し、シ
ュミ噌トインノ(−タゲート10出力は反転し、−H”
レベルとなる。
When the output of the inverter gate 1 becomes @L'' level, the diode 4 becomes non-conductive due to the reverse pressure applied to it, and the diode 7 has a forward pressure of t=i17F.
When the temperature decreases, it becomes conductive. As a result, the load charged in the capacitor 2 is discharged through the light-receiving element 8r, and the input voltage of the gate 1 decreases and Tc
After 5 (seconds) 'L'', the threshold voltage is different from VI, and the output of -taggate 10 is inverted and -H''.
level.

上記に述べた動作勿〈り返すことによって、本回路は周
期T5=Ti5+Tt、5(秒)の矩形波を出力する0
本回路は、キャパシタ2の充電時間T115D工ひ放電
時間Tr、5’<発大素子6に流す電流112よひ発覚
素子8に流す電流工2によって2のおの任意に変化さぜ
ることができるためにデユーティ−比は2Lそ0〜10
旧%)、発振周波数は数1001    の広範囲で可
変になる。
By repeating the above-mentioned operation, this circuit outputs a rectangular wave with period T5=Ti5+Tt and 5 (seconds).
This circuit can be changed arbitrarily by changing the charging time T115D of the capacitor 2, the discharge time Tr, 5'<the current 112 flowing through the generator element 6, and the current 2 flowing through the detector element 8. To do this, the duty ratio is 2L, so 0 to 10.
%), the oscillation frequency can be varied over a wide range of several thousand.

K〜TM5+TX、sHz また、本発明の受光素子と発覚素子は、電気的に絶縁さ
1ている之めに、発frS素子に流す電流Ik iv+
御する一路は、発撮口路側の鴫僅ケ考慮する必要がなく
、回路勿簡略化することができる。
K~TM5+TX, sHz Furthermore, since the light-receiving element and the detection element of the present invention are electrically insulated, the current Ik iv+ flowing through the emitting frS element is
There is no need to take into account any problems on the side of the emission port, and the circuit can be simplified.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、簡単な回路構成で発振回路の出力信号
のチューティ比2Lひ発振周波数に任意に可変できると
いう効果がある。
According to the present invention, there is an effect that the tutee ratio of the output signal of the oscillation circuit can be arbitrarily varied to 2L and the oscillation frequency with a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例に係る発′It1回路の回路
図、第2図は第1図の発ab路の入出力電圧波形図、第
3図は本発明の別の実施例に係る発振回路の一路図、第
4図は本発明の更に別の実施例に係る発車[g回路の回
路図である。第5図は従来の発振回路の一路図、第6図
は第5回の発S口路の人出力竜圧波形図、第7図は従来
の別の発掘回路の回路図、鷹8図は第7図の発振回路の
入出力電圧波形図でろる。 1・・・シ、ミ岬トインバータ、2・・・:Pヤバシタ
、3・・・命還抵抗、4.7・・・ダイオード、5.8
・・・受光素子、6.9・・・発覚素子。 1.−″ニー==パ゛・、。 第1図 才2面− 才3図 牙4図
FIG. 1 is a circuit diagram of the source It1 circuit according to one embodiment of the present invention, FIG. 2 is a diagram of input and output voltage waveforms of the source ab path of FIG. 1, and FIG. 3 is a diagram of another embodiment of the present invention. FIG. 4 is a circuit diagram of a starting circuit according to still another embodiment of the present invention. Fig. 5 is a line diagram of a conventional oscillation circuit, Fig. 6 is a waveform diagram of the human output pressure waveform of the fifth oscillation route, Fig. 7 is a circuit diagram of another conventional excavation circuit, and Fig. 8 is a circuit diagram of another conventional excavation circuit. The input/output voltage waveform diagram of the oscillation circuit in FIG. 7 is shown. 1... Shi, Misaki inverter, 2...:P Yabashita, 3... Life return resistor, 4.7... Diode, 5.8
... Light receiving element, 6.9... Detection element. 1. -''nee==p...

Claims (1)

【特許請求の範囲】[Claims] 1、入力部にキャパシタを接続したシュミットインバー
タゲートと、該シュミットインバータゲートの出力信号
を入力部に正帰還する帰還回路とを有して成る発振回路
において、受光量に応じてインピーダンスが変化する受
光素子を前記帰還回路に設け、該受光素子の受光量を変
化させて、発振回路の出力信号のデューティ比及び発振
周波数を可変にすることを特徴とする発振回路。
1. In an oscillation circuit comprising a Schmitt inverter gate with a capacitor connected to the input part and a feedback circuit that positively feeds back the output signal of the Schmitt inverter gate to the input part, the impedance changes depending on the amount of light received. An oscillation circuit characterized in that an element is provided in the feedback circuit, and the amount of light received by the light receiving element is changed to make the duty ratio and oscillation frequency of the output signal of the oscillation circuit variable.
JP59251853A 1984-11-30 1984-11-30 Oscillating circuit Pending JPS61131609A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59251853A JPS61131609A (en) 1984-11-30 1984-11-30 Oscillating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59251853A JPS61131609A (en) 1984-11-30 1984-11-30 Oscillating circuit

Publications (1)

Publication Number Publication Date
JPS61131609A true JPS61131609A (en) 1986-06-19

Family

ID=17228891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59251853A Pending JPS61131609A (en) 1984-11-30 1984-11-30 Oscillating circuit

Country Status (1)

Country Link
JP (1) JPS61131609A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10444757B2 (en) 2016-02-03 2019-10-15 Positec Power Tools (Suzhou) Co., Ltd. Self-moving device and control method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10444757B2 (en) 2016-02-03 2019-10-15 Positec Power Tools (Suzhou) Co., Ltd. Self-moving device and control method therefor

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