JPS611299A - Drive circuit of floppy disk device - Google Patents
Drive circuit of floppy disk deviceInfo
- Publication number
- JPS611299A JPS611299A JP11888784A JP11888784A JPS611299A JP S611299 A JPS611299 A JP S611299A JP 11888784 A JP11888784 A JP 11888784A JP 11888784 A JP11888784 A JP 11888784A JP S611299 A JPS611299 A JP S611299A
- Authority
- JP
- Japan
- Prior art keywords
- drive circuit
- pitch error
- phase
- pulse motor
- feeding pitch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000737 periodic effect Effects 0.000 abstract description 3
- 230000001276 controlling effect Effects 0.000 abstract 1
- 230000001105 regulatory effect Effects 0.000 abstract 1
- 230000005284 excitation Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 230000005279 excitation period Effects 0.000 description 2
- 239000000779 smoke Substances 0.000 description 2
- 206010000496 acne Diseases 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B21/00—Head arrangements not specific to the method of recording or reproducing
- G11B21/02—Driving or moving of heads
- G11B21/08—Track changing or selecting during transducing operation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
- H02P8/12—Control or stabilisation of current
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Stepping Motors (AREA)
- Moving Of The Head To Find And Align With The Track (AREA)
Abstract
Description
【発明の詳細な説明】
く技術分野〉
本発明は、フロッピーディスク装置(以下FD装置と略
記する)、特にそのへyドキャリノヂ送りのパルスモー
ク駆動回路の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a floppy disk device (hereinafter abbreviated as FD device), and particularly to an improvement in a pulse smoke drive circuit for feeding the head carriage.
〈従来技術〉
従来、FD装置のパルスモーク駆動回路としては、第4
図に示すような回路が知られている。<Prior art> Conventionally, as a pulse smoke drive circuit of an FD device, the fourth
A circuit as shown in the figure is known.
ヘッドの移動方向を示すDIR信号及び移動命令である
5TEP信号の入力で、制御回路1は所定時間vH倍信
号出力し、トランジスタ6をONして駆動回路へ12V
の電圧を印加する。4相パルスモータの各相コイ/I/
7〜10は、制御回路1の出力A、A、B、B信号に従
って、2−2励磁駆動のためのトランジスタ2〜5によ
り適宜駆動され、ヘッド送りがなされる。所定時間経過
後、トランジスタ6はOFFし、パルスモータは5■の
電圧(最後の組合せのオン状態はそのまま保持)で停止
位置を保持する。Upon input of the DIR signal indicating the direction of movement of the head and the 5TEP signal, which is a movement command, the control circuit 1 outputs a signal multiplied by vH for a predetermined time, turns on the transistor 6, and supplies 12V to the drive circuit.
Apply a voltage of Each phase coil of 4-phase pulse motor /I/
7 to 10 are suitably driven by transistors 2 to 5 for 2-2 excitation drive in accordance with output signals A, A, B, and B of the control circuit 1, and head feeding is performed. After a predetermined period of time has elapsed, the transistor 6 is turned off, and the pulse motor is maintained at the stopped position at a voltage of 5.5 cm (the on state of the last combination is maintained).
このような駆動回路は、パルスモータ自身が有する停止
位置誤差に対する考慮がなされておらず、例えば、1ト
ランク−1ステツプで送り機構を構成した場合、第5図
に示すように4トランクの周期、即ち相励磁周期で繰返
す送りピンチ誤差を生じる。Such a drive circuit does not take into account the stop position error of the pulse motor itself. For example, if a feed mechanism is configured with one trunk and one step, the cycle of four trunks, as shown in FIG. In other words, a feed pinch error occurs that repeats in the phase excitation period.
もう1つ例として、24ステップ/回転の4相モータを
1トランク−4ステツプで送り機構を構成した場合、第
6回に示すように6トランク周期、即ちモータ回転周期
(1回転−6トラツク)で繰返す送りピッチ誤差を生じ
る。As another example, if a 4-phase motor with 24 steps/rotation is configured with a feed mechanism of 1 trunk - 4 steps, as shown in Part 6, there will be 6 trunk cycles, that is, the motor rotation period (1 rotation - 6 tracks). This causes repeated feed pitch errors.
なお、第5図及び第6図は例示であり、1周期内で図示
のような送りピッチ誤差をとるという訳ではなく、各パ
ルスモータによって任意の送りピンチ誤差をとり得る。Note that FIGS. 5 and 6 are illustrative, and the feed pitch error shown in the figures is not taken within one cycle, and each pulse motor can take any feed pinch error.
ここでは、1周期(4トラツク又は6トラノク)毎に送
りピッチ誤差が繰返されるということを示しただけであ
る。Here, it is only shown that the feed pitch error is repeated every cycle (4 tracks or 6 tracks).
これらピッチ誤差は、パルスモータ自身の各相コイルの
不平衡、ヌテータおよびロータの機械的寸法誤差、磁気
的不平衡等および回転−直線変換機構の機械精度による
ものである。These pitch errors are due to unbalance of each phase coil of the pulse motor itself, mechanical dimensional errors of the nutator and rotor, magnetic unbalance, etc., and mechanical precision of the rotation-linear conversion mechanism.
このように従来駆動回路は、パルスモータ等の送りピッ
チ誤差が直接キャリソヂ送り誤差に現われる、という欠
点がある。As described above, the conventional drive circuit has a drawback in that the feed pitch error of the pulse motor or the like directly appears in the carriage feed error.
なお、第4図−:ユニポーラ駆動回路であるが、バイポ
ーラ駆動回路でも同じ欠点を有するものである。Although FIG. 4 shows a unipolar drive circuit, a bipolar drive circuit also has the same drawbacks.
〈発明の目的〉
本発明は、上記欠点であるパルスモータ等の周期的な送
りピッチ誤差を電気的に補正し、ギヘ・リッヂ送りピッ
チ誤差を改善した駆動回路を提供することを目的とする
。<Object of the Invention> An object of the present invention is to provide a drive circuit that electrically corrects the periodic feed pitch error of pulse motors, etc., which is the drawback described above, and improves the Gihe Ridge feed pitch error. .
〈実施例〉 第1図は本発明の一実施例を示すものである。<Example> FIG. 1 shows an embodiment of the present invention.
第1図は4相2−2励磁ユニポーラ駆動、11−ラック
=1ステップの駆動回路である。FIG. 1 shows a 4-phase 2-2 excitation unipolar drive, 11-rack=1 step drive circuit.
各相コイル7〜10と駆動のだめの1−ラフフッ22〜
5間に、それぞれ励磁電流調整のため補正抵抗11〜】
4を挿入し、励磁電流の不平衡により相励磁周期内の各
停止位置での送りピッチ誤差を打消すよう、各補正抵抗
11〜14の抵抗値を選定する。Each phase coil 7~10 and drive 1-rough foot 22~
5, a correction resistor 11~ for adjusting the excitation current, respectively]
4 is inserted, and the resistance value of each correction resistor 11 to 14 is selected so as to cancel out the feed pitch error at each stop position within the phase excitation period due to unbalance of the excitation current.
第2図は第2の実施例を示すものである。FIG. 2 shows a second embodiment.
第2図ば4相2−2励磁バイポーラ駆動、11〜ラツク
1ステツプの駆動回路であり、同様に、4″I」励磁周
期内の各送ピンチ誤差を打消ように抵抗値が設定された
補正抵抗11〜14を挿入している。Figure 2 shows a 4-phase 2-2 excitation bipolar drive, 11 to 1 step drive circuit, and similarly, the resistance value is set to cancel each feeding pinch error within the 4"I" excitation cycle. Resistors 11 to 14 are inserted.
第3図は第3の実施例を示すものである。FIG. 3 shows a third embodiment.
第3図ば4相2−2励磁ユニポーラ駆動、24ステップ
/回転、 I l・ランク−4ステップ(61−ラック
/回転)の駆動回路であり、各トラック停止1状IQ
ff’;l ’畠に制御回路1は、A、BがON、A。Figure 3 shows a drive circuit with 4-phase 2-2 excitation unipolar drive, 24 steps/rotation, Il-rank-4 steps (61-rack/rotation), and each track stop has 1-state IQ.
ff';l' In the control circuit 1, A and B are ON, and A.
πがOF Fに制御される。ここで、A aと同相のA
′小出力設けられ、パルスモータのローフ位置によって
補正抵抗11を挿入したトランジスタ2′か、挿入しな
いトランジスタ2かを切換えている。π is controlled to be OFF. Here, A in phase with A a
``A small output is provided, and depending on the loaf position of the pulse motor, the transistor 2'' with the correction resistor 11 inserted or the transistor 2 without the correction resistor 11 is switched.
すなわち、ピッチ誤差の大きい停止位置ではA′を選択
して出力し、挿入した抵抗】】でA相励磁’(fi f
M、を補正することにより、その位置でのピッチj!:
j差を補止する。誤差の小さい停止位置では通常のAと
され、これらによって全体として1回転周期のピッチ誤
差を補正する。That is, at the stop position where the pitch error is large, A' is selected and output, and the A-phase excitation' (fi f
By correcting M, the pitch j! at that position is corrected. :
j Compensate for the difference. At the stop position where the error is small, the normal A is set, and the pitch error of one rotation period is corrected as a whole.
各停止位置(6ケ所)に対応して、それぞれの抵抗を選
択する回路を設ければ、さらに正確である3゜
〈ブ11明の効果〉
1″)、11..1′−]1シL;、 l−、たように
、本発明によれば、パルス七−り」、−よび回転−直線
変換機構雪に起因する周1す1的な送ピッチ1、す(差
を、パルスモータのIll ’屯rhi It6制61
(1することにより袖11するものであり、各種+;r
)]シシミに広く刊用出来、特にF D装(ど1の秋1
−7ノクビノチ化に効果を発揮するものである。If a circuit is provided to select each resistance corresponding to each stop position (six positions), the accuracy will be even higher. According to the present invention, as shown in FIG. Ill 'tun rhi It 6 system 61
(By doing 1, you get 11 sleeves, and various +; r
)] Can be widely published in Shishimi, especially in FD (Do1 no Autumn 1)
-7 It is effective in reducing the number of blackheads.
第1図は本発明の一実施例を示す回路図、第2図は他の
実施例を示す回路図、第3図はさらに他の実施例を示す
回路図、第4図は従来例を示す回路図、第5図および第
6図はそれぞれ第1図の送りピッチ誤差を説明するだめ
の特性図である。
]・・・制御回路、 2〜5.2′・・・相励磁トラ
ンジスタ、 7〜10 コイル、 11〜14・・・
補正抵抗。
代′1)41人 弁理士 福 士 愛 彦(他2名)
第 l 図
第2図
+12V +5v
十I2V 寸5V
第4図
第5 図
第6図Fig. 1 is a circuit diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram showing another embodiment, Fig. 3 is a circuit diagram showing still another embodiment, and Fig. 4 is a conventional example. The circuit diagrams, FIGS. 5 and 6 are characteristic diagrams for explaining the feed pitch error shown in FIG. 1, respectively. ]...Control circuit, 2~5.2'...Phase excitation transistor, 7~10 Coil, 11~14...
Correction resistance. Representative '1) 41 people Patent attorney Aihiko Fukushi (and 2 others)
Figure l Figure 2 +12V +5V 12V Dimension 5V Figure 4 Figure 5 Figure 6
Claims (1)
いて、ヘッドキャリッジの送りピッチ誤差を補正する、
パルスモータの相電流比を制御する手段を備えてなるこ
とを特徴とするフロッピーディスク装置の駆動回路。1. Correct the head carriage feed pitch error in the pulse motor drive circuit for head carriage feed.
A drive circuit for a floppy disk device, comprising means for controlling a phase current ratio of a pulse motor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11888784A JPS611299A (en) | 1984-06-08 | 1984-06-08 | Drive circuit of floppy disk device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11888784A JPS611299A (en) | 1984-06-08 | 1984-06-08 | Drive circuit of floppy disk device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS611299A true JPS611299A (en) | 1986-01-07 |
Family
ID=14747599
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11888784A Pending JPS611299A (en) | 1984-06-08 | 1984-06-08 | Drive circuit of floppy disk device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS611299A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62129300U (en) * | 1986-02-04 | 1987-08-15 |
-
1984
- 1984-06-08 JP JP11888784A patent/JPS611299A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62129300U (en) * | 1986-02-04 | 1987-08-15 |
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