JPS61129973A - Facsimile transmitting/receiving control system - Google Patents

Abstract

PURPOSE:To control two circuits simultaneously, utilizing different communications systems and to reduce the hardware configuration by use of a DMA controller and two FIFO, ADLC and counter, respectively. CONSTITUTION:The fascimile control unit 300 is connected to two telephone circuits, 400, 400', as well as to other parts of the sending/receiving controller via the common bus 222. In case of transmission, data is transmitted to the local memory 212 via the common bus 222 by the DMA controller 213. The mode of modem 22, 22' is altered depending on the type of the other party's set (G2 or G3) received from the circuit 400, 400' as well as in case the other party's set is G3, mode setting command is sent to the circuit via the ADLC. The data of memory 212 are sent as image signals through the FIFO, modem and NCU. When memory 212 becomes empty, data is transmitted to memory 212 via the common bus by the DMA and transmission shall be carried out until the data to be sent are depleted.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a facsimile transmission/reception control system, and more particularly to a facsimile transmission/reception control system for simultaneously controlling 2@ lines using different communication systems.

Prior Art Conventionally, in facsimile transmission and reception, in the case of broadcast communication,
A single microprocessor may process multiple lines, but this is limited to the same communication. For example, in the case of simultaneous broadcast communication, it is possible to simultaneously transmit to a plurality of 62 machines on the other side, or to simultaneously transmit to a plurality of G3 machines in the same speed mode. However, the sending destination is G2,0
3m, or if the other party's mode is different even if it is a G3 machine, it cannot be controlled by one microprocessor. Moreover, it is not possible to send and receive at the same time.

Purpose The purpose of the present invention is to improve such conventional problems and to be able to control two lines at the same time using different communication methods.
Another object of the present invention is to provide a facsimile transmission/reception control system that can reduce the hardware configuration.

Configuration In order to achieve the above object, the facsimile transmission/reception control system of the present invention comprises a CPU, an image processing means, a main memory for storing data processed by the image processing means, and a control means for controlling facsimile transmission/reception. In the control system, the control means includes a local memory, a DMA controller for transferring data between the local memory and the main memory, a controller for transmitting and receiving HDLC frames, and a FIFO, and the DMA controller controls the main memory. Transfer the transmission data from the memory to the above local memory, transmit it according to the corresponding procedure according to the other party's model 62 or G3, and when receiving, CI and D
Send an IS signal.

A feature is that G2 reception is performed when GC is received, and G3 reception is performed when DCS is received.

The configuration of the present invention will be explained below using examples.

FIG. 1 is a block diagram of a facsimile transmission/reception control system showing one embodiment of the present invention.

The facsimile transmission/reception control system includes a facsimile transmission/reception section 2 and other facsimile transmission/reception control sections 1, 3, and 4.
．． Consists of 5. That is, main CPtJl and
It consists of a floppy disk connected to a common bus 6, a hard controller (FD, I-(D) 3, an image processor unit (tPU) 4, a main memory (MM) 5, and a facsimile transmitting/receiving section 2.Facsimile transmitting/receiving section 2
is facsimile control unit (FCU) 2
1. Modem 22. and a network control unit (NCU) 23.

The facsimile image signal is sent to the image processor unit 4
The data is processed by MfH in the main memory 5. In the facsimile control unit 21, the main memory 5
Send facsimile signals stored in Also,
The facsimile signal received by the facsimile control unit 21 is transferred to the main memory 5 via the common bus 6. Such a configuration is realized as a LAN (Local Area Network) and can be applied to various configurations of the LAN including the facsimile transmitting/receiving section 2.

FIG. 2 is a detailed block diagram of the facsimile control unit of FIG. 1.

The facsimile control unit 21 is a CPU 2
ROM 211 and RAM 2 connected to 10 and bus 221
12. DMA controller 213° timer 214,2
15. Automatic data link controllers (hereinafter referred to as AD LC) 216, 217 for transmitting and receiving high-level data link control frames. First-in-first-out (hereinafter referred to as FIFO) 21
8,219, bus controller 2 that controls bus 221
20, and modem 22. Equipped with NCU23.

CPTJ2]0 accesses the portion of the main memory 5 allocated to the facsimile control unit 21 and obtains a communication start command. At the same time, information about the functions of the facsimile machine of the other party and the telephone number of the other party is received. Facsimile data.

The data is transferred from the main memory 5 by the DMA controller 213. If the other party is G2, a counter inside the CPU 210 monitors the GI (group identification) signal. If G1 is detected, the modem 22 is set to G2 mode and outputs a 1-phase signal. After sending out the phase signal, if a CFR (reception readiness confirmation) signal is detected in the same manner, a one-picture signal is sent out. For transmission on the G2 side, the black and white signal from the local memory 212 inside the facsimile control unit 21 is input to FIFO2L8, 219, and this FIFO
An image signal is input to the modem 22 through the.

The modem 22 converts the input image signal into AM and PM.

The signal is modulated to VSB and sent from the NCU 23 to the telephone line. If the other party is G3, set modem 22 to 300 BPS F
Set it to SK mode. ADLC2 output of modem 22
If the DIS (function identification) signal is detected by the ADLC 216, 217, the DCS
Sends a command (mode setting instruction). ADLC21
The signal configured into HDLC at 6,217 is input to the modem 22 and sent out to the line in FSK mode. next.

Set modem 22 to high speed mode (V29.
r) and set all ILI to FIF0218.21゛9.
Add OH. In addition, the modem standard of V27ter is
Carrier frequency 1800±IHz, data signal rate 48
00bit/s±0.01%, 2400bi
t/s±0.01%, modulation speed 1600 baud, 12
00 baud. As a result, a TCP (training check) signal is sent. After sending TCF signal, CFR
When the (reception preparation complete) signal is detected, transmission of the G3 image signal begins. The G3 image signal is an MH (Modified Huffman compression method) or MR (Modified Read compression method) signal stored in the local memory 212 inside the facsimile control unit 21 and sent to the FIF02.
Output to 18°219. In this case, the modem 22 is set to high speed mode (V29.V27ter).

The receive mode is activated by a ringing signal from the line. Modem 22 with tonal signal output and 300BPS-F
SK output and G (group identification) and DI'S (function identification) signals are sent out. After transmitting these, if a GC (group command) is detected, it enters G2 reception, performs 1-phase type matching, and transmits a CFR (reception readiness confirmation).

When DC3 (mode setting command) is received, it enters G3 reception, and after a TCP check (training check), it sends CFR (ready for reception) or FTT (training failure). While receiving the image signal, the output of the modem 22 is accumulated in the FIFos 218 and 219 and transferred to the local memory 212 in several bytes. local memory 2
12 becomes full, the DMA controller 213
to transfer it to the main memory 5.

Figures 3 and 4 are flowcharts of transmission and reception operations, respectively.

In order to perform facsimile broadcast communication, first, on the sending side, data is transferred from the main memory 5 to the FC by DMA data transfer.
The transmission data is transferred to the local memory 212 of U21 (step 32), and transmission is performed in G2 or G3 depending on the destination mode (steps 34 and 38). local memory 21
2 becomes empty, data is transferred from the main memory 5 by DMA data transfer (step 35,
36°39.40). Upon completion of transmission, communication ends (step 42).

On the other hand, when receiving GC from the other party,
Enters G2 reception (step 51.52), and when DC3 is received, enters G3 reception (step 51.56).
), when the local memory 212 is full, DM
A data transfer moves the received data from the local memory 212 to the main memory 5 (steps 53.54.5).
7.58).

When data reception is completed (steps 55 and 59), D
After all the received data is transferred to the main memory 5 by M and A transmission, the communication is finished (steps 60 and 61).
).

In this way, using 2 FIFos, 2 ADLCs, 2 counters, and 1 DMA controller, 2
Lines can be controlled simultaneously using any procedure.

Note that when transmitting and receiving one data using two lines to increase the transmission speed, two apparatuses of the present invention are used and connected to two telephone lines. Another method is to divide one set of data into two, transmit them using two channels, and then reassemble them into the original single set of data on the receiving side.

Effects As described above, according to the present invention, in broadcast transmission, it is possible to simultaneously transmit and receive to and from parties of different models, and the hardware configuration can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a facsimile broadcast transmission/reception control system showing one embodiment of the present invention, FIG. 2 is a detailed block diagram of the facsimile control unit of FIG. 1, and FIG.
4 and 4 are flowcharts of transmission and reception operations according to the present invention. 1: cPU, 2 = facsimile sending/receiving@location, 3: floppy and hard disk controller. 4: Image processing unit, 5: Main memory, 6: Common bus, 21: Facsimile control unit, 22: Modem, 23: Steel control device, 212: Local memory, 213: DMA controller, 214,2
15: Timer, 216, 217: Automatic data link
Con I-Roller, 218°21'9: FIFO. Figure 1 Figure 2 Common bus Figure 3 Idol

Claims (1)

[Claims] (1) In a facsimile transmission and reception control system comprising a CPU, an image processing means, a main memory for storing data processed by the image processing means, and a control means for controlling facsimile transmission and reception, the control means includes a local memory, a main memory for storing data processed by the image processing means, and a control means for controlling facsimile transmission and reception. It has a DMA controller that transfers data between the local memory and the main memory, a controller that sends and receives HDLC frames, and a FIFO. Transmit according to the procedure corresponding to G2 or G3 of the side model, and when receiving, GI and DIS
Sends a signal, performs G2 reception when receiving GC,
A facsimile transmission/reception control system characterized in that G3 reception is performed when DCS is received.