JPS61128838U - - Google Patents
Info
- Publication number
- JPS61128838U JPS61128838U JP1232285U JP1232285U JPS61128838U JP S61128838 U JPS61128838 U JP S61128838U JP 1232285 U JP1232285 U JP 1232285U JP 1232285 U JP1232285 U JP 1232285U JP S61128838 U JPS61128838 U JP S61128838U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output signal
- gate
- voltage
- voltage comparison
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1232285U JPS61128838U (da) | 1985-01-31 | 1985-01-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1232285U JPS61128838U (da) | 1985-01-31 | 1985-01-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61128838U true JPS61128838U (da) | 1986-08-12 |
Family
ID=30495274
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1232285U Pending JPS61128838U (da) | 1985-01-31 | 1985-01-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61128838U (da) |
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1985
- 1985-01-31 JP JP1232285U patent/JPS61128838U/ja active Pending