JPS61126303U - - Google Patents

Info

Publication number
JPS61126303U
JPS61126303U JP682185U JP682185U JPS61126303U JP S61126303 U JPS61126303 U JP S61126303U JP 682185 U JP682185 U JP 682185U JP 682185 U JP682185 U JP 682185U JP S61126303 U JPS61126303 U JP S61126303U
Authority
JP
Japan
Prior art keywords
acquisition
data
read
input
external input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP682185U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP682185U priority Critical patent/JPS61126303U/ja
Publication of JPS61126303U publication Critical patent/JPS61126303U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Ignition Installations For Internal Combustion Engines (AREA)
  • Control By Computers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は多重取込のタイムチヤート、第2図は
複周期式多重取込のタイムチヤート、第3図は実
施例のブロツク図、第4図は実施例における入力
取込のフローチヤートである。 1……入力信号、2……ノイズキヤンセル回路
、3……CPU、4……ROM、5……RAM、
6……ドライブ回路、7……アクチユエータ。
Fig. 1 is a time chart of multiple acquisition, Fig. 2 is a time chart of multi-cycle multiple acquisition, Fig. 3 is a block diagram of the embodiment, and Fig. 4 is a flowchart of input capture in the embodiment. . 1...Input signal, 2...Noise cancel circuit, 3...CPU, 4...ROM, 5...RAM,
6...drive circuit, 7...actuator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 取込周期毎に外部入力を読み込む手段と、読み
込んだ入力データを一時格納する手段と、前記読
み込みデータと一時格納データを比較する手段と
演算処理に用いる外部入力データ格納手段からな
る入力取込手段をもつたマイクロコン式制御装置
において、取込周期を少なくとも2種類以上備え
たことを特徴とするマイクロコン式制御装置。
Input acquisition means comprising means for reading external input at each acquisition cycle, means for temporarily storing the read input data, means for comparing the read data with the temporarily stored data, and external input data storage means used for arithmetic processing. 1. A microcomputer type control device having at least two types of acquisition cycles.
JP682185U 1985-01-23 1985-01-23 Pending JPS61126303U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP682185U JPS61126303U (en) 1985-01-23 1985-01-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP682185U JPS61126303U (en) 1985-01-23 1985-01-23

Publications (1)

Publication Number Publication Date
JPS61126303U true JPS61126303U (en) 1986-08-08

Family

ID=30484616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP682185U Pending JPS61126303U (en) 1985-01-23 1985-01-23

Country Status (1)

Country Link
JP (1) JPS61126303U (en)

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