JPS61122985A - Tape recorder - Google Patents

Abstract

PURPOSE:To easily edit without giving an audible discomfort to an user and delete the number of parts by using an attenuator and an attenuator control circuit during a high speed editing together with during a high speed regenerating. CONSTITUTION:During a high speed editing, a signal recorded in a tape by a high speed editing command circuit 2 is inputted by a head of a mechanism 3 and applied to an attenuator 7 through a regenerating equalizer amplifier 6. The attenuator 7 is controlled by an attenuator control circuit 8 to output. An output of the amplifier 6 is also transmitted to a recording equalizer amplifier 9 and an editing is carried out by a mechanism 4. During a high speed regenerating, by a high speed regenerating command circuit 10, a regenerating signal from the mechanism 3 is fed to the attenuator 7 through the amplifier 6 and the attenuator 7 is controlled by the circuit 8 to output. In this manner, without giving an audible discomfort to an user, the editing is easily done and the number of parts can be deleted.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a tape recorder having two mechanisms capable of high-speed playback and high-speed editing.

BACKGROUND OF THE INVENTION In recent years, tape recorders have two mechanisms, and many systems have been adopted for editing recorded tapes into other tapes at high speed.

In conventional high-speed editing methods, muting was applied to the output in order to provide a high-speed editing command circuit.

Problems to be Solved by the Invention However, in the above-described high-speed editing system of the tape recorder, if muting is applied, the current location of the tape cannot be known when the tape is running, making it difficult to edit only a specific song.

The present invention solves the above-mentioned conventional problems, and by passing the same attenuator as that used for high-speed playback during high-speed editing, the current position can be known even when the tape is running, making editing easier and controlling the attenuator and attenuator. The present invention provides a tape recorder in which the number of parts can be reduced by 7 dollars because the attenuator control circuit for high-speed playback is also used for high-speed playback.

Means for Solving the Problems In order to solve the above problems, the tape recorder of the present invention has two mechanisms capable of high-speed playback and high-speed editing.
During high-speed editing, based on a predetermined output from the first output of the microcomputer, commands are sent to the playback equalizer amplifier and the recording equalizer amplifier to change the respective equalizer amounts, and the first mechanism and second mechanism A high-speed editing command circuit that sends commands to a mechanism control circuit that controls the mechanism to enter a high-speed editing state, and also controls an attenuator connected to the output of the reproduction equalizer amplifier based on commands from the high-speed editing command circuit. A command is given to an attenuator control circuit and a mechanism control circuit that controls the first mechanism and the second mechanism to be in a high-speed regeneration state based on a predetermined output from the second output of the microcomputer during high-speed regeneration. , a high-speed reproduction command circuit that issues a command to an attenuator control circuit that controls the output attenuator of the reproduction equalizer amplifier to enable high-speed editing.

Effects of the present invention With the above-described configuration, during high-speed editing of a tape recorder, the playback output is attenuated by the attenuator, so that the user does not feel audible discomfort, and editing is also facilitated. The number of parts has been reduced by sharing the device control circuit with the one used for high-speed playback.

DESCRIPTION OF EMBODIMENTS FIG. 1 is a block diagram of essential parts showing an embodiment of a cheap recorder according to the present invention. 1 is a microcomputer that outputs a predetermined output from a first output during high-speed editing, and outputs a predetermined output from a second output during high-speed reproduction. 2 is microcomputer 1
Based on the command of the first output, a command is sent to the mechanism control circuit 5 which controls the first mechanism 3 and the second mechanism 4 to a high speed editing state.

When the mechanism is in the high speed editing state, the signal recorded on the tape is input by the head of the first mechanism 3 and applied to the reproduction equalizer amplifier 6. Now, according to the command from the high-speed editing command circuit 2, a predetermined equalizer is applied, and the output is added to the attenuator 7.The attenuator 7 is controlled by the attenuator control circuit 8, which has received a command from the zero-order high-speed editing circuit 2. The output is attenuated and output to the output terminal. The output of the playback equalizer amplifier 6 is also transmitted to the recording equalizer amplifier 9, where a predetermined equalizer is applied according to a command from the high-speed editing command circuit 2, and the output is applied to the recording head of the second mechanism 4. Editing is done. Next, based on the second output of the microcomputer 1 during high-speed playback,
A command is issued from the high-speed regeneration command circuit 10, the mechanism control circuit 5 controls the first mechanism 3, and the first mechanism 3 enters the high-speed regeneration state. There, the signal recorded on the tape is inputted from the head of the first mechanism 3, and is applied to the attenuator 7 via the reproduction equalizer amplifier 6. Here, as in the case of high-speed editing, the attenuator control circuit 8 controls the attenuator 7 in response to a command from the high-speed reproduction command circuit 10, and the output is attenuated and outputted to the output terminal.

FIG. 2 is a detailed circuit diagram of the most important high-speed editing command circuit, high-speed reproduction command circuit, attenuator, and attenuator control circuit of this embodiment.

In FIG. 2, reference numeral 11 denotes a base resistor of a transistor 12, which is connected to the first output of the microcomputer 1. Reference numeral 13 is a collector resistor of the transistor 12, which is connected to the power supply. Reference numeral 22 represents a base resistor of a transistor 23, which is connected to the second output of the microcomputer 1.

Reference numeral 24 is a collector resistor of the transistor 23, which is connected to the power supply. Reference numeral 14 denotes a base resistor of the transistor 16, which is connected to the collectors of the transistors 12 and 23, respectively. Reference numeral 15 is an emitter resistor of a transistor 16, which is connected to the power supply. 17 is transistor 1
It is connected to the collector of transistor 16 by a base resistor of 8. 19, 20° 21 is an attenuator, and the resistor 20 and capacitor 19 are connected in parallel to the collector of the transistor 18 and the resistor 21, and the resistor 21 is the regenerative equalizer amplifier 6.
It is connected to the output of 扛.

The operation of this embodiment configured as described above will be explained based on FIGS. 1 and 2. Note that the first output of the microcomputer 1 is normally LO
It is assumed that the second output of the microcomputer 1 is normally LOW and outputs I (IGH) only when performing high-speed playback.

First, when a high-speed editing command is issued, the first output of the microcomputer 1 becomes HIGH, a base current flows to the transistor 12 through the resistor 11, a collector current flows through the resistor 13, the transistor 12 is turned on, and the collector Fall to earth. Then, the base current flows into the transistor 16 through the resistor 14, and the emitter current flows through the resistor 15, and the transistor 16 is turned on. When the transistor 16 is turned on, the base current flows to the transistor 18 through the resistor 17, and the transistor 18 is turned on.
state, and the collector of the transistor 18 falls to the ground.At this time, the output of the regenerative equalizer amplifier 6 is connected to the resistor 2.
An output divided by the resistance value of 1 and the combined impedance of the resistor 20 and capacitor 19 appears at the output terminal. In other words, the combined impedance of the resistor 20 and capacitor 19 is Z
, let the resistance value of the resistor 21 be R, then Z / (R + Z
) comes out at the output terminal. Also, during high-speed playback, the second output of the microcomputer 1 is HI.
GH, a base current flows through the resistor 22 to the transistor 23, and a collector current flows through the resistor 24't-, the transistor 23 is turned on, and its collector falls to ground. Similarly, the output of the reproduction equalizer amplifier is attenuated to Z/(R+Z) and output to the output terminal as described above.

As explained above, according to this embodiment, since the conventional attenuator 7 and attenuator control circuit 8, which attenuate the output during high-speed playback, are shared, the playback output is attenuated even during high-speed editing. The present invention provides a tape recorder that facilitates editing and reduces the number of parts.

Effects of the Invention The present invention provides a tape recorder having two mechanisms capable of high-speed playback and high-speed editing. A high-speed reproduction command circuit that issues a command for high-speed reproduction according to the command of the second output of the microcomputer during reproduction, and is connected to the output of the reproduction equalizer amplifier according to the commands of the high-speed editing command circuit and the high-speed reproduction command circuit. It is equipped with an attenuator control circuit that controls the attenuator and attenuates the output.It shares the attenuator and attenuator control circuit that attenuates the output during high-speed playback, and attenuates the playback output even during high-speed editing. Because it is
To provide a tape recorder which facilitates editing by knowing the current position when the tape is running even during high-speed editing, and which reduces the number of parts.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a main part of an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a specific configuration of this embodiment. 1...Microcomputer, 2...
High-speed editing command circuit, 3...first mechanism,
4...Second mechanism, 6...Mechanism control, 6...Reproduction equalizer amplifier,
Attenuator, 8... Attenuator control circuit, 9... Recording equalizer amplifier, 10...
...High-speed regeneration command circuit, 11.13, 14°15.1
A, 20,21.22.24...Resistance, 19.
... Capacitor, 12, 16, 18.23...
...Transistor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2

Claims (1)

[Claims] A playback equalizer is provided by a mechanism capable of high-speed playback and high-speed editing, and a high-speed editing command circuit that receives the output of a playback head included in the mechanism and sends a high-speed editing command using the first output of a microcomputer as an input. A reproduction equalizer amplifier that can change the amount, and the output of the high-speed editing command circuit are input, and the second output of the microcomputer is input, and the output of the high-speed reproduction command circuit that sends a high-speed reproduction command is input. and an attenuator control circuit that controls an attenuator that receives the output of the reproduction equalizer amplifier as an input and attenuates the output during high-speed editing and high-speed playback, and receives the output of the reproduction equalizer amplifier as the input, A recording equalizer amplifier that can change the recording equalizer amount during high-speed editing according to a command from the high-speed editing command circuit, and a second mechanism that uses the output of the recording equalizer amplifier as input and is capable of high-speed editing. The recording head and the output of the high-speed editing command circuit are input, and the output of the high-speed playback command circuit is input, and the first mechanism and the second mechanism are set in a predetermined state during high-speed editing and high-speed playback. A tape recorder comprising a control mechanism control circuit.