JPS61121762U - - Google Patents

Info

Publication number
JPS61121762U
JPS61121762U JP1985004451U JP445185U JPS61121762U JP S61121762 U JPS61121762 U JP S61121762U JP 1985004451 U JP1985004451 U JP 1985004451U JP 445185 U JP445185 U JP 445185U JP S61121762 U JPS61121762 U JP S61121762U
Authority
JP
Japan
Prior art keywords
zener diode
resistor
incorporating
built
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985004451U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985004451U priority Critical patent/JPS61121762U/ja
Publication of JPS61121762U publication Critical patent/JPS61121762U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

Landscapes

  • Details Of Resistors (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例による透視平面図、
第2図は従来例の透視平面図である。 1……オープン端子、2……アノード端子、3
……カソード端子、4……容器、5……ゼナーダ
イオードチツプ、6……抵抗。

Claims (1)

    【実用新案登録請求の範囲】
  1. ゼナーダイオードとともに容器内部に抵抗チツ
    プを組み込んだことを特徴とする抵抗内蔵ゼナー
    ダイオード。
JP1985004451U 1985-01-17 1985-01-17 Pending JPS61121762U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985004451U JPS61121762U (ja) 1985-01-17 1985-01-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985004451U JPS61121762U (ja) 1985-01-17 1985-01-17

Publications (1)

Publication Number Publication Date
JPS61121762U true JPS61121762U (ja) 1986-07-31

Family

ID=30480038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985004451U Pending JPS61121762U (ja) 1985-01-17 1985-01-17

Country Status (1)

Country Link
JP (1) JPS61121762U (ja)

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