JPS61121607A - Feedforward amplifier - Google Patents

Feedforward amplifier

Info

Publication number
JPS61121607A
JPS61121607A JP59243821A JP24382184A JPS61121607A JP S61121607 A JPS61121607 A JP S61121607A JP 59243821 A JP59243821 A JP 59243821A JP 24382184 A JP24382184 A JP 24382184A JP S61121607 A JPS61121607 A JP S61121607A
Authority
JP
Japan
Prior art keywords
amplifier
error
loop
signal
pilot signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59243821A
Other languages
Japanese (ja)
Inventor
Noboru Yajima
昇 矢島
Akira Ishikawa
明 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59243821A priority Critical patent/JPS61121607A/en
Publication of JPS61121607A publication Critical patent/JPS61121607A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H03F1/3229Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction
    • H03F1/3235Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction using a pilot signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3212Using a control circuit to adjust amplitude and phase of a signal in a signal path

Abstract

PURPOSE:To suppress the increase in gain fluctuation and distortion level of an amplifier caused by temperature and power characteristics by adjusting automatically the gain depending on the difference of the absolute value of the transmitted quantity of between a pilot signal component fed to an error amplifier via a main amplifier and a pilot signal component fed to the error amplifier via a delay circuit. CONSTITUTION:A hybrid circuit 10 extracting a part of an output signal of a main amplifier 2 of an error detection loop and a hybrid circuit 11 extracting a part of an output signal of a delay line 3 are provided, a signal obtained from both the hybrid circuits is given to control circuits 12, 13, the pilot signal component included in the amplified signal, given to an operational amplifier 14 as a DC current to extract the difference of the absolute value of the pilot signal transmission quantity of loops (a, b), and the attenuation of an automatic equalizer 15 provided in the loop (b) or the gain of a main amplifier 2 of the loop (a) is adjusted automatically so as to compress the difference. Thus, when both the signals is inputted to an error amplifier 7, the signal component is cancelled completely mutually and only the error component generated from the main amplifier is fed to the error amplifier.

Description

【発明の詳細な説明】 C1tili上の利用外野〕 本発明はフィードホワード増till器のエラー抑圧改
善方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Utilization field on C1tili] The present invention relates to an improved method for suppressing errors in a feedforward multiplier.

フィードホワード増幅器はその主増幅器出力信号へ主増
幅6人力信号を位相差180°、絶対値同一の関係にて
加算し、加算結果として主増幅器のエラー(歪など)成
分のみをとり出し、さらにこのエラー成分を増幅したの
ち、主増幅器の出力信号へ180°の位相差にて再度加
え合わせることによってエラー成分のない信号をフィー
ドホワード増幅器の出力信号として得るよう構成される
The feedforward amplifier adds the main amplified six human power signals to the main amplifier output signal with a phase difference of 180° and the same absolute value, extracts only the error (distortion, etc.) component of the main amplifier as the addition result, and then adds this signal to the main amplifier output signal. After the error component is amplified, it is added again to the output signal of the main amplifier with a phase difference of 180°, thereby obtaining a signal free of error components as the output signal of the feedforward amplifier.

即ち主増幅器のエラー盃を完全に抑圧し、エラーのない
出力信号を7−−ドホワード増幅器の出力部に発生させ
ることがMすれる◎ 〔従来の技術〕 フィードホワード増幅器の動作を第2図の従来例につき
説明する。
In other words, it is possible to completely suppress the error cup of the main amplifier and generate an error-free output signal at the output of the 7-doforward amplifier. [Prior Art] The operation of the feedforward amplifier is shown in FIG. A conventional example will be explained.

第2図は増幅器全体のプロツク構成図であり、図示のル
ープ■とOをもつエラー検出ループとルーフ■と@から
なるエラーインジェクシ冒ンループを備えている。入力
信号は入力端子INから与えられハイブリッド回路lに
よりて主増#A器2と遅延線路3へ2分される。主増幅
器lにて増幅さる。
FIG. 2 is a block diagram of the entire amplifier, which includes an error detection loop having the loops ① and 0 shown in the figure, and an error injection detection loop consisting of the loops ① and @. An input signal is applied from an input terminal IN and is divided into two by a hybrid circuit 1 to a main amplifier 2 and a delay line 3. It is amplified by the main amplifier l.

ハイブリッド回路1にて分岐された先の入力信号の一部
は遅延線路3を介しハイブリット回路6へ到達する。
A part of the input signal branched at the hybrid circuit 1 reaches the hybrid circuit 6 via the delay line 3.

これらの2つの信号経路は第2図において■ループ及び
■ループにて示される。これらの2信号はハイブリッド
回路6からエラー増幅器7へ人力するとき、相互の伝送
量の絶対値が等しく、位相が180°反転していること
がエラー検出ループの還想的条件である。
These two signal paths are shown in FIG. 2 as loops 1 and 2. When these two signals are inputted from the hybrid circuit 6 to the error amplifier 7, the conditions for the error detection loop are that the absolute values of mutual transmission amounts are equal and the phases are reversed by 180°.

伝送量の絶対値の調整は減衰器5の減衰量でまた位相調
節は遅延線路3の遅#、tの選定によって行われる。
The absolute value of the transmission amount is adjusted by the amount of attenuation of the attenuator 5, and the phase is adjusted by selecting the delay # and t of the delay line 3.

しかるときエラー増幅器7への人力は主増幅器2かラノ
エラー歪信号のみとなり、これはエラー増幅器7にて増
幅されることになる。
In this case, the only human input to the error amplifier 7 is the Lano error distortion signal from the main amplifier 2, which is amplified by the error amplifier 7.

主増幅器2の出力は遅延線路8を介しループ■にて出力
端子OUTへまたエラー増幅器7にて増幅されたエラー
信号はループ■を介し出力端子OUTへ到着する。
The output of the main amplifier 2 passes through the delay line 8 and reaches the output terminal OUT via the loop (2), and the error signal amplified by the error amplifier 7 arrives at the output terminal OUT via the loop (2).

■、fDループの伝送量に関しても絶対値を等しく位相
関係を180’反転させることによって出方端子OUT
の点でQIループを介しOUTへ到着した主信号、即ち
主増幅器出力信号、の中のエラー成分はエラー増幅器7
の出力部から供給される逆位相のエラー信号によって完
全に打ち消すことができ、OUT端子からエラー成分の
ない信号出力を得る。
② By inverting the phase relationship by 180' to equalize the absolute value of the transmission amount of the fD loop, the output terminal OUT
At this point, the error component in the main signal that has arrived at OUT via the QI loop, that is, the main amplifier output signal, is transmitted to the error amplifier 7.
This can be completely canceled by the opposite phase error signal supplied from the output section of the OUT terminal, and a signal output free of error components is obtained from the OUT terminal.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしフィードホワード増幅器のエラー検出ループ回路
の特性を一定に保持してぢくことは困難であり、その変
化は増幅器の入力から出刃端子に至る伝送特性に悪い影
響を与える。
However, it is difficult to maintain the characteristics of the error detection loop circuit of the feedforward amplifier constant, and changes therein adversely affect the transmission characteristics from the input of the amplifier to the cutting terminal.

例えば周囲温度が大きく変化するような条件下におかれ
た場合には、増幅器の入力部INからエラー増幅器7の
入力点に至る間における伝送量に変化がおこる口 例えば主増幅器2の利得が温度変化によって変化した場
合には■ループ■ループの伝送特性が変化して、信号成
分の絶対値が異なる値となり、エラー増幅器7へ信号成
分が漏洩するようになり、エラーインジェクタ1ンルー
プではエラー成分を打消すことが出来ないのみでなく、
エラー増幅器7から与えられる漏洩信号によって歪の与
えられた信号がOUT端子から送出される。
For example, if the ambient temperature is subject to a large change, the amount of transmission between the input section IN of the amplifier and the input point of the error amplifier 7 will change. If the change occurs, the transmission characteristics of ■Loop■Loop change, and the absolute value of the signal component becomes a different value, and the signal component leaks to the error amplifier 7, and the error injector 1 loop transfers the error component. Not only is it impossible to cancel, but
A signal distorted by the leakage signal provided from the error amplifier 7 is sent out from the OUT terminal.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題点は主増幅器を介しエラー増幅器へ供給され
るパイロット信号成分と遅延回路を介しエラー増幅器へ
供給されるパイロット信号成分をそれぞれ独立に検出し
て、両パイロット信号の伝送量の絶対値の差をつくり、
該差信号によりて遅延回路を含むループに設けた自動等
止器減衰量もしくは主増幅器の利得を自動調整すること
を49徴とする本発明によるフィードホワード増幅器に
よって解決される。
The problem mentioned above is that the pilot signal component supplied to the error amplifier via the main amplifier and the pilot signal component supplied to the error amplifier via the delay circuit are detected independently, and the absolute value of the amount of transmission of both pilot signals is determined. make a difference,
This problem is solved by the feedforward amplifier according to the present invention, which has the feature of automatically adjusting the attenuation of an automatic isolator provided in the loop including the delay circuit or the gain of the main amplifier using the difference signal.

〔作 用〕[For production]

本発明によればエラー検出ループにおける主増幅器を介
し【得られる信号と、遅延回路を介し1800の反転位
相を与えられた信号とはパイロット信号による利得制御
によって、絶対値が等しくなるように調整される。
According to the present invention, the signal obtained through the main amplifier in the error detection loop and the signal given an inverted phase of 1800 through the delay circuit are adjusted so that their absolute values are equal by gain control using the pilot signal. Ru.

従ってエラー増幅器へ両信号が人力されるときには信号
成分は相互に完全に打ち消され、主増幅器から発生した
エラー成分のみがエラー増幅纏蟻給されることになり、
次のエラーインジェクシ曹/ループにおいては主増幅器
の出力信号中に含まれるエラー成分を完全に打消すこと
かでき、エラー成分のない正しい信号成分のみがフィー
ドホワード増幅器の出力部から得られる。
Therefore, when both signals are input to the error amplifier, the signal components completely cancel each other out, and only the error component generated from the main amplifier is fed to the error amplifier.
In the next error injection loop, the error components contained in the output signal of the main amplifier can be completely canceled, and only correct signal components without error components are obtained from the output of the feedforward amplifier.

〔実施例〕〔Example〕

以下本発明の要旨を第1図の実施例につき詳細に説明す
る。
The gist of the present invention will be explained in detail below with reference to the embodiment shown in FIG.

図はフィードホワード増幅器のブロック回路図であり、
第2図と同一の部分は同一記号にて示す。
The figure is a block circuit diagram of a feedforward amplifier,
The same parts as in FIG. 2 are indicated by the same symbols.

本発明によれば、従来のフィードホワード増幅器のエラ
ー検出ループの主増幅器2の出刃信号の一部をとりだす
ハイブリッド回路lOおよび遅延線路3の出力信号の一
部をとりだすハイブリッド回路11を設け、両ハイブリ
ッド回路から得た信号は制御回路12と13のそれぞれ
に供給し、該制御回路にて増幅信号中に含まれるパイロ
ット信号成分をr波整流して直流電流として演算増幅器
l4へ与え、■ループと■ループのパイロット信号伝送
量の絶対値の差分を取り出し、この差分が圧縮できるよ
うに■ループに設けた自動等止器15の減衰量もしくは
@ループの主増幅器2の利得を自動的に調整するように
構成する。なおパイロット信号はフィードホワード増幅
器の入力部以前において挿入する。
According to the present invention, a hybrid circuit 10 that takes out a part of the output signal of the main amplifier 2 of the error detection loop of a conventional feedforward amplifier and a hybrid circuit 11 that takes out a part of the output signal of the delay line 3 are provided. The signals obtained from the circuits are supplied to control circuits 12 and 13, respectively, and the control circuits R-wave rectify the pilot signal component included in the amplified signal and provide it as a direct current to the operational amplifier l4, which connects the loop and The difference in the absolute value of the pilot signal transmission amount of the loop is extracted, and the attenuation of the automatic equalizer 15 provided in the loop or the gain of the main amplifier 2 of the loop is automatically adjusted so that this difference can be compressed. Configure. Note that the pilot signal is inserted before the input section of the feedforward amplifier.

本発明によれば、エラー検出ループで相互に打ち消され
るべき■ループと■ループを介しエラー増幅器7へ与え
られる2つの信号成分はそれぞれの絶対値の差がパイロ
ットレベル差に置き換えられて検出され、そのレベル差
が減少するようにエラー検出ループの減衰量が加減され
、エラー検出ループ中での信号成分の抑圧量が増大され
る。
According to the present invention, two signal components which are to be mutually canceled in the error detection loop and which are applied to the error amplifier 7 through the loop (1) and (4) are detected by replacing the difference in their absolute values with the pilot level difference, The amount of attenuation in the error detection loop is adjusted so that the level difference is reduced, and the amount of suppression of the signal component in the error detection loop is increased.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば主増幅器の温度特性、
電源特性などに起因するフィードホワード増幅器の利得
変動、エラー増幅器の歪レベルの増大が抑圧でき、また
フィードホワード増幅器が何段にも縦続された場合でも
1個のパイロット発生器を備えるだけでよく回路構成が
簡単にか\わらず、その作用効果は大である。
As described above, according to the present invention, the temperature characteristics of the main amplifier,
Gain fluctuations in the feedforward amplifier due to power supply characteristics and increases in the distortion level of the error amplifier can be suppressed, and even when feedforward amplifiers are connected in multiple stages, the circuit can be easily configured with just one pilot generator. Although the structure is simple, its effects are great.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるフィードホワード増幅器の実施例
を示すブロック回路図、 第2図は従来のフィードホワード増幅器のブロック回路
図を示す。 図において、 1.4.6,9,10.11はハイブリッド回路2は主
増@器 3.8は遅延線路 5は減衰器 7はエラー増幅器 12.13は制御回路 14は演算増幅器 ■@はエラー検出ループに属するループ回路■@はエラ
ーインジェクシ■yループに属するループ回路 を示す。
FIG. 1 is a block circuit diagram showing an embodiment of a feedforward amplifier according to the present invention, and FIG. 2 is a block circuit diagram of a conventional feedforward amplifier. In the figure, 1.4.6, 9, 10.11 are the hybrid circuit 2, the main amplifier 3.8, the delay line 5, the attenuator 7, the error amplifier 12.13, the control circuit 14, the operational amplifier Loop circuit belonging to the error detection loop ■@ indicates a loop circuit belonging to the error injection ■y loop.

Claims (1)

【特許請求の範囲】[Claims] 主増幅器を介しエラー増幅器へ供給されるパイロット信
号成分と遅延回路を介しエラー増幅器へ供給されるパイ
ロット信号成分をそれぞれ独立に検出して、両パイロッ
ト信号成分の伝送量の絶対値の差をつくり、該差信号に
よって遅延回路を含むループに設けた自動等化器減衰量
もしくは主増幅器の利得を自動調整するようにしたこと
を特徴とするフィードホワード増幅器。
Detecting independently the pilot signal component supplied to the error amplifier via the main amplifier and the pilot signal component supplied to the error amplifier via the delay circuit, and creating a difference in the absolute value of the transmission amount of both pilot signal components, A feedforward amplifier characterized in that the attenuation of an automatic equalizer provided in a loop including a delay circuit or the gain of a main amplifier is automatically adjusted by the difference signal.
JP59243821A 1984-11-19 1984-11-19 Feedforward amplifier Pending JPS61121607A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59243821A JPS61121607A (en) 1984-11-19 1984-11-19 Feedforward amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59243821A JPS61121607A (en) 1984-11-19 1984-11-19 Feedforward amplifier

Publications (1)

Publication Number Publication Date
JPS61121607A true JPS61121607A (en) 1986-06-09

Family

ID=17109426

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59243821A Pending JPS61121607A (en) 1984-11-19 1984-11-19 Feedforward amplifier

Country Status (1)

Country Link
JP (1) JPS61121607A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199041A (en) * 1991-04-11 1993-08-06 Hughes Aircraft Co Amplifier
JPH0799414A (en) * 1993-09-29 1995-04-11 Nec Corp Feedforward distortion compensation amplifier
JPH07147547A (en) * 1993-11-24 1995-06-06 Nec Corp Feedforward type distortion compensation circuit
US5532642A (en) * 1994-03-10 1996-07-02 Nec Corporation Feedforward-type distortion compensation circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199041A (en) * 1991-04-11 1993-08-06 Hughes Aircraft Co Amplifier
JPH0799414A (en) * 1993-09-29 1995-04-11 Nec Corp Feedforward distortion compensation amplifier
JPH07147547A (en) * 1993-11-24 1995-06-06 Nec Corp Feedforward type distortion compensation circuit
US5532642A (en) * 1994-03-10 1996-07-02 Nec Corporation Feedforward-type distortion compensation circuit

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