JPS61121060U - - Google Patents
Info
- Publication number
- JPS61121060U JPS61121060U JP10266485U JP10266485U JPS61121060U JP S61121060 U JPS61121060 U JP S61121060U JP 10266485 U JP10266485 U JP 10266485U JP 10266485 U JP10266485 U JP 10266485U JP S61121060 U JPS61121060 U JP S61121060U
- Authority
- JP
- Japan
- Prior art keywords
- detection element
- resistor
- circuit
- electromagnetic circuit
- electromagnetic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 12
- 238000010586 diagram Methods 0.000 description 7
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
Landscapes
- Monitoring And Testing Of Exchanges (AREA)
Description
第１図は従来のモニタ回路図、第２図は本考案
の一実施例の回路図、第３図―ａ，ａ′，ｂ，ｂ
′は本考案の応用例の回路図である。
Ａ０，Ａ１〜Ａｎ，ＲＬ……被測定電磁回路の
継電器、ｂ０，ｂ１〜ｂｎ，ｏｎ……被測定電磁
回路の継電器接点、ＣＯＮＴ……モニタ情報指定
制御回路、ＭＲ，ＭＲ０，ＭＲ１〜ＭＲｎ……挿
入抵抗、ＡＮＤ０，１〜ｎ，ＮＡＤ……測定検出
用ＭＯＳデバイス論理素子。
Fig. 1 is a conventional monitor circuit diagram, Fig. 2 is a circuit diagram of an embodiment of the present invention, and Fig. 3 - a, a', b, b.
' is a circuit diagram of an application example of the present invention. A 0 , A 1 to An, RL...Relay of the electromagnetic circuit to be measured, b 0 , b 1 to bn, on...Relay contact of the electromagnetic circuit to be measured, CONT...Monitor information specification control circuit, MR, MR 0 , MR1 to MRn...insertion resistance, AND0 , 1 to n, NAD...MOS device logic element for measurement detection.
補正 昭６１．２．２０
考案の名称を次のように補正する。
考案の名称 モニタ回路
実用新案登録請求の範囲、図面の簡単な説明を
次のように補正する。Amendment February 20, 1981 The name of the invention is amended as follows. Title of the invention: Monitor circuit The scope of claims for utility model registration and the brief description of the drawings are amended as follows.
【実用新案登録請求の範囲】
ＭＯＳデバイスより成る検出素子と、この検出
素子の入力に直接接続された抵抗とを備え、前記
検出素子の駆動電圧より絶対値において大きい電
圧を前記抵抗を経て前記検出素子に供給する電磁
回路の動作状態をこの電磁回路と前記検出素子と
の間に前記抵抗を直列接続して監視することを特
徴とするモニタ回路。[Claims for Utility Model Registration] Comprising a detection element made of a MOS device and a resistor directly connected to the input of the detection element, a voltage larger in absolute value than a driving voltage of the detection element is applied to the detection element through the resistor. A monitor circuit characterized in that the operating state of an electromagnetic circuit supplying an element is monitored by connecting the resistor in series between the electromagnetic circuit and the detection element.
【図面の簡単な説明】
第１図は従来のモニタ回路図、第２図は本考案
の一実施例の回路図、第３図―ａ，ｂ，ｃ，ｄは
本考案の応用例の回路図である。
Ａ０，Ａ１〜Ａｎ，ＲＬ……被測定電磁回路の
継電器、ｂ０，ｂ１〜ｂｎ，ｏｎ……被測定電磁
回路の継電器接点、ＣＯＮＴ……モニタ情報指定
制御回路、ＭＲ，ＭＲ０，ＭＲ１〜ＭＲｎ……挿
入抵抗、ＡＮＤ０，１〜ｎ，ＮＡＤ……測定検出
用ＭＯＳデバイス論理素子。[Brief Description of the Drawings] Fig. 1 is a conventional monitor circuit diagram, Fig. 2 is a circuit diagram of an embodiment of the present invention, and Fig. 3 - a, b, c, d is a circuit diagram of an applied example of the present invention. It is a diagram. A 0 , A 1 to An, RL...Relay of the electromagnetic circuit to be measured, b 0 , b 1 to bn, on...Relay contact of the electromagnetic circuit to be measured, CONT...Monitor information specification control circuit, MR, MR 0 , MR1 to MRn...insertion resistance, AND0 , 1 to n, NAD...MOS device logic element for measurement detection.
Claims (1)
素子の入力に直接接続された抵抗とを備え、前記
検出素子の駆動電圧より絶対値において大きい電
圧を前記抵抗を経て前記検出素子は供給する電磁
回路の動作状態をこの電磁回路と前記検出素子と
の間に前記抵抗を直列接続して監視することを特
徴とするモニタ回路。 Operation of an electromagnetic circuit comprising a detection element made of a MOS device and a resistor directly connected to an input of the detection element, the detection element supplying a voltage larger in absolute value than the driving voltage of the detection element via the resistor. A monitor circuit characterized in that the state is monitored by connecting the resistor in series between the electromagnetic circuit and the detection element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10266485U JPS61121060U (en) | 1985-07-04 | 1985-07-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10266485U JPS61121060U (en) | 1985-07-04 | 1985-07-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61121060U true JPS61121060U (en) | 1986-07-30 |
Family
ID=30662063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10266485U Pending JPS61121060U (en) | 1985-07-04 | 1985-07-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61121060U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5217762A (en) * | 1975-08-01 | 1977-02-09 | Hitachi Ltd | Monitoring circuit of operating relays condition |
-
1985
- 1985-07-04 JP JP10266485U patent/JPS61121060U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5217762A (en) * | 1975-08-01 | 1977-02-09 | Hitachi Ltd | Monitoring circuit of operating relays condition |
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