JPS61120949U - - Google Patents

Info

Publication number
JPS61120949U
JPS61120949U JP68885U JP68885U JPS61120949U JP S61120949 U JPS61120949 U JP S61120949U JP 68885 U JP68885 U JP 68885U JP 68885 U JP68885 U JP 68885U JP S61120949 U JPS61120949 U JP S61120949U
Authority
JP
Japan
Prior art keywords
auxiliary storage
controller
floppy disk
bubble memory
disk controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP68885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP68885U priority Critical patent/JPS61120949U/ja
Publication of JPS61120949U publication Critical patent/JPS61120949U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の全体的な構成を示
すブロツク図、第2図は第1図中のコントローラ
20に含まれるデバイス切換回路の一例を示す図
である。 10……CPU、12……複合形補助記憶装置
、16……バブルメモリ、18……フロツピーデ
イスクコントローラ、20……補助記憶コントロ
ーラ、24……切換スイツチ。
FIG. 1 is a block diagram showing the overall configuration of an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a device switching circuit included in the controller 20 in FIG. 10... CPU, 12... Composite auxiliary storage device, 16... Bubble memory, 18... Floppy disk controller, 20... Auxiliary storage controller, 24... Changeover switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] バブルメモリと、フロツピーデイスクコントロ
ーラと、これらバブルメモリおよびフロツピーデ
イスクコントローラを択一的にCPUに結合する
補助記憶コントローラと、この補助記憶コントロ
ーラに含まれ、上記バブルメモリと上記フロツピ
ーデイスクコントローラのいずれを選択するのか
をソフトウエアおよびハードウエアの両面で制御
可能なデバイス切換手段とを備えた複合形補助記
憶装置。
a bubble memory, a floppy disk controller, an auxiliary storage controller that selectively couples the bubble memory and the floppy disk controller to the CPU, and an auxiliary storage controller that is included in the auxiliary storage controller and connects the bubble memory and the floppy disk controller. A composite auxiliary storage device comprising device switching means that can control which one to select using both software and hardware.
JP68885U 1985-01-08 1985-01-08 Pending JPS61120949U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP68885U JPS61120949U (en) 1985-01-08 1985-01-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP68885U JPS61120949U (en) 1985-01-08 1985-01-08

Publications (1)

Publication Number Publication Date
JPS61120949U true JPS61120949U (en) 1986-07-30

Family

ID=30472757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP68885U Pending JPS61120949U (en) 1985-01-08 1985-01-08

Country Status (1)

Country Link
JP (1) JPS61120949U (en)

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