JPS61118192U - - Google Patents
Info
- Publication number
- JPS61118192U JPS61118192U JP19948684U JP19948684U JPS61118192U JP S61118192 U JPS61118192 U JP S61118192U JP 19948684 U JP19948684 U JP 19948684U JP 19948684 U JP19948684 U JP 19948684U JP S61118192 U JPS61118192 U JP S61118192U
- Authority
- JP
- Japan
- Prior art keywords
- time code
- running
- recording medium
- output
- code data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Description
第1図は本考案の一実施例の概略構成を示すブ
ロツク図、第2図は遅延・制御回路の具体的な構
成例を示すブロツク回路図、第3図は第2図の回
路の動作を説明するためのタイムチヤートである
。
1……磁気ヘツド、4……LTC読取回路、6
……表示回路、7……遅延・制御回路、8……停
止モード選択操作ボタン。
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of the present invention, FIG. 2 is a block circuit diagram showing a specific example of the configuration of a delay/control circuit, and FIG. 3 shows the operation of the circuit in FIG. This is a time chart for explanation. 1...Magnetic head, 4...LTC reading circuit, 6
...Display circuit, 7...Delay/control circuit, 8...Stop mode selection operation button.
Claims (1)
して得られるタイムコード再生信号よりタイムコ
ードデータを読み取るタイムコード読取手段と、
上記記録媒体の走行を停止操作するための走行停
止操作手段と、この走行停止操作手段からの出力
に応じ上記タイムコード読取手段からのタイムコ
ードデータ全体が出力されるまで上記記録媒体の
走行を持続させた後に走行停止制御する遅延・制
御手段とを備えて成るタイムコードデータ出力回
路。 a time code reading means for reading time code data from a time code reproduction signal obtained by reproducing a time code signal recorded on a recording medium;
A running stop operation means for stopping the running of the recording medium, and according to the output from the running stop operating means, the running of the recording medium is continued until the entire time code data is output from the time code reading means. A time code data output circuit comprising delay/control means for controlling running stop after the time code has been set.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19948684U JPS61118192U (en) | 1984-12-29 | 1984-12-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19948684U JPS61118192U (en) | 1984-12-29 | 1984-12-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61118192U true JPS61118192U (en) | 1986-07-25 |
Family
ID=30759455
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19948684U Pending JPS61118192U (en) | 1984-12-29 | 1984-12-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61118192U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52152710A (en) * | 1976-06-14 | 1977-12-19 | Hitachi Ltd | Control system for running command generating circuit |
JPS5317217A (en) * | 1976-07-31 | 1978-02-17 | Sony Corp | Tape compiler |
-
1984
- 1984-12-29 JP JP19948684U patent/JPS61118192U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52152710A (en) * | 1976-06-14 | 1977-12-19 | Hitachi Ltd | Control system for running command generating circuit |
JPS5317217A (en) * | 1976-07-31 | 1978-02-17 | Sony Corp | Tape compiler |
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