JPS61118020A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To limit a through-current by providing a transistor (TR) between the base of the 3rd TR connected between the base and the emitter of the 1st TR and the 2nd potential point. CONSTITUTION:When a through-current flows to the 2nd potential point 2 from the 1st potential point 1 via the 1st and 2nd TRs 6, 8, a base-emitter voltage of the TR 8 is increased as the through-current increases. Then the base-emitter voltage of the 7th TR 17 is increased. When the base-emitter voltage of the TR 7 is increased, a collector current of the TR 17 is increased to decrease the base current from a constant current source 14 to the 3rd TR 9.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, for example, a totem pole type device used in a motor drive circuit for large currents, an output circuit of a TTL logic circuit for small currents, etc. This relates to the output circuit.

[Conventional technology]

Figure 2 shows a conventional totem-pole output circuit of this type.
dL point, (2) is the second point at ground potential, (3)
(4) is the first input terminal into which the first human power signal consisting of ``H level and ゝL level is input; (4) is the second input terminal into which the second human power signal consisting of 1H level and %LI level is input;
When the first human power signal is 1H level, the second input terminal signal is 1H level or hL level, and when the first human power signal is 1L level, the level is 1. It is impossible to become a L-rubel. (5
) is the output terminal, and (6) is the current control resistor (7).
The output NPIII is connected to the 11th E point via the emitter or the output terminal (5).
) the first transistor consisting of a transistor, (s)F!
A second output transistor (NPN) transistor connected between the output terminal and the second potential point;
9) is a third transistor consisting of a power NPN transistor connected between the base and collector of the first transistor (6), α0 is the transistor of Ml above (
6) between the base and emitter! 1i & bias resistor, ■ is the fourth transistor consisting of a Hough NPN) transistor connected between the base and collector of the second transistor (8), and ■ is the base of the second transistor (18).・The bias resistor a3 is connected between the emitters and the collector is connected to the third transistor (9).
) is connected to the base of the first potential point (1) via a constant current source (2) composed of a transistor, etc.
a fifth transistor consisting of an input NPN transistor, whose emitter connects the 21st point to the point (2) and whose base is connected to the first input terminal (3);
is connected to the collector or the base of the fourth transistor (2), and is also connected to the first potential point (1) via a constant current source constituted by a transistor, etc., and the emitter is connected to the second potential point. is composed of an input NI'N transistor whose base is connected to the second input terminal (4)! There are 46 transistors.

Next, the operation of the totem-hole type output circuit configured in this manner will be explained. First, when a signal of 1H level is input to the first input terminal (3) and a signal of 1L level is input to the second input terminal (4), the fifth transistor o3 becomes conductive because its base potential becomes 1H level. state, and a current flows from the first potential point to the 2i1 point (2) via the constant current source Q4+ and the fifth transistor 0. As a result, the base current is not supplied to the base of the third transistor (9), so the third transistor (9) becomes non-conductive, and the base of the transistor (6) in shift 6 also has a current.
Since power is not supplied, the sixth transistor (6) also becomes non-conductive. Further, the base of the sixth transistor C15 becomes at the 'xr' level, so that it becomes non-conductive. As a result, a constant current is supplied from the first potential point (1) to the base of the fourth transistor U via the constant current source aB, so that the fourth transistor α11 becomes conductive, and the second transistor ( 8), the second transistor (8) also becomes conductive. Therefore, current flows from the output terminal (5) to the second potential point (2) via the second transistor (8). Further, when a signal of level ``v'' is inputted to the first input terminal (3) and a signal of level 1r is inputted to the second input terminal (4), the operation is reversed to that described above, that is, the fifth transistor 0
are in a non-conducting state, the third and first transistors (9).

(6) becomes conductive, the sixth transistor D becomes conductive, and the fourth and second transistors l, (8)
becomes non-conductive, so a current flows from the first potential point (1) to the output end (5) via the current limiting resistor (7) and the first transistor (6).

Further, when a signal of 1H level is input to both the first and second input terminals (3), the fifth transistor 03 becomes conductive and cools down, so that the third and first transistors (91, (
6) becomes non-conductive, and the sixth transistor Tomoe also becomes conductive, so that the fourth and first transistors (81 also become non-conductive. Therefore,
The output end (5) is in an electrically floating state.

[Problem that the invention seeks to solve]

In the totem pole output circuit configured as described above, when the signal level input to the first and second input terminals +3) and (4) switches, that is, when the signal level input to the first input terminal (3) is switched, The signal level input to the second input terminal (4) is 1H level or %L# level, and the signal level input to the second input terminal (4) is %I level.
When switching from If level to 1H level, the signal level input to the first input terminal (3) changes from 1L level to '
When the signal level input to the second input terminal (4) of the HH level switches to the H#H# level La level, a difference may occur between the switching of the first and second human input signals, or the first The sixth transistor (6) (81 (91 (11) 03
Due to the difference in switching speed of Q51, both the fifth and sixth transistors a3 (to) are in a non-conducting state, and the first and second transistors f6) (8) are both in a conducting state at the same time. As a result, the 11th! place point (1
) through the current limiting resistor (7) and the first and second transistors (61+81), a through current flows from the second to the point (2), and this through current becomes a large current and the first In order to prevent the second transistor (6) from being destroyed, a current limiting resistor (7) is inserted to limit the current value of the through current.

However, by inserting the current limiting resistor (7), the output terminal from the first potential point (1)! 5), a voltage drop occurs at the current-limiting resistor (7), resulting in a problem in that a large output current cannot be flowed out to the output terminal (5).

This invention has been made in view of the above points, and allows a large output current to flow to the output terminal, and even when both the first and second transistors are in a conductive state, the first potential point and the 21st! The object of the present invention is to obtain a semiconductor integrated circuit device that can limit the current value of the through current flowing between the points and the points.

[Means for solving problems]

The semiconductor integrated circuit device according to the present invention has a semiconductor integrated circuit device connected between a first potential point and an output terminal, and whose conducting state and non-conducting state are controlled based on a first human power signal inputted to the first input terminal. Based on the second human power signal connected between the first transistor and the output terminal and the second potential point and input to the second input terminal,
In a device including a second transistor whose conducting state and non-conducting state are controlled, the base of the first transistor
A seventh transistor connected between the base of the third transistor connected between the emitters and the second point, and connected to the base of the second transistor via the base or a resistor. It is.

[For production]

In this invention, when a through current flows between the first potential point and the second potential point of the first and second transistors, the base-emitter 1m1fE pressure of the second transistor increases and the current flows through the base of the seventh transistor. As a result, the collector current of the seventh transistor increases, the pace current of the third transistor decreases, and the collector current of the first transistor, that is, the through current decreases.

〔Example〕

An embodiment of the present invention will be described below based on FIG. The seventh transistor is an NPN transistor connected through a resistor.

Next, the operation of the totem pole type semiconductor device of the semiconductor integrated circuit device configured in this manner will be explained.

First, a signal of "H level" is input to the first input terminal (3), 714.
When the LL level is input to the second input terminal (4), the fifth transistor +13 becomes conductive because its pace potential becomes 1H level, and the constant current source (
14 and the fifth transistor 0 to the second potential point (2
) will cause current to flow. As a result, the base current cannot be supplied to the base of the third transistor (9), so the third transistor (9) becomes non-conductive, and the 88
Since no current is supplied to the base of the sixth transistor (6), the sixth transistor (6) also becomes non-conductive. At this time, the base potential of the sixth transistor (2) becomes 1L level, so that it becomes non-conductive. As a result, a constant current flows from the 1st point (1) through the constant current source @
is supplied to the base of transistor U, so the fourth transistor 0 becomes conductive, and the second transistor (
8), the second transistor (8) also becomes conductive. Therefore, current flows from the output terminal (5) to the second point (2) via the second transistor (8). At this time, since the seventh transistor αη and the fourth transistor I are in a conductive state, the base current is supplied and the fourth transistor I becomes conductive, and the current from the constant current source 04) flows together with the fifth transistor D. The third transistor (9) is in a non-conducting state◇ Also, when a ''VV level signal is input to the first input terminal (3) and a 1H level signal is input to the second input terminal (4), The operation is opposite to the above, in other words, the fifth transistor a3 is non-conductive, the third and first transistors 19+ +61 are conductive, and the sixth transistor CI5 is conductive, and the fourth and second transistors are conductive. 0) 8) will be in a non-conducting state, so the current limiting resistor (
7) and the output terminal (5) via the first transistor (6).
), which causes current to flow.

At this time, since the fourth transistor αD is in a non-conducting state, the base current is not supplied to the transistor α in the transistor 7, and the transistor α is in a non-conducting state.

Furthermore, when a signal of 'H level is inputted to both the first and second input terminals (3), the fifth transistor Ω becomes conductive, so that the third and first transistors i9j i6
1 becomes non-conductive, and the sixth transistor b
also become conductive, so the fourth and first transistors α
11 (81 is also in a non-conductive state).

Therefore, the output end (5) is in an electrically floating state. At this time, since the fourth transistor U is in a non-conducting state, the seventh transistor αη is not supplied with base current and is in a non-conducting state.

Therefore, in this case as well, even if the seventh transistor α force and resistance are added, the circuit operation in the steady state is not affected.

Moreover, compared to the conventional one shown in FIG.
), the output current that flows from point (1) through the first transistor (6) to the output terminal (5) increases.

Next, the current value of the through current based on the conduction of the first and second transistors < 61 (81) at the time of switching the signal levels input to the first and second input terminals (31 (4) We will explain that it can be limited by the transistor plane of the first point (1).When a through current flows from the first point (1) to the 21st! point (2) via the first and second transistors (6) and (8), As the through current increases, the second
Base-emitter voltage vB8 of transistor (8)
will increase. And the seventh transistor α
Since the base current of h is expressed by the following equation (1), the base current of the second transistor (8).

0 l-η-(VB, (81-VB]cα) which increases as the emitter voltage increases) 7 RQ2
+...-(1) However, the force 3αη, vBEa is the base current value and base-emitter voltage value of the seventh transistor αη, and BE(8) is the base-emitter voltage value of the second transistor (8). Voltage value, RQ3H bias resistance ■ Resistance resistance value 〇 In this way, when the voltage between the base and emitter of the seventh transistor α increases, the collector current of the seventh transistor Q71 increases, and the constant current source (14
) to the third transistor (9) will be reduced. As a result, the first transistor (
The base current of 6) is also reduced, and its collector current is also reduced. In other words, a decrease in the collector current of the first transistor (6) means a decrease in the through current, which limits the current value of the through current.

〔Effect of the invention〕

As described above, the invention of C has a first terminal connected between a point and an output terminal, and a conductive state and a non-conductive state are controlled based on a first input signal inputted to the first input terminal. There is a connection between the first transistor and the output terminal and the second potential point.
A second transistor connected between the base and emitter of the first transistor is provided with a second transistor whose conductive state and non-conductive state are controlled based on a second input signal inputted to the input terminal. Since a seventh transistor is provided, which is connected between the base of the transistor No. 3 and the second point, and whose base is connected to the base of the second transistor via the resistor, When a through current flows between the potential point and the seventh transistor, the seventh transistor reduces the collector current of the first transistor, so the current value of the through current can be limited, and a large output current can flow through the output terminal. It has the following.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional totem pole type output circuit. In the figure, (1) is the first point, (2) is the second potential point, (3) is the first input terminal, (4) is the second input terminal, (5) is the output terminal, (6) is the first transistor, (8) i is the second transistor, (9) is the third transistor, and ■ is the fourth transistor.
, α3 is the fifth transistor, and the convex one is the sixth transistor.
, αη is the ninth transistor, and ■ is a resistor. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A first transistor connected between the first potential point and the output end, a second transistor connected between the output end and the second potential point, and a base of the first transistor. a third transistor connected between the collectors of the transistor; a fourth transistor connected between the base and collector of the second transistor; a fourth transistor connected between the base of the third transistor and the second potential point; a fifth transistor whose base is connected to the first input terminal, a fifth transistor connected between the base of the fourth transistor and the second potential point, whose base is connected to the second input terminal, and whose base is connected to the second input terminal; a seventh transistor connected between the third transistor and the second potential point, the base of which is connected to the base of the second transistor via a resistor;
A semiconductor integrated circuit device equipped with transistors.