JPS61117502U - - Google Patents
Info
- Publication number
- JPS61117502U JPS61117502U JP19732984U JP19732984U JPS61117502U JP S61117502 U JPS61117502 U JP S61117502U JP 19732984 U JP19732984 U JP 19732984U JP 19732984 U JP19732984 U JP 19732984U JP S61117502 U JPS61117502 U JP S61117502U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- rack
- input
- control panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Patch Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19732984U JPS61117502U (enExample) | 1984-12-31 | 1984-12-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19732984U JPS61117502U (enExample) | 1984-12-31 | 1984-12-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61117502U true JPS61117502U (enExample) | 1986-07-24 |
Family
ID=30755561
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19732984U Pending JPS61117502U (enExample) | 1984-12-31 | 1984-12-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61117502U (enExample) |
-
1984
- 1984-12-31 JP JP19732984U patent/JPS61117502U/ja active Pending
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