JPS61116469A - Facsimile equipment - Google Patents

Facsimile equipment

Info

Publication number
JPS61116469A
JPS61116469A JP59235997A JP23599784A JPS61116469A JP S61116469 A JPS61116469 A JP S61116469A JP 59235997 A JP59235997 A JP 59235997A JP 23599784 A JP23599784 A JP 23599784A JP S61116469 A JPS61116469 A JP S61116469A
Authority
JP
Japan
Prior art keywords
circuit
decoding
image signal
receiving side
decoding error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59235997A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Watanabe
渡辺 一良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59235997A priority Critical patent/JPS61116469A/en
Publication of JPS61116469A publication Critical patent/JPS61116469A/en
Pending legal-status Critical Current

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  • Facsimile Transmission Control (AREA)

Abstract

PURPOSE:To shorten a transmission time by informing the receiving side with one-stage accelerated digital image transmission speed from the analyzed result of a decoding error degree informing signal received by a modulator/demodulator when the decoding error is a specified value or below and providing a control circuit for retraining of a demodulator circuit. CONSTITUTION:When a decoder 3 monitors received image signal data by the data group and recognizes the decoding error due to a noise on a facsimile communications circuit, it outputs said error to a counter 4, which counts decoding errors. After the 1st communications control circuit 5 finishes decoding image signal data of one page, it gives to the modulator circuit 1 instructions for generating and transmitting a communications sequence signal for informing a transmitting side 10' of the degree of the decoding error with the aid of the value outputted by the counter 4. An analysis circuit 6' analyes the informed communications sequence signal data. When the error count value is below the specified one, the 2nd communications control circuit 7' indicates the receiving side 10 the higher image signal transmission speed than the previous time. The modulator circuit 1 at the receiving side 10 is trained at the new image signal transmission speed, which is improved, and the transmission time is shortened.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ファクシミリ装置に関し、特−画信号通信上
の制御方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a facsimile machine, and more particularly to a control system for special picture signal communication.

〔従来の技術及び発明が解決しようとする問題点〕従来
、この種のファクシミリ装置は、雑音の影響によりファ
クシミリ通信回線が悪い状態でディジタル画信号を送信
する場合、良い状態における場合よりも遅い速度で画信
号を送信する。しかし。
[Prior Art and Problems to be Solved by the Invention] Conventionally, this type of facsimile apparatus has been known to transmit digital image signals at a slower speed than when the facsimile communication line is in good condition due to the influence of noise. to send the image signal. but.

ファクシミリ通信回線上の雑音発生は、バースト的な外
部からの影響による場合が多く2画信号送信中に雑音が
減少して9回線が良い状態に復帰することがあっても、
遅い速度のままでファクシミリ通信を続行し終了すると
いう欠点があった。
Noise generation on facsimile communication lines is often caused by burst-like external influences, and even if the noise decreases during 2-picture signal transmission and the 9 line returns to a good condition,
The drawback was that facsimile communication continued and ended at a slow speed.

本発明は、ファクシミリ通信において2画信号通信中に
、受信側からの復号エラー度合通知信号により、ファク
シミリ通信回線の状態が復帰したと送信側が判断すると
、送信側から一段高い速度を受信側に指示し、受信側の
復調回路を再トレーニングし8画信号伝送速度を高め、
伝送時間を短縮させるファクシミリ装置を提供すること
を目的とする。
According to the present invention, during two-picture signal communication in facsimile communication, when the transmitting side determines that the state of the facsimile communication line has been restored based on a decoding error degree notification signal from the receiving side, the transmitting side instructs the receiving side to increase the speed by one level. Then, the demodulation circuit on the receiving side is retrained to increase the 8-picture signal transmission speed,
An object of the present invention is to provide a facsimile device that reduces transmission time.

〔発明の構成〕[Structure of the invention]

本発明によれば、ファクシミリ通信回線上でディジタル
画信号を送受信するための変復調回路と。
According to the present invention, a modulation/demodulation circuit for transmitting and receiving digital image signals on a facsimile communication line.

該変復調回路で受信したディジタル画信号を復号する復
号化装置と、前記ファクシミリ通信回線上の雑音により
生じる前記受信ディジタル画信号の復号エラーを計数す
るカウンタと、該カウンタの出力に応じて送信側に復号
エラーの度合を通知するための復号エラー度合通知信号
を作シ、該復号エラー度合通知信号を前記変復調回路に
与えて前記ファクシミリ通信回線上に送出させる信号作
成回路と、前記変復調回路で受信した前記復号エラー度
合通知信号を解析する解析回路と、該解析回路による解
析結果において前記復号エラーが規定値以下を示してい
る場合に受信側に前回よりも一段速いディジタル画信号
送信速度を通知し、受信側の復調回路を再トレーニング
するための制御回路とを有することを特徴とするファク
シミリ装置が得られる。
a decoding device that decodes the digital image signal received by the modulation/demodulation circuit; a counter that counts decoding errors of the received digital image signal caused by noise on the facsimile communication line; a signal generating circuit that generates a decoding error degree notification signal for notifying the degree of decoding error, provides the decoding error degree notification signal to the modulation/demodulation circuit to transmit it on the facsimile communication line, and receives the signal by the modulation/demodulation circuit; an analysis circuit that analyzes the decoding error degree notification signal; and when the analysis result by the analysis circuit indicates that the decoding error is below a specified value, notifying the receiving side of a digital image signal transmission speed that is one step faster than the previous time; A facsimile apparatus is obtained, characterized in that it has a control circuit for retraining a demodulation circuit on the receiving side.

即ち1本発明は、ファクシミリ画信号通信中に外部から
の影響が減少しファクシミリ通信回線の状態が復帰した
場合、送信側は、受信側が送出する復号エラーの度合を
示す信号を受信し、解析する。その結果2回線の状態が
以前よりも良好に々っだと判断すると一段高い画信号伝
送速度を受信側に通知し、その後ただちに新しい画信号
伝送速度で受信側の復調回路を再トレーニングし、トレ
ーニングに成功したらその伝送速度で画信号を送信する
(これをステップアップ機能と呼ぶ)。このようにして
、前述した従来の欠点を除去し2画信号伝送速度を高め
、伝送時間を短縮させるものである。
That is, in one aspect of the present invention, when the external influence is reduced during facsimile image signal communication and the state of the facsimile communication line is restored, the transmitting side receives and analyzes the signal sent by the receiving side indicating the degree of decoding error. . As a result, if it is determined that the conditions of the two lines are better than before, it notifies the receiving side of a higher image signal transmission rate, and then immediately retrains the receiving side's demodulation circuit at the new image signal transmission rate and performs training. If successful, the image signal is transmitted at that transmission speed (this is called the step-up function). In this way, the above-mentioned conventional drawbacks are eliminated, the two-image signal transmission speed is increased, and the transmission time is shortened.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図を参照すると2本発明の一実施例によるファクシ
ミリ装置10及び10′が2台示されている。受信側の
ファクシミリ装置が10で示され。
Referring to FIG. 1, two facsimile machines 10 and 10' are shown according to one embodiment of the present invention. A receiving facsimile machine is indicated at 10.

送信側のファクシミリ装置が10’で示されている。The sending facsimile machine is indicated at 10'.

両ファクシミリ装置1o及び10’は全く同じ構成のも
のであるが、送信側ファクシミリ装置10’内の復号化
装置、カウンタ、第1の通信制御回路は省略されている
Both facsimile machines 1o and 10' have exactly the same configuration, but the decoding device, counter, and first communication control circuit in the sending facsimile machine 10' are omitted.

図において、■及び1′はディジタル画信号データ送受
信用及び通信手順信号送受信用の変復調回路、3は変復
調回路1により受信され復調された画信号データを復号
化する復号化装置、4は復号化装置3からの復号エラー
出力を計数するカウンタ、5はカウンタ4からの出方に
より2通信手順を作成する第1の通信制御回路である。
In the figure, ■ and 1' are modulation/demodulation circuits for transmitting and receiving digital image signal data and communication procedure signals, 3 is a decoding device that decodes the image signal data received and demodulated by the modulation/demodulation circuit 1, and 4 is a decoding device. A counter 5 that counts decoding error outputs from the device 3 is a first communication control circuit that creates two communication procedures based on the output from the counter 4.

6′は受信した通信手順信号を解析する解析回路、7′
は解析回路6の出力により、受信側の復調回路を再トレ
ーニングさせるための出力を変復調回路1′に向けて出
力する第2の通信制御回路である。6は前述の6′と同
様の解析回路、7は前述の7′と同様の第2の通信制御
回路である。
6' is an analysis circuit that analyzes the received communication procedure signal; 7'
is a second communication control circuit that outputs an output to the modulation/demodulation circuit 1' for retraining the demodulation circuit on the receiving side based on the output of the analysis circuit 6. 6 is an analysis circuit similar to 6' described above, and 7 is a second communication control circuit similar to 7' described above.

受信側ファクシミリ装置10において、受信した画信号
データを、復号化装置3が、所定のデータ群ごとに監視
し、ファクシミリ通信回線上の雑音による復号エラーを
認めると、カウンタ4に対して出力し、カウンタ4は復
号エラー数を計数する。第1の通信制御回路5は、1ペ
一ジ分の画信号データを復号化し終えた後にカウンタ4
が出力する値により、送信側10′へ復号エラーの度合
を通知するための通信手順信号(即ち、復号エラー度合
通知信号)を作成し、送出する指示を変調回路1に対し
て与える。即ち、第1の通信制御回路5が復号エラー度
合通知信号の作成回路の役目をしている。送信側10′
は、受信側10よシ送出された前記通信手順信号を復調
回路1′より受信し。
In the receiving facsimile device 10, the decoding device 3 monitors the received image signal data for each predetermined data group, and if it detects a decoding error due to noise on the facsimile communication line, it outputs it to the counter 4, Counter 4 counts the number of decoding errors. After the first communication control circuit 5 has finished decoding the image signal data for one page, the first communication control circuit 5 starts the counter 4
Based on the output value, an instruction is given to the modulation circuit 1 to create and send a communication procedure signal (ie, a decoding error degree notification signal) for notifying the transmitting side 10' of the degree of decoding error. That is, the first communication control circuit 5 serves as a circuit for generating a decoding error degree notification signal. Sending side 10'
receives the communication procedure signal sent from the receiving side 10 from the demodulation circuit 1'.

解析回路6′に通知する。解析回路6′は1通知された
通信手順信号データを解析し、エラーカウント値が規定
値以下になった場合に、第2の通信制御回路7′にその
旨を通知する。第2の通信制御回路7′は、受信側10
へ前回よりも速い画信号伝送速度を指示するだめの手順
信号を作成し、変復調回路1′に通知する。変調回路1
′は通知された手順信号を変調して受信側10へ送信し
、受信側10の復調回路1を新しい画信号伝送速度でト
レーニングする。トレーニングに成功すると受信側10
は送信側10′に対して肯定応答を手順信号により通知
する。肯定応答を受信した送信側10′は2次のページ
を新しく決定した画信号伝送速度で9画信号を受信側へ
送信する。なお、解析回路6′は受信側のカウンタ4と
第1の通信制御回路5の間に配置し、ステップアップの
可否の判定を行わせても。
The analysis circuit 6' is notified. The analysis circuit 6' analyzes the notified communication procedure signal data, and when the error count value becomes less than the specified value, notifies the second communication control circuit 7'. The second communication control circuit 7' is connected to the receiving side 10.
A procedure signal for instructing a higher image signal transmission speed than the previous one is created and sent to the modulation/demodulation circuit 1'. Modulation circuit 1
' modulates the notified procedure signal and transmits it to the receiving side 10, and trains the demodulation circuit 1 on the receiving side 10 at the new image signal transmission rate. If the training is successful, the receiving side 10
notifies the sending side 10' of an acknowledgment by means of a procedure signal. The transmitting side 10', which has received the acknowledgment, transmits a 9-image signal for the second page to the receiving side at the newly determined image signal transmission speed. Note that the analysis circuit 6' may be placed between the receiving side counter 4 and the first communication control circuit 5 to determine whether step-up is possible.

上述の場合と同等の効果を発揮することができる。The same effect as in the above case can be achieved.

以上のようにしてファクシミリ通信回線の状態が復帰す
ると9画信号伝送速度を高め、伝送時間を短縮させるこ
とが可能である。
When the state of the facsimile communication line is restored as described above, it is possible to increase the 9-picture signal transmission speed and shorten the transmission time.

即ち、−例として最大9600ビット/秒の伝送能力の
変復調器を有する装置が1回線ノイズの影響で4800
ビット/秒にフォールバックしてファクシミリ通信を開
始し2通信途中で回線状態が良好になり、9600ビッ
ト/秒にステップアップした場合9通信速度は倍増し、
ステップアップの通信手順に要する無駄時間を補って余
りある。この結果、後続のファクシミリ通信のデータ量
が多ければ多いほど通信効率が高まる。
In other words, - For example, a device having a modem with a maximum transmission capacity of 9,600 bits/second can transmit up to 4,800 bits/second due to the influence of single-line noise.
If you start facsimile communication by falling back to 9600 bits/second and the line condition becomes good during the second communication, and you step up to 9600 bits/second, the communication speed will double.
This more than makes up for the wasted time required for step-up communication procedures. As a result, the larger the amount of data in subsequent facsimile communications, the higher the communication efficiency.

〔発明の効果〕〔Effect of the invention〕

本発明は以上説明したように、受信側で復号エラーを監
視することにより、ファクシミリ通信回線の品質が向上
した場合、より速い伝送速度で画信号通信を行なえると
いう効果がある。
As described above, the present invention has the effect that image signal communication can be performed at a faster transmission speed when the quality of the facsimile communication line is improved by monitoring decoding errors on the receiving side.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図である。 1.1′・・・変復調回路、3・・・復号化装置、4・
・・カウンタ、5・・・第1の通信制御“回路、6及び
6′・・・解析回路、7及び7′・・・第2の通信制御
回路、10・・・受信側ファクシミリ゛装置、10′・
・・送信側ファクシミリ装置。
FIG. 1 is a block diagram of one embodiment of the present invention. 1.1'...Modulation/demodulation circuit, 3...Decoding device, 4.
... Counter, 5... First communication control circuit, 6 and 6'... Analysis circuit, 7 and 7'... Second communication control circuit, 10... Receiving side facsimile device, 10'・
...The sending facsimile device.

Claims (1)

【特許請求の範囲】[Claims] 1、ファクシミリ通信回線上でディジタル画信号を送受
信するための変復調回路と、該変復調回路で受信したデ
ィジタル画信号を復号する復号化装置と、前記ファクシ
ミリ通信回線上の雑音により生じる前記受信ディジタル
画信号の復号エラーを計数するカウンタと、該カウンタ
の出力に応じて送信側に復号エラーの度合を通知するた
めの復号エラー度合通知信号を作り、該復号エラー度合
通知信号を前記変復調回路に与えて前記ファクシミリ通
信回線上に送出させる信号作成回路と、前記変復調回路
で受信した前記復号エラー度合通知信号を解析する解析
回路と、該解析回路による解析結果において前記復号エ
ラーが規定値以下を示している場合に受信側に前回より
も一段速いディジタル画信号送信速度を通知し、受信側
の復調回路を再トレーニングするための制御回路とを有
することを特徴とするファクシミリ装置。
1. A modulation/demodulation circuit for transmitting and receiving a digital image signal over a facsimile communication line, a decoding device for decoding the digital image signal received by the modulation/demodulation circuit, and the received digital image signal caused by noise on the facsimile communication line. A counter for counting decoding errors, and a decoding error degree notification signal for notifying the transmitting side of the decoding error degree according to the output of the counter, and the decoding error degree notification signal is given to the modulation/demodulation circuit to a signal generation circuit for sending out on a facsimile communication line; an analysis circuit for analyzing the decoding error degree notification signal received by the modulation/demodulation circuit; and when the analysis result by the analysis circuit indicates that the decoding error is less than a specified value. 1. A facsimile apparatus comprising: a control circuit for notifying a receiving side of a digital image signal transmission speed that is one step faster than the previous time, and retraining a demodulation circuit on the receiving side.
JP59235997A 1984-11-10 1984-11-10 Facsimile equipment Pending JPS61116469A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59235997A JPS61116469A (en) 1984-11-10 1984-11-10 Facsimile equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59235997A JPS61116469A (en) 1984-11-10 1984-11-10 Facsimile equipment

Publications (1)

Publication Number Publication Date
JPS61116469A true JPS61116469A (en) 1986-06-03

Family

ID=16994269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59235997A Pending JPS61116469A (en) 1984-11-10 1984-11-10 Facsimile equipment

Country Status (1)

Country Link
JP (1) JPS61116469A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619646U (en) * 1991-10-26 1994-03-15 柱燮 鄭 Non-slip tray

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619646U (en) * 1991-10-26 1994-03-15 柱燮 鄭 Non-slip tray

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