JPS61114895U - - Google Patents

Info

Publication number
JPS61114895U
JPS61114895U JP20175484U JP20175484U JPS61114895U JP S61114895 U JPS61114895 U JP S61114895U JP 20175484 U JP20175484 U JP 20175484U JP 20175484 U JP20175484 U JP 20175484U JP S61114895 U JPS61114895 U JP S61114895U
Authority
JP
Japan
Prior art keywords
electronic circuit
circuit package
display
operation section
storage structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20175484U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP20175484U priority Critical patent/JPS61114895U/ja
Publication of JPS61114895U publication Critical patent/JPS61114895U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Mounting Of Printed Circuit Boards And The Like (AREA)
JP20175484U 1984-12-27 1984-12-27 Pending JPS61114895U (Direct)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20175484U JPS61114895U (Direct) 1984-12-27 1984-12-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20175484U JPS61114895U (Direct) 1984-12-27 1984-12-27

Publications (1)

Publication Number Publication Date
JPS61114895U true JPS61114895U (Direct) 1986-07-19

Family

ID=30763835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20175484U Pending JPS61114895U (Direct) 1984-12-27 1984-12-27

Country Status (1)

Country Link
JP (1) JPS61114895U (Direct)

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