JPS6111056B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to improvements in current differential relay devices, and particularly to a current differential relay device that has excellent sensitivity and can prevent unnecessary operation of current differential elements due to applied current. Current differential relay devices are widely used to detect faults in three-phase transformers and generators. Figure 1 shows an example of the use of this current differential relay device in a single connection diagram of a two-winding transformer.
A chopper or disconnector 3 is inserted between the power source 2 and the power source 2, and the detected currents I _A and I _B of the main current transformers 4A and 4B installed on the input side and the output side of the transformer 1, respectively, are current differential. It is input to the relay 5, and when the difference between the detected currents I _A and I _B exceeds a certain limit, the shield breaker 3 is tripped. FIG. 2 shows an example of the circuit configuration for one phase of the current differential relay 5 in FIG. 1. In the figure, 51A and 51B are harmonic passing filters, which have the frequency characteristics of curves 51A and 51B in Figure 3, and the input currents I _A and I _B that have passed through these filters are resistors. The signals are input to 52A and 52B and converted into voltage values. The outputs of these resistors 52A and 52B are led to an adder 53 and added vectorially. A part of the output of the adder 53 is directly input to the instantaneous value comparison circuit 54, and the other part is inputted to the instantaneous value comparison circuit 54 through the fundamental wave passing filter 55. The output of this instantaneous value comparison circuit 54 is passed through a low frequency pass filter 56.
is resisted. Note that this low frequency pass filter 5
6 and the fundamental wave passing filter 55 have characteristics shown in curves 56 and 55 in FIG. 3, respectively. These filters 56, 55
The outputs of are rectified by full-wave rectifier circuits 57 and 58, respectively, and then led to an instantaneous value comparison circuit 59 for comparison calculation. As this instantaneous value comparison circuit, a circuit having an analog-to-digital conversion function is used, and its digital output is outputted to the output terminal via a timer 60 having reversible integration characteristics and a timer 61 having time-limited return characteristics. . The operation of the conventional current differential relay device configured as described above will be explained in different cases as follows. (1) Response in case of an accident inside the transformer If an accident occurs at point _F1 inside the transformer during the one-end power supply procedure as shown in Figure 1, the time chart for each part will be as shown in Figure 4. That is,
Among the currents in each winding of the transformer, the current I _A on the power source side is kept at a constant value as shown in Figure 4 (A), but the current I _B on the load side becomes zero as shown in Figure 4 (B). Therefore, after passing through the harmonic pass filters 51A and 51B, the amount of electricity obtained by adding the electricity in the adder 53 is proportional to the current value I _A as shown in FIG. Here, the operating quantity of electricity |iop| is obtained by passing the output quantity of electricity from the adder 53 in FIG. It becomes as shown in Figure 4 D. On the other hand, the suppressed electrical quantity |ires| is obtained by inputting the output of the adder 53 and the output of the fundamental wave pass filter 55 to the instantaneous value comparison circuit 54 to obtain a vector sum, which is then further passed through the low frequency pass filter 56. After that, it is obtained by rectifying it with a full-wave rectifier circuit. Therefore, if the fault current I _A is only the fundamental component, and ignoring the overwave characteristics of each filter, the result shown in Figure 4 E is obtained. becomes zero. The instantaneous value comparison circuit 59 receives the DC reference electric quantity k ₀ , calculates |iop|−|ires|−|k ₀ |>0, and outputs it as a digital quantity. As shown in FIG. 4, this output waveform is such that the time t ₁ for the logic level "1" is longer than the time t ₂ for the logic level "0", so the timer 60, which has reversible integration characteristics, is gradually charged as shown in FIG. Ru. When this charge level rises and reaches the operation level E of the reversible integral timer, the output becomes logic "1" at that moment (t hours after the start of operation), and the output becomes logic "1" (reversible integral timer The output waveform of the timer 60 is converted into a continuous signal (which becomes an intermittent signal of “1” and “0” even if the operating conditions are met), and is sent to the breaker 3 (the first one) as the output of the current differential relay device.
The trip signal shown in Figure) is output. (2) Response in case of an external accident If an external accident occurs at point _F2 in Figure 1, the time chart for each part of the equipment is shown in Figure 5. In other words, the fault current in this case is the main current transformer 4.
Since they flow equally through A and 4B, the currents I _A and I _B flowing into the current differential relay device 5 have equal absolute values and opposite phases, as shown in FIG. 5 A and B. Therefore, the output of the adder 53 is the current transformer 4A,
4B and the harmonic pass filters 51A and 51B, it becomes zero, and the output of each subsequent circuit remains the same as before the accident. Therefore, the output of the current differential relay is zero, and no unnecessary tripping of the breaker occurs. (3) Response to the turning-on current of the transformer The turning-on current I rush A of the transformer when the power circuit breaker 5 is turned on in the one-end power supply system shown in Fig. 1
becomes as shown in Figure 6A. This includes the state of the residual magnetic flux of the transformer, the phase of the power supply voltage when the circuit breaker is turned on, the impedance behind the transformer (on the power supply side), and the structure of the transformer itself (for example, the amount and material of the iron core, the number of turns), etc. Although it varies depending on the
As shown in the table, it contains not only a fundamental wave current but also a direct current component and a harmonic current higher than the second harmonic current.

[Table] For convenience of explanation, the input current I when closing the circuit breaker is
Assuming that rush is determined by the fundamental wave current I ₁ f and the second harmonic current I ₂ f, the operating electrical quantity |iop|
rush is the amount of electricity obtained through the fundamental wave filter 55 (the leakage of I ₂ f can be ignored), and the suppression amount of electricity ires (the amount of electricity before full-wave rectification) is the amount of electricity obtained by passing I rush through the instantaneous value comparison circuit 54. is given by the amount of electricity obtained through the low frequency pass filter 35. This amount of electricity is the second harmonic (point 2f) determined by the frequency characteristics of various filters, as shown in Figure 7.
This is the difference between A ₁ point and A ₂ point. Further, in the case of I ₁ f, the difference current between the output of the adder 53 and the output of the fundamental wave passing filter 55 is equal, and therefore the vector sum current of the fundamental wave in the instantaneous value comparison circuit 54 becomes zero. This quantity of electricity IRES is full-wave rectified by a full-wave rectifier 57, and the waveform shown in FIG.
ires｜become. Here, |iop| and |ires| are compared in the instantaneous value comparison circuit 59, but as mentioned above, |ires|, which was zero at the time of an internal fault and an external fault, has a value at the transformer input current. The behavior is different from the previous example. That is, for example, if the ratio of I ₂ f to I ₁ f is 15% or more, the output waveform of the instantaneous value comparison circuit 59 |iop|−|ires|−k ₀ >0 is shown in FIG. As shown, the time t _{1 for logic "1} " and the time t ₂ for logic "0" are t ₁ <t ₂ , and the output of the reversible integral timer 60 is not charged to the operating level E. Therefore, no output is generated in the time-limited return timer 61, and the current differential relay device 5 does not trip the circuit breaker 3. However, as shown in Table 2, the ratio of I ₁ f and I ₂ f in the input current of each phase of a three-phase transformer is 15% for each phase because the input phase of each phase is different.
It doesn't necessarily have to be more than that. Therefore, even if the commonly used suppression of I ₂ f/I ₁ f is 15%, the R-phase current differential relay device will operate unnecessarily in the case of the values shown in Table 2. In this way, unnecessary operation of the current differential relay device when the circuit breaker is turned on is completely unacceptable in an actual circuit.

[Table] One way to prevent unnecessary operations from occurring for transformer input currents such as the R-phase values shown in Table 2 is the harmonic suppression sensitivity I ₂ f / I ₁ f = For example, 15% is set to about 5% to achieve high sensitivity. However, if such a method is adopted, if an internal fault occurs, the fault current will be replaced by a third
In cases where harmonic current components such as harmonic current I ₃ f are included, the current differential relay device may malfunction. That is, in the circuit shown in Fig. 1, when the load end is configured with a cable system, if an internal fault occurs in the transformer, the frequency f = 1/2π determined from the reactance L and capacitance C of the cable. An oscillating current of √ flows, but assuming that this is the third harmonic mentioned above, its content (ratio of the third harmonic current I ₃ f to the fundamental wave current I ₁ f flowing from the power supply end side) is 20%, and if the content ratio of the second harmonic current I ₂ f superimposed when the transformer is turned on to I ₁ f is 9% as in the R phase in Table 2, the harmonic suppression electricity amount |ires|3f and ｜ires｜2f
is |ires|3f>|ires|2f. That is,
|ires|2f when the content of I ₂ f to I ₁ f is 9%
If is 1PU, the content of I ₃ f to I ₁ f is 20%
When |Ires|3f becomes 20%/9%≒2.2PU. In such a case, as shown in the time chart of FIG. 8, the output waveform of the instantaneous value comparison circuit 59 (|iop|−|ires|−k ₀ >0) is longer than the logic “1” time t ₁ . 0" time "t ₂ " is longer and the output of the reversible integral timer 60 does not reach the operating level E as shown in FIG. As mentioned above, by increasing I ₂ f / I ₁ f of the current differential relay, it is derived from the transformer's input current |
If the current differential relay is made to be inoperative at the minimum value of ires | 2f, the harmonics will be suppressed by the superimposed harmonic current in the event of an internal fault in the transformer, which may cause it to malfunction. In this way, the conventional harmonic suppression type current differential relay ensures positive and negative operation in response to the input current when the transformer is turned on.
Moreover, it is extremely difficult to ensure correct operation in response to superimposed harmonic currents in the event of an internal fault. The present invention has been made to eliminate the drawbacks of the prior art devices mentioned above. That is, the present invention provides a closing current detecting element that is generated when the transformer is turned on, and when the closing current detecting element operates even in one phase, the detection sensitivity of the closing current detecting element of other phases is changed based on this condition. It is an object of the present invention to provide a current differential relay device that facilitates operation and prevents unnecessary operation of current differential elements due to applied current. The invention will now be described in detail with reference to the illustrated embodiments. In the embodiment of the invention shown in FIG. 9, the same symbols are used for the same circuit elements as in FIG. Although FIG. 2 shows only one phase, FIG. 9 shows the entire device for three phases, R, S, and T. Although the S phase and T phase are shown as black boxes, the contents are the same as in the R phase. I _RA and I _RB flowing into the current differential relay device are the detection currents on the primary and secondary sides of the R-phase winding of the transformer, and I _SA , I _SB and I _TA , I _TB are also S These are the detected currents of the phase and T-phase windings. In the R-phase block diagram, 62R is a conversion circuit that receives the output of the adder 53, passes its second harmonic, and converts the amount of electricity into direct current. The frequency characteristics of this conversion circuit are as shown in FIG.
The output of the conversion circuit 62 |i ₂ f | _DC is input to the sensitivity operation circuit 62R together with outputs from other phases, which will _be described later, and multiplied by a predetermined conversion rate k _.
is input to the instantaneous value comparison circuit 64R together with the output |iop| of the full-wave rectifier circuit 58 and the DC electricity quantity _k'0 . The output of this instantaneous value comparison circuit 64R is led to a time-limited operation timer 65R and made into a continuous signal, and after its sign is inverted by a NOT circuit 66R, it is combined with the output of the time-limited return timer 61 to an AND circuit 67R.
After that, it becomes the R phase output. The output of the NOT circuit 66R is also connected to the S phase and T
The signals are input to S-phase and T-phase sensitivity operation circuits (not shown) via phase AND circuits 68S and 68T. Similarly, the outputs of the S-phase and T-phase NOT circuits 66S and 66T are inputted to an AND circuit 68R and a sensitivity operation circuit 63R. In the above, the AND circuits 68R, 68S, and 68T are all for obtaining the OR condition of the output of the input output detection element of the other two phases (this output becomes logic "0" during operation), and also for obtaining the sensitivity Operation circuit 63
R (the same applies to the other phases) is used to manipulate the conversion k in order to change the sensitivity of the closing current detection element of the own phase depending on the operating conditions of the closing current detection elements of the other two phases. Therefore, the outputs of 66S and 66T are connected to the AND circuit 6 for sensitivity operation of the R-phase input current detection element.
The OR condition is obtained with 8R, and similarly, the output of 66R and 66T is obtained for the S-phase closing current detection element, and the output of 66R and 66S is obtained for the T-phase.
The sensitivity of the input current detection element is controlled by the OR condition. In the apparatus of the present invention configured as described above, the response to various system phenomena will be explained as follows. (1) Response in the event of an internal fault in the transformer Figure 4 shows the time chart of each part of the R-phase current differential relay when an R-phase 1φG internal fault occurs at point F in Figure ₁ . The same mode as . In other words, the output of the instantaneous value comparison circuit 64R in which no harmonic current is superimposed during an internal fault is |iop|+k′ ₀ > |i ₂ f | _DC , and since k | i ₂ f | _DC is zero, it is “0”. It is. Therefore, the output of the NOT circuit 66R becomes a continuous "1" state, and the output of the current differential relay becomes the fourth one.
It is the same as explained with reference to the figure. (2) Response in case of external fault When an external fault of R phase 1φG occurs at point F2 in Fig. ₁ , the time chart of each part of the R phase current differential relay device is in the same mode as shown in Fig. 5. becomes. In other words, in the event of an external fault, the fault current equally passes through the main current transformers 4A and 4B.
iop| becomes zero. Therefore, the instantaneous value comparison circuit 5
For the output of 9, the condition |iop|−|ires|−k ₀ >0 does not hold, and the output of the current differential relay device consisting of a continuous “0” state is the same as that in Fig. 5, as described above. Become. _On the other _hand , the output of the instantaneous _value comparison _{circuit 64R} is |iop| However, since the output of the instantaneous value comparison circuit 59 is "0", the current differential relay device does not perform unnecessary operations. (3) Response to transformer turning-on current As mentioned above, in the one-end power supply system shown in Figure 1, an example of the current of each phase when the breaker 3 is turned on is as shown in Table 2. Furthermore, the harmonic current component superimposed on the transformer's input current has a large amount of the second harmonic component I ₂ f, and one or more of the three phases always has a large ratio of I ₂ f/I ₁ f. Here, the fundamental wave component iop derived by the fundamental wave pass filter 55 is rectified by the full wave rectifier circuit 58 to obtain |iop| and the DC amount of the second harmonic component derived by the second harmonic pass filter 62R. |i ₂ f | The detection sensitivity of the input current detection element determined by k | i ₂ f | _DC (k: conversion rate determined by sensitivity operating conditions) obtained by guiding _DC to the sensitivity operation circuit 63R is I ₂ f/ Assuming that I ₁ f=k・|i ₂ f| _DC /|iop|=20%, for the transformer closing current shown in Table 2, the R phase closing current is detected as shown in Figure 11. The output of element 64R is I ₂ f/I ₁ f=
9%, so while the current differential relay device of the S-phase and T-phase NOT circuits 66S, 66T is "1", the current is "0", but the other two phase closing current detection elements 64S, 64T are "0". The output of I ₂ f is I ₁ f
Since the content is as high as 38%, it becomes "1" when |iop|+k′ ₀ <k|i ₂ f| _DC , respectively. Here, by setting the time t ₆₅ of the time-limited operation timer 65R (other two phases are not shown) in each phase to t ₆₅ = (half cycle) + (margin), the peak of |iop|+k′ ₀ The detection sensitivity of the input current detection element is determined by the value smaller than k|i ₂ f| _DC . In this way, if the input current detection element operates even in one of the three phases (in Figure 9, the NOT circuit 66
R, 66S, 66T output becomes “0”),
In order to change the detection sensitivity of the input current detection element of the other phase, conditions are given to each of 63R and 63S and 63T (not shown), and the above-mentioned k value of k|i ₂ f| _DC is changed. This change in k value can be realized, for example, by the circuit shown in FIG.
This Figure 12 shows an example of the circuit of the sensitivity operation circuit 63R and the instantaneous value comparison circuit 64R of the R-phase input current detection element, but the output of the other two phases (S phase, T phase) input current detection element is If both are "0", the output of 68R in FIG. 12 will be "1". Here, field effect transistors 63-1R, 63-
2R is 63-1 when the output of 68R is “1”
The source and drain of R are conductive, and conversely, 68R
When the output is “0”, the source of 63-2R
Each gate potential is determined in consideration of the conditions of the NOT circuit 63-3R so that the drains are in a conductive state. Further, in FIG. 12, the instantaneous value comparison circuit 64R is composed of an arithmetic amplification circuit 64-1R, arithmetic resistors R ₁ , R ₂ , R ₅ and a bias resistor R ₆ . In the above, resistors R ₃ and R ₄ for sensitivity operation are
By setting R ₃ > R ₄ , the detection sensitivity of the R-phase closing current detection element is (a) When the other two phase closing current detection elements are inactive: The detection sensitivity of I ₂ f/I ₁ f is | iop｜・R ₅ /R ₂ +k′ ₀ R ₅ /R ₁ <｜i ₂ f｜ _DC R ₅ /R ₃ (k=R ₅ /R ₃ ) ...(1), (b) Other 2 When even one phase of the phase closing current detection elements is activated, the detection sensitivity of I ₂ f/I ₁ f is |iop|・R ₅ /R ₂ +k′ ₀ R ₅ /R ₁ < |i ₂ f| _DC R ₅ /R ₄ (k=R ₅ /R ₄ ) ...(2) is given. As is clear from equations (1) and (2), R ₃ > R ₄
By setting , it can be seen that equation (2) operates with a smaller value of |i ₂ f |DC. As mentioned above, in the input current containing the amount of I ₂ f as shown in Table 2, one of the three phases always has a higher content of I ₂ f than I ₁ f, so even one phase When the making current detection element operates,
In Figure 11, if the detection sensitivities of the other two phase's closing current detecting elements are made high at point Unnecessary operation of the current differential element can be prevented, and unnecessary response of the input current detection element can be avoided in the case of an internal fault in which harmonic currents are superimposed, which will be described below. (4) Response when harmonic current is superimposed in an internal fault In the one-end power supply system shown in Figure 1, when the load side is connected to a cable with a large charging capacity, assume that a 1φG R phase internal fault occurs at point _F1 . Since the current flowing from the cable side has many third harmonic components, it can be assumed that the current is the third harmonic current I ₃ f. Furthermore, assuming that the second harmonic filter 62R of the second harmonic detection circuit in FIG. 9 has the frequency characteristics shown in FIG. 10, the detection sensitivity of I ₂ f/I ₁ f of the instantaneous value comparison circuit 64R When the content of I ₂ f to I ₁ f is 20%, the output of 64R is “0” when it is less than I ₂ f/I ₁ f×1/0.25=80%. In other words, I ₃ f flowing from the non-power supply side in the event of an internal accident
The ratio of I ₁ f flowing in from the power supply end is 80.
% or less, the current differential relay device can operate normally.
Also, based on the input current of the transformer in Table 2, the detection sensitivity of 64R I ₂ f / I ₁ f is sufficient at 30%, and therefore, when this value is used, the I ₃ f/I ₁ f can be allowed up to 30% x 1/0.25 = 120%. In addition, in the event of an internal accident
The allowable value of the fifth harmonic current I ₅ f for I ₁ f is the 10th harmonic current I 5 f.
According to the frequency characteristics of the filters 62R, 62S, and 62T shown in the figure, when the detection sensitivity of I ₂ f/I ₁ f is set to 20%, it becomes 20%×1/0.05=400% or less. As described above, in the device of the present invention, the allowable superimposition value of I ₅ f on I ₁ f in the event of an internal accident reaches several to several tens of times that of the conventional device, and malfunctions are eliminated. Next, some modified application examples of the present invention will be illustrated. (1) In the above explanation, the sensitivity of the input current detection element is controlled by changing the second harmonic current | _{i 2} f | The value of the amount |iop| may be changed under the condition of 68R. That is, in the present invention, when the closing current detection element operates in one of the other two phases, instead of changing _k so that k|i ₂ f| In 'R, k' of k'|iop| may be changed to become smaller under the same conditions. (2) In the above example, the fundamental wave I ₁ f is used as the operating quantity of electricity.
The case where the second harmonic electricity quantity I ₂ f is converted into DC using |i ₂ f | _DC which is full-wave rectified is shown, but as shown in Fig. 14, the DC conversion circuit 58', |iop| may also be compared with |i ₂ f| _DC using the value converted to direct current. (3) The device of the present invention can be used not only for protecting transformers but also for protecting generators. (4) The present invention can be applied not only to the protection of the two-winding transformer described above, but also to a current differential relay device 5' for a three-winding transformer as shown in FIG. (5) In the above example, an example was explained in which a closing current detection device was added to the conventional current differential relay device for detecting the closing current of a transformer. , 57 may be used as a differential relay device without a harmonic suppression circuit. (6) In the above example, 62R was used as the second harmonic passing filter, but if it is applied to a system where the content of harmonic components that occur during an internal accident is not high, the filter 62R as shown in Figure 17 can be used. It is also possible to use a characteristic type so that an output is generated when the amount of electricity of the second harmonic or higher exceeds a certain value with respect to I ₁ f. (Same for other phases) (7) In the above example, the combination of the current differential element and the making current detecting element was explained, but as shown in Fig. 18, the idea of the present invention can also be applied to a device with a making current detecting element alone. can be applied.
Note that the reference symbols in FIG. 18 are the same as in FIG. 9. (8) As shown in FIG. 19, the present invention can be similarly applied to a current-operated element with ratio suppression. This can be realized with a circuit configuration as shown in FIG. In the same figure, 1
00, 101 is a fundamental wave passing filter, 102,
103 is a full-wave rectifier circuit, 104 is an adder, 10
5 indicates a DC conversion circuit. As mentioned above, several modified application examples of the present invention have been listed, but in all cases, the detection sensitivity of the closing current detection element that prevents unnecessary operation of the current differential relay device due to the closing current of a transformer, etc. is unnecessary. It is possible to easily detect the input current detection element without increasing the sensitivity, and to reliably prevent unnecessary operation of the current differential element. Therefore, the content tolerance of harmonic current superimposed on the fault current at the time of an internal fault can be increased, and a current differential relay device with excellent functionality can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a wiring diagram showing an example of the use of a current differential relay device, Fig. 2 is a block diagram showing an example of the circuit configuration for one phase of a conventional current differential relay device, and Fig. 3 is a diagram showing an example of the circuit configuration for one phase of a conventional current differential relay device. The characteristic curve diagrams of various filters are shown in Figure 4.
F in the diagram The second point in case an internal accident occurs at _one point
Figure 5 is a time chart for each part of the circuit in Figure 1. Figure 5 is a time chart for each part of the circuit in Figure ₂ when an external accident occurs at point F in Figure 1. Figures 6 and 8 are time charts for each part of the circuit in Figure 2.
The figure is a time chart showing the response of each part of the circuit shown in Fig. 2 to the input current of the transformer, Fig. 7 is a characteristic diagram showing the output of each filter in the circuit shown in Fig. 2, and Fig. 9 is a diagram showing the response of each part of the circuit shown in Fig. 2 to the input current of the transformer. A block diagram showing one embodiment, FIG. 10 is a frequency characteristic diagram of the conversion circuit 62R, and FIG. 11 is a time chart showing the response corresponding to the input current of the transformer in the device of the present invention.
2 is a circuit diagram showing an embodiment of the sensitivity operation circuit in the device of the present invention, FIGS. 13 and 14 are circuit diagrams of modified examples of the input current detection element in the present invention, and FIG.
The figure is a single connection diagram of a three-winding transformer, No. 16, No. 18,
Fig. 20 is a circuit diagram of another modification of the device of the present invention, Fig. 17 is a characteristic curve diagram of an example of a filter used in the present invention, and Fig. 19 is a characteristic diagram when the ratio suppression method is used in the present invention. It is. 1...Transformer, 2...Power supply, 3...Shiya disconnector,
4A, 4B... Main current transformer, 5, 5'... Current differential relay, 51A, 51B... Harmonic passing filter, 52A, 52B... Resistor, 53, 104...
Adder, 54, 59, 64R... Instantaneous value comparison circuit, 55, 100, 101... Fundamental wave passing filter, 56... Low frequency passing filter, 57, 58,
102, 103...Full wave rectifier circuit, 58', 10
5...DC conversion circuit, 60...Reversible integral timer,
61, 61R... Time-limited return timer, 62R... Second harmonic pass filter, 63R, 63R'... Sensitivity operation circuit, 63-1R, 63-2R... Field effect transistor, 63-3R... NOT circuit, 64
-1R... Arithmetic amplification circuit, 65R... Limited time operation timer, |iop|... Operating electricity amount, |ires|... Suppression electricity amount, k ₀ , k' ₀ ... DC reference electricity amount, E...
Operation level of reversible integral timer, I _A , I _B ... Inflow current of current differential relay, I _RA , I _RB ... Inflow current of current differential relay (R phase), I _SA , I _SB ... Current difference Inflow current of moving relay (S phase), I _TA , I _TB ......
Current differential relay inflow current (T phase), I rush...
...Inflow current when the circuit breaker is closed, k, k'... Conversion rate.

Claims (1)

[Scope of Claims] 1. A current differential element that detects the currents at each end of the power system, obtains their vector sum, and produces an output when the vector sum exceeds a predetermined value, and a current in the power system. A switching current detection element that generates an output when the ratio of harmonic components and fundamental wave components contained in the power grid exceeds a predetermined value is provided for each phase of the power system, A current characterized in that, when at least one of the phases operates, the detection sensitivity of the input current detection element of the other phase is controlled to a high sensitivity side, and the output of the current differential element of the current phase is blocked. Differential relay device. 2. In the device according to claim 1,
The current values at both ends of the protection zone detected by the main current transformer are added vectorially by an adder through harmonic passing filters, and the obtained output is instantaneously added to the output obtained by passing this through a fundamental wave passing filter. A value comparison circuit performs a comparison operation, and the comparison result is passed through a low frequency pass filter and then rectified, and the suppressed electricity amount obtained by this rectification is combined with the operating electricity amount obtained by rectifying the output of the fundamental wave pass filter. is compared with the DC reference quantity of electricity in an instantaneous value comparison circuit and outputted as the self-phase loss and disconnection trip output through a reversible integral timer and a time-limited recovery timer, and the harmonic current component obtained by passing the output of the adder through a filter. is passed through the sensitivity operation circuit, and is compared with the operating electricity quantity and the DC reference electricity quantity in the instantaneous value comparison circuit, and the comparison result is used as an electric signal obtained through the time-limited operation timer and the NOT circuit to trip the self-phase switch or disconnector. A current differential relay device that serves as a deterrent and is added to the sensitivity control circuit of other phases. 3. In the device according to claim 2,
The sensitivity operation circuit connects the drain terminals of the pair of field effect transistors to the output terminal via the sensitivity adjustment element, connects the source terminals to each other and connects them to a harmonic passing filter, and connects the gate terminal to the output terminal of the other phase. What is claimed is: 1. A current differential relay device characterized in that the current differential relay device is configured to input electrical quantities with opposite polarities to each other. 4. In the device according to claim 1,
The current differential element is composed of a current ratio differential element that operates differentially when the vector sum of the currents at each end of the power system and the ratio of the suppression current obtained by processing the current at each end reach a predetermined value. A current differential relay device characterized by: 5. In the device according to claim 1,
Each phase is provided with a power-on current detection device that generates an output when the ratio of harmonic current components and fundamental wave current components contained in the power system current reaches a predetermined value, and at least one set of these devices is activated. A current differential relay device that controls the detection sensitivity of the input current detection device of the other phase to the high sensitivity side when