JPS61109378A - Solid-state image pick-up device - Google Patents

Abstract

PURPOSE:To divide a driving output, to drive a picture element and to execute at high speed and with high resolution by connecting plural logical gates to one output terminal of the driving circuit and applying a different selecting pulse to a gate. CONSTITUTION:During the period of the time t1-t3, an electric potential of an output terminal 114 of the driving circuit 101 goes to 'H'. During the time t1-t2, a selecting pulse 503 impressed to a terminal 117 goes to 'H', an output signal 505 of a logical gate 102 goes to 'H' and a picture element 108 is driven. During the period t2 t3, a selecting pulse 504 impressed to a terminal 118 goes to 'H', an output signal 506 of a logical gate 103 goes to 'H' and a picture element 109 is driven. In the same way, During the respective periods t3 t4 and t4 t5, picture elements 110 and 111 are respectibely driven. The above- mentioned action is repeated, a picture element 113 is driven and thereafter, the scanning of one line is completed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device, and particularly to a stationary imaging device with a built-in drive circuit.

[Conventional technology]

In recent years, development of solid-state imaging devices has been active, and many high-speed operation and high-resolution solid-state imaging devices have been announced.

In the conventional one-dimensional solid-state imaging device with a built-in drive circuit, as shown in FIG. 2, the output signal of the drive circuit (shift register) is directly sent to the pixel to drive the pixel. In the figure, 201 is a drive circuit using a shift register;
02 to 205 pixels and 206 to 209 are output terminals of the shift register 200. An equivalent circuit of one pixel is shown in FIG. Analog switch with 301 thin film transistors, photoelectric conversion element with 302 photoreceptor thin films, 3
03 is a positive power supply, 304 is a negative power supply, 305 is a signal input terminal that controls opening/closing of the analog switch 301, and 305 is the output terminal 206 to 2 of the shift register 201, respectively.
09 K connected.

FIG. 4 shows an example of the drive voltage waveform of the conventional solid-state imaging device shown in FIG. 401. 402. 403 are the output terminals 206 . 207. This is a voltage waveform applied to 208. If it is assumed that the analog switch 301 is conductive when the spiritual power applied to the pin 305 is high, the pixel 202, t2 to t during the period from time tl to t20.
Pixel 203 during period t3 and pixel 20 during period t3 to t4.
4, the optical signal is read out.

[Problem that the invention seeks to solve]

However, the above-mentioned prior art has problems as described below.

First, the speed of the pixel is 22010 times the shift lift (
・Limited by speed of operation. This is especially a problem when a thin film transistor (hereinafter referred to as TPT) whose channel portion is made of polysilicon is used in the drive circuit. In addition, in polysilicon TPT, the current in the on state is extremely small compared to MOS) Lannostar etc.
The operating speed of the shift register is also very slow when polysilicon TPT is used. For this reason, the pixel drive speed and one line scanning speed are limited to very slow speeds, making high-speed readout impossible.

Furthermore, a shift register with the same number of stages as the number of pixels is required. This also becomes a problem when polysilicon TPT is used in the drive circuit. As mentioned above, polysilicon TFTs have inferior driving ability, so large TFTs are used to drive pixels.
PT is required.

For this reason, a large cell size is required per stage of shift register. For example, the cell size corresponding to the resolution Br1ot/mm is 125 x 1000 (μm2
)is necessary. Extremely high resolution, 16 dots/
mm 2 , the corresponding shift register cell size is expected to be 60×3000 (μm 2 ') or more, which increases the chip area and doubles the number of elements, which is very disadvantageous in terms of yield and cost. This point alone makes it impossible to achieve high resolution and application to two-dimensional solid-state imaging devices.

Measures for Solving Problems] In order to solve the above-mentioned problems, Akihiro Kinoshita connected a plurality of logic gates to each output terminal of the drive circuit,
It is time to apply a selection pulse to each of the logic gates and drive the pixels with the output signals of the logic gates. [Function] According to the above configuration of the present invention, a plurality of logic beats are connected to each output terminal of the drive circuit, and a different selection pulse is applied to each of the logic games. It becomes possible to divide and extract the output signal of the circuit.

On the other hand, since the gate capacitance of the pixel section FT is smaller than the gate capacitance of the TPT in the drive circuit, the pixel section f:@J1 can operate at a frequency higher than the upper limit frequency of the drive circuit's @1 operation. Therefore, it is possible to shorten the readout time by 11 hours, that is, to increase the readout speed.

Furthermore, if we pay attention to the fact that the total number of added logic gates is the same as the number of pixels, it can be seen that the number of stages of the drive circuit (shift register) is smaller than the number of pixels. If the number of logic gates connected to the shift register output terminal H6 is fN, then the number of stages of the shift register may be (pixel fllN). For this reason, not only can the increase in the number of elements and chip size (as a result of higher resolution) that occurred in conventional examples be significantly alleviated, but even when the present invention is applied to current resolution solid-state imaging devices, the increase in the number of elements and chip size As a result, cost reduction is realized.

〔Example〕

FIG. 1 shows an embodiment of the present invention. In the figure, an @-operation circuit is made up of a 101-digit shift register, and 102 to 107 are additional logic gates, which will be considered as AND gates for convenience. 10B to 113 are pixels, 114 to 116
is an output terminal of the drive circuit 101, 117 and 118 are terminals that apply selection pulses to be applied to the logic gates, and 11
9 to 124 are output terminals of logic gates 102 to 107, respectively.

FIG. 5 is an example of a driving voltage waveform of the solid-state imaging device of the present invention shown in FIG. In the figure, voltage waveforms 501 and 502 are applied to the output terminals 114 and 115 of the drive circuit 101, respectively, and voltage waveforms of selection pulses 503 and 504 are applied to the selection pulse input terminals 117 and 118, respectively. 505. 506. 507. 508 are the output terminals 119, 120, 121 of the logic gates, respectively.
, 122. During the period from time tl to time t,1, the output terminal 114 of the drive circuit 101 becomes high. During this period, in the period from tl to t2, the selection pulse 503 applied to the pixel 117 becomes high, so the output signal SOS of the logic gate 102 becomes high and the pixel 10B 7)f1If7 moves. t2 to ts
During the period (f), the selection pulse 504 applied to the pixel 118 becomes high, so the output signal 506 of the one-wheel gate 103 becomes NO, and the pixel 1097'+8 is activated. Similarly, times L3 to 14. , 1+ to ts, respectively. 111 is driven. When the above operations are repeated and driving of the pixels 113 is completed, scanning of one line is completed. The first body imaging device is an example in which pixels are driven at a frequency twice the driving frequency of the driving circuit 101.

FIG. 6 shows an example of application of the present invention. In this figure, the same symbols as in FIG. 1 represent the same things as in FIG. 1. 601 to 609 logic gates, 611 to 619 pixels, 621
Groups of logic gates 629 to 629, output terminals 601 to 609, 630. 631. 632 is a terminal that applies a selection pulse to the logic gate.

Figure 7 is an example of the driving voltage waveform of the imaging device shown in Figure 6. In the same figure, 701 and 702 each have a drive circuit 1.
Voltage waveform output to output terminals 114 and 115 of 01, 703. 704. 705 are respective selection pulse input terminals 630. 631. normal pressure waveform of the selection pulse applied to 632, 706. 707. 708. 70
9,710°711 are the output terminals 6 of the logic gates respectively.
21. 622°625, 624. 625. 62
This is the voltage waveform of the signal output to 6. Time to t4
During this period, the signal outputted to the output terminal 114 of the drive circuit 101 becomes )・a, and during this period tl to 12.12 to 13.
．． 1. Logic games during periods from t4 to t4) 60
1, 602, 603' Signal 114 is selected from VC, and logic gate output terminal 621.622626
A signal 706. 707. 708 go high, and pixels 1!111. 612. 613 is activated. Similarly, from t4 to 1. ．． 1. ~16.16
Pixel 614 . /115.
616 is driven.

By repeating the operations described above, the pixels are driven.
. The imaging device shown in the sixth figure is an example in which pixels are driven at a frequency three times the driving frequency of the driving circuit 101. Also,
In this example, the number of stages of the drive circuit is only one-sixth of the total number of pixels, and the effect of reducing the chip area is significant.

FIG. 8 is also an application example of the present invention, and the implant in this example is that a selective pulse driver is built into a solid-state imaging device using a TFT. In this figure, the same symbols as in Figure 1 represent the same things as in Figure 1.

An 801 inverter inverts the selection pulse signal applied to the selection pulse input terminal 802 and applies it to the logic gate. By improving the TFT % property, the embodiment shown in FIG. 8 became possible, and the number of mounting terminals of the solid-state imaging device of the present invention could be reduced.

〔Effect of the invention〕

As described above, according to the present invention, by connecting a plurality of logics /y'-) to one output terminal of the drive circuit and applying different selection pulses to the logic gates, the drive circuit It becomes possible to drive pixels by completely dividing the output signal of . At this time, since the gate capacitance of the pixel portion TPT is considerably smaller than the gate capacitance of the TPT in the drive circuit, the pixel can be driven once at a frequency higher than the operating upper limit frequency of the drive circuit. 1. The number of stages of the drive circuit is the number of logic gates connected to one output terminal of the drive circuit.
Then, (pixel VN) may be sufficient.

Therefore, in the -dimensional solid-state imaging device, by using the present invention, higher speed and higher resolution have been realized. Further, by using the present invention, it is possible to reduce the number of elements and the chip area of the solid-state imaging device, thereby realizing cost reduction. When polysilicon TPT is used for the drive circuit, the operating speed is slow and a large chip area is required, so the effects brought about by the present invention are particularly large.

Furthermore, the present invention has a short pixel pitch and requires high-speed driving.
It is also applied to a two-dimensional solid-state imaging device with a built-in drive circuit, and its effects are significant.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining the present invention in detail. 101...Drive circuits 102 to 107...Logic gates 108 to 1
13... Pixel FIG. 2 is a diagram for explaining a conventional solid-state imaging device. FIG. 3 is a diagram showing an equal number of circuits for one pixel. FIG. 4 shows an example of the drive voltage waveform of the conventional solid-state imaging device (FIG. 2). FIG. 5 is an example of a driving voltage waveform of the solid-state imaging device according to the embodiment of the present invention (FIG. 1). FIG. 6 and FIG. 7 are diagrams for explaining an application example of the present invention.

Claims (1)

[Claims] In a solid-state imaging device having a photoelectric conversion element made of a photoreceptor thin film on an insulating substrate and a drive circuit made of a thin film transistor, a plurality of logic gates are connected to each output terminal of the drive circuit, and a different selection pulse is applied to each logic gate. In addition, a solid-state imaging device characterized in that a pixel is driven by an output signal of the logic gate.