JPS61107235U - - Google Patents
Info
- Publication number
- JPS61107235U JPS61107235U JP19164684U JP19164684U JPS61107235U JP S61107235 U JPS61107235 U JP S61107235U JP 19164684 U JP19164684 U JP 19164684U JP 19164684 U JP19164684 U JP 19164684U JP S61107235 U JPS61107235 U JP S61107235U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- resistance value
- resistance
- series
- bit switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Attenuators (AREA)
- Analogue/Digital Conversion (AREA)
Description
第１図はこの考案の実施例を示す回路図、第２
図はビツト・スイツチの一例を示す回路図である
。
１……基準電源、２……ビツト・スイツチ、３
……２Ｒ抵抗、４……Ｒ抵抗、５……演算増幅器
、８……入力端子。
Figure 1 is a circuit diagram showing an embodiment of this invention, Figure 2 is a circuit diagram showing an embodiment of this invention.
The figure is a circuit diagram showing an example of a bit switch. 1...Reference power supply, 2...Bit switch, 3
...2R resistance, 4...R resistance, 5...operational amplifier, 8...input terminal.
Claims (1)
抵抗と、抵抗値が前記２Ｒ抵抗の半分であつて加
算ラインに直列に接続されてあるＲ抵抗とをラダ
ー接続して構成されてあるＲ―２Ｒ抵抗ネツトワ
ークにおいて、前記２Ｒ抵抗として実際に要求さ
れる抵抗値から、これに接続されるビツト・スイ
ツチのオン抵抗を差し引いた値を抵抗値とする抵
抗を前記２Ｒ抵抗としてなるＲ―２Ｒ抵抗ネツト
ワーク。 2R connected in series with bit switch
In an R-2R resistor network configured by a ladder connection of a resistor and an R resistor whose resistance value is half of the 2R resistor and which is connected in series to the summing line, the resistance actually required as the 2R resistor is The R-2R resistor network has a resistance value obtained by subtracting the on-resistance of the bit switch connected to the R-2R resistor from the resistance value of the 2R resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19164684U JPS61107235U (en) | 1984-12-17 | 1984-12-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19164684U JPS61107235U (en) | 1984-12-17 | 1984-12-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61107235U true JPS61107235U (en) | 1986-07-08 |
Family
ID=30749083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19164684U Pending JPS61107235U (en) | 1984-12-17 | 1984-12-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61107235U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS544559A (en) * | 1977-06-13 | 1979-01-13 | Seiko Epson Corp | D-a converter |
| JPS5871724A (en) * | 1981-10-26 | 1983-04-28 | Nec Corp | Digital-analog converting circuit |
-
1984
- 1984-12-17 JP JP19164684U patent/JPS61107235U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS544559A (en) * | 1977-06-13 | 1979-01-13 | Seiko Epson Corp | D-a converter |
| JPS5871724A (en) * | 1981-10-26 | 1983-04-28 | Nec Corp | Digital-analog converting circuit |