JPS61103307A - High frequency amplifier circuit - Google Patents

High frequency amplifier circuit

Info

Publication number
JPS61103307A
JPS61103307A JP59225117A JP22511784A JPS61103307A JP S61103307 A JPS61103307 A JP S61103307A JP 59225117 A JP59225117 A JP 59225117A JP 22511784 A JP22511784 A JP 22511784A JP S61103307 A JPS61103307 A JP S61103307A
Authority
JP
Japan
Prior art keywords
gate
circuit
fet
agc
high frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59225117A
Other languages
Japanese (ja)
Other versions
JPH0566770B2 (en
Inventor
Shutaro Nanbu
修太郎 南部
Masahiro Nishiuma
西馬 正博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59225117A priority Critical patent/JPS61103307A/en
Publication of JPS61103307A publication Critical patent/JPS61103307A/en
Publication of JPH0566770B2 publication Critical patent/JPH0566770B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To keep the distortion characteristic with maximum gain excellent by providing a diode whose anode is connected to an AGC input gate between the gate and source of a dual gate FET. CONSTITUTION:The output of the FET to the 1st gate G1 of which an output of an input tuning circuit is impressed and to the 2nd gate G2 of which an AGC voltage is impressed, the amplified output is impressed to the circuit of next stage via a connected between the 2nd gate G2 and the source. Further, the FET and the diode 21 are formed as an integrated circuit. Thus, the AGC voltage input gate voltage is set to an optimum value, 0V independently of the individual difference of circuit elements and an amplifier with an excellent characteristic is obtained.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、AGC(Auto+*atic Ga1n 
Control;自動利得制御)回路付の高周波増幅回
路に係り、詳しくは、デュアルゲートFET(Fiel
d EfectTrangistar ;電界効果トラ
ンジスタ)を用いる高周波増幅器におけるAGC回路の
改良と半導体集積回路化に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention is directed to AGC (Auto++
Regarding high frequency amplification circuits with control (automatic gain control) circuits, in detail, dual gate FET (Fiel
This invention relates to the improvement of AGC circuits in high-frequency amplifiers using field-effect transistors (field-effect transistors) and their implementation into semiconductor integrated circuits.

(従来例の構成とその問題点) 近年、 GaAs(ガリウム、砒素)FETを用いる高
周波増幅回路(以下、RFアンプという)を七ノリシッ
クに半導体集積化する試みが盛んになっており。
(Conventional Structure and Problems Therein) In recent years, attempts have been made to integrate high-frequency amplifier circuits (hereinafter referred to as RF amplifiers) using GaAs (gallium arsenide) FETs into semiconductors.

テレビチューナのRFアンプもその一例である0周知の
ようにテレビ電波にはVHF及びUHFの周波数帯が使
用されており、テレビチューナのRFアンプもそれに対
応して2系列あるが、いずれにしてもRFアンプには、
その受信する電波の電界変動が大きいことから、AGC
回路が付加されており、その歪み特性は極めて優れてい
ることが要求され、その特性を満足させるFETの使用
が最近多くなってきている。特にUHF帯のRFアンプ
にはGaAsFETが種々の特性上から使用されている
RF amplifiers for TV tuners are an example of this.As is well known, TV radio waves use the VHF and UHF frequency bands, and there are two types of RF amplifiers for TV tuners, but in any case, The RF amplifier has
Because the electric field fluctuation of the received radio waves is large, AGC
Since a circuit is added, the distortion characteristics are required to be extremely excellent, and FETs that satisfy these characteristics have recently been increasingly used. In particular, GaAsFETs are used in RF amplifiers in the UHF band due to their various characteristics.

第1図は上述のようなFETをRFアンプに用いるテレ
ビチューナの、特にバイアス回路を示した従来例の説明
図である。符号QはデュアルゲートFE7.1は入力同
調回路、2は出力同調回路でその出力(out)は次段
回路、たとえば周波数混合回路に導かれる。また、3な
いし8はバイアス抵抗、9.lOはバイパス用のコンデ
ンサ、11.12は直流阻止コンデンサ、13はチョー
クコイルである。このような回路でFETにGaAs 
FETを用いる場合、 FETの第2ゲートG2とソー
ス5間電圧v、28は、利得最大時に+1゛〜+3v位
になるように設定するのが普通である。
FIG. 1 is an explanatory diagram of a conventional example of a television tuner using the above-mentioned FET as an RF amplifier, particularly showing a bias circuit. Reference numeral Q indicates a dual gate FE7.1 is an input tuning circuit, 2 is an output tuning circuit, and the output (out) thereof is guided to the next stage circuit, for example, a frequency mixing circuit. Further, 3 to 8 are bias resistors, and 9. 10 is a bypass capacitor, 11.12 is a DC blocking capacitor, and 13 is a choke coil. In such a circuit, GaAs is used in the FET.
When an FET is used, the voltage between the second gate G2 and the source 5 of the FET, v, 28, is usually set to approximately +1 to +3 V at maximum gain.

ところで、このような回路ではFETのQの、ドレイン
、ソース間の電流等に変化を生ずると、抵抗7における
電圧降下が変動する。そのため、AGCをかけない最大
利得の時の、第2ゲート、ソース間電圧V。、が変動し
、従って全体的に回路利得の変化や歪特性の不安定を招
来する。高周波増幅回路としてこのような問題は1回路
を個別の素子で形成する従来回路では、調整その他の方
法で克服することが可能であるが、開路を半導体集積回
路化する場合、とくにFET周辺をモノリシックに集’
t %+       積イヒし組立を簡略イヒしよう
とすると大きな問題となる。
Incidentally, in such a circuit, when a change occurs in the current between the drain and source of the FET Q, the voltage drop across the resistor 7 fluctuates. Therefore, the voltage V between the second gate and the source at maximum gain without AGC. , changes, resulting in overall changes in circuit gain and instability in distortion characteristics. In conventional circuits in which one circuit is formed from individual elements, it is possible to overcome such problems in high-frequency amplification circuits through adjustment or other methods, but when converting open circuits into semiconductor integrated circuits, it is necessary to use a monolithic circuit, especially around the FET. Gathered in'
If an attempt is made to simplify the assembly by increasing the t %+ product, a big problem arises.

また、上述したようにfETの第2ゲートとソース間電
圧VO2Mは通常、最大利得、つまりAGC電圧が印加
されていない時、約+1〜+3vの範囲に設定している
が、利得の維持が可能ならば、むしろOv付近に設定す
る法が、歪特性は良くなるという結果が実験的に確認さ
れた。
Additionally, as mentioned above, the voltage VO2M between the second gate and source of fET is usually set to the maximum gain, that is, in the range of approximately +1 to +3 V when no AGC voltage is applied, but it is possible to maintain the gain. In this case, it has been experimentally confirmed that the distortion characteristics are better when the value is set near Ov.

(発明の目的) 本発明は上述のような、高周波増幅回路要部のモノリシ
ック集積化を阻害する問題を解決し、かつ、新しい実験
結果に基づいて利得最大時の歪特性をも良好に保つよう
にする、要部を集積回路化した高周波増幅回路を提供す
るものである。
(Objective of the Invention) The present invention solves the above-mentioned problems that hinder monolithic integration of the main parts of high-frequency amplifier circuits, and also maintains good distortion characteristics even at maximum gain based on new experimental results. The present invention provides a high frequency amplifier circuit whose main parts are integrated circuits.

(発明の構成) 本発明は上記目的を達成するため、AGC回路付き高周
波増幅回路において、AGC電圧を印加するトランジス
タとしてデュアルゲートFETを用い、AGC電圧を印
加するゲートとして、たとえば第2ゲートを選び、この
第2ゲートとソース間にダイ      jオードを、
第2ゲート側にアノードを接続するように設け、かつ、
これらFET及びダイオード部分を半導体集積回路化し
て構成したものである。
(Structure of the Invention) In order to achieve the above object, the present invention uses a dual gate FET as a transistor for applying an AGC voltage in a high frequency amplifier circuit with an AGC circuit, and selects, for example, a second gate as a gate for applying an AGC voltage. , a diode j is connected between this second gate and the source,
provided so as to connect the anode to the second gate side, and
These FET and diode parts are constructed as a semiconductor integrated circuit.

(実施例の説明) 以下本発明を一実施例により説明する。(Explanation of Examples) The present invention will be explained below by way of an example.

第2図は本発明実施例の要部回路を示し、高周波増幅回
路のバイアス回路であり、点線囲み部分がモノリシック
に半導体集積化され、デュアルゲートFET、及び本発
明の特徴であるダイオード21が、QのFETの第2ゲ
ートG2側にアノードを接続して形成されている。その
他の抵抗、コンデンサ等は素子形状が大きくモノリシッ
ク化が困難なため。
FIG. 2 shows a main circuit of an embodiment of the present invention, which is a bias circuit of a high frequency amplifier circuit, and the portion surrounded by a dotted line is monolithically integrated with a semiconductor, and includes a dual gate FET and a diode 21, which is a feature of the present invention. The anode is connected to the second gate G2 side of the Q FET. Other resistors, capacitors, etc. have large element shapes and are difficult to make monolithic.

別付けにされている。第1ゲートG8には前回同様に入
力同調回路の出力が印加され、第2ゲートG。
It is attached separately. The output of the input tuning circuit is applied to the first gate G8 as before, and the output of the input tuning circuit is applied to the first gate G8.

に印加されるAGC電圧で制御された増幅出力は。The amplified output is controlled by the AGC voltage applied to.

コンデンサ22を経て次段回路に印加されることは従来
回路通りである。
The voltage is applied to the next stage circuit via the capacitor 22 as in the conventional circuit.

このように、 AGC入力ゲートG2とソース間に。In this way, between the AGC input gate G2 and the source.

アノードを62側に接続したダイオード21を設けた本
発明回路では、第2ゲートG8とソース間の電圧VO2
gの値は、ダイオード21のビルトイン電圧にクランプ
される。ただし、このとき抵抗23の値は十分大きい値
とすることが必要で、さもないと第2ゲートとソースS
間のリーク電流が増大して問題となる。なお、コンデン
サ24は第2ゲートG2のバイパスとして用いられてい
る。
In the circuit of the present invention provided with the diode 21 whose anode is connected to the 62 side, the voltage VO2 between the second gate G8 and the source is
The value of g is clamped to the built-in voltage of diode 21. However, at this time, it is necessary to set the value of the resistor 23 to a sufficiently large value, otherwise the second gate and source S
The leakage current between the two increases, which becomes a problem. Note that the capacitor 24 is used as a bypass for the second gate G2.

第3図は本発明をテレビチューナに実施した例を示して
いる。 UHF及びVHFのそれぞれのテレビ電波は、
それぞれの入力同調回路31.32を経て1点線囲みの
モノリシックにGaAs FETを集積回路化して形成
した、高周波増幅回路33.34に加えられる。
FIG. 3 shows an example in which the present invention is implemented in a television tuner. UHF and VHF television waves are
After passing through the respective input tuning circuits 31 and 32, the signals are added to high frequency amplifier circuits 33 and 34, which are formed by monolithically integrating GaAs FETs, surrounded by a dotted line.

なお、高周波増幅回路33.34の選択は、スイッチン
グダイオード35.35’の制御によって行なわれる。
Note that the selection of the high frequency amplifier circuits 33 and 34 is performed by controlling the switching diodes 35 and 35'.

36及び37がそれぞれ、UHF、VHF高周波増幅回
路33゜34の各FETにおけるAGC電圧印力dゲー
トを、最大利得時にほぼO電位に保つためのダイオード
で、これはゲート保護の役目をも兼ねて p +−n接
合により形成されている。なお、このダイオード36゜
37は上記UHF及びV)IF高周波増幅回路を選択す
るスイッチングダイオード35.35’と同様に、ショ
ットキーダイオードで構成しても本発明を達成できる。
36 and 37 are diodes for keeping the AGC voltage application d gate in each FET of the UHF and VHF high frequency amplification circuits 33 and 34 at approximately O potential at maximum gain, and this also serves as gate protection. It is formed by a p+-n junction. The present invention can be achieved even if the diodes 36 and 37 are configured with Schottky diodes, similar to the switching diodes 35 and 35' for selecting the UHF and V) IF high frequency amplifier circuits.

また、AGC回路の抵抗38,39は各FETの第2ゲ
ート。
Further, resistors 38 and 39 of the AGC circuit are the second gates of each FET.

ソース間のリーク電流の増大を防止するため、この実施
例では、それぞれ100にΩに選定した。
In this example, in order to prevent an increase in leakage current between the sources, 100 and 100 Ω were selected, respectively.

この実施例は最大利得状態の時、妨害信号レベルとして
90dB以上の優れた歪特性を実現できた。
This example achieved excellent distortion characteristics with an interference signal level of 90 dB or more in the maximum gain state.

(発明の効果) 以上詳細に説明して明らかなように本発明は、デュアル
ゲートFETを用いる高周波増幅回路において、そのF
ETのAGC電圧入力ゲートである第2ゲートとソース
間に、第2ゲート側がアノード側となるようにダイオー
ドを接続し、かつ、それらFET及びダイオード部分を
、モノリシックに半導体集積回路化したものであり、回
路素子の個体差には無関係に、AGC電圧入力ゲート電
圧を最適のOvに設定できるから、特性良好な増幅器と
なることは勿論、部品点数の削減1周辺回路の簡略化に
も有効であり、たとえばテレビチューナに用いて益する
ところ大である。
(Effects of the Invention) As is clear from the detailed explanation above, the present invention provides a high frequency amplifier circuit using a dual gate FET.
A diode is connected between the second gate, which is the AGC voltage input gate of the ET, and the source so that the second gate side becomes the anode side, and these FET and diode parts are monolithically integrated into a semiconductor circuit. Since the AGC voltage input gate voltage can be set to the optimal Ov regardless of individual differences in circuit elements, it is not only possible to obtain an amplifier with good characteristics, but also to reduce the number of parts and simplify the peripheral circuitry. For example, it can be used in a television tuner to great advantage.

【図面の簡単な説明】[Brief explanation of drawings]

!11       第1図は従来例を説明するテレビ
チューナの高周波増幅回路図、第2図は本発明による高
周波増幅回路のAGC回路図、第3図は本発明をテレビ
チューナに適用した回路図である。 Q・・・デュアルゲートFET、 1 ・・・入力同調
回路、 2 ・・・出力同調回路、21,36,37・
・・ダイオード、23・・・第2ゲートAGC抵抗、3
1・・・UHF入力回路、32・・・、 VHF入力回
路。 特許出願人 松下電器産業株式会社 第1図 第2図 第3図
! 11. FIG. 1 is a high frequency amplification circuit diagram of a television tuner explaining a conventional example, FIG. 2 is an AGC circuit diagram of a high frequency amplification circuit according to the present invention, and FIG. 3 is a circuit diagram in which the present invention is applied to a television tuner. Q...Dual gate FET, 1...Input tuning circuit, 2...Output tuning circuit, 21, 36, 37.
...Diode, 23...Second gate AGC resistance, 3
1...UHF input circuit, 32..., VHF input circuit. Patent applicant: Matsushita Electric Industrial Co., Ltd. Figure 1 Figure 2 Figure 3

Claims (2)

【特許請求の範囲】[Claims] (1)デュアルゲートFETを用い、その一方のゲート
にAGC電圧を印加する高周波増幅回路において、上記
AGC電圧を印加する一方のゲートとソース間に、アノ
ードがゲート側になるようにダイオードを接続したこと
を特徴とする高周波増幅回路。
(1) In a high-frequency amplifier circuit that uses a dual-gate FET and applies an AGC voltage to one gate, a diode is connected between the one gate to which the AGC voltage is applied and the source so that the anode is on the gate side. A high frequency amplification circuit characterized by:
(2)デュアルゲートFET及びダイオード部分の回路
を、半導体集積回路により形成したことを特徴とする、
特許請求の範囲第(1)項記載の高周波増幅回路。
(2) The circuit of the dual gate FET and diode portion is formed by a semiconductor integrated circuit,
A high frequency amplifier circuit according to claim (1).
JP59225117A 1984-10-27 1984-10-27 High frequency amplifier circuit Granted JPS61103307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59225117A JPS61103307A (en) 1984-10-27 1984-10-27 High frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59225117A JPS61103307A (en) 1984-10-27 1984-10-27 High frequency amplifier circuit

Publications (2)

Publication Number Publication Date
JPS61103307A true JPS61103307A (en) 1986-05-21
JPH0566770B2 JPH0566770B2 (en) 1993-09-22

Family

ID=16824232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59225117A Granted JPS61103307A (en) 1984-10-27 1984-10-27 High frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS61103307A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5363058A (en) * 1992-03-19 1994-11-08 Mitsubishi Denki Kabushiki Kaisha Amplifier having linear input-output characteristics and high efficiency
US6433639B1 (en) * 1999-12-13 2002-08-13 Hitachi, Ltd. High frequency power amplifier module and wireless communication system
JP4721287B2 (en) * 2005-01-14 2011-07-13 日本たばこ産業株式会社 Tangrid package and its blank for stick-like smoking articles

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5363058A (en) * 1992-03-19 1994-11-08 Mitsubishi Denki Kabushiki Kaisha Amplifier having linear input-output characteristics and high efficiency
US6433639B1 (en) * 1999-12-13 2002-08-13 Hitachi, Ltd. High frequency power amplifier module and wireless communication system
US6617927B2 (en) 1999-12-13 2003-09-09 Hitachi, Ltd. High frequency power amplifier module, and wireless communications system
US6897728B2 (en) 1999-12-13 2005-05-24 Renesas Technology Corp. High frequency power amplifier module and wireless communication system
JP4721287B2 (en) * 2005-01-14 2011-07-13 日本たばこ産業株式会社 Tangrid package and its blank for stick-like smoking articles

Also Published As

Publication number Publication date
JPH0566770B2 (en) 1993-09-22

Similar Documents

Publication Publication Date Title
US4048598A (en) Uhf tuning circuit utilizing a varactor diode
US5994963A (en) Amplifier circuit and multistage amplifier circuit
JPH0467371B2 (en)
US6285257B1 (en) Feedback type variable gain amplifier
US6437646B2 (en) Variable gain amplifier circuit and gain control method
US5051705A (en) Gain-tilt amplifier
JPS6056008B2 (en) radio frequency amplifier circuit
US4438529A (en) TV Tuner circuit
US4590613A (en) Bipolar AGC with RF transistor DC bias point stabilization
EP0473120B1 (en) Double super-heterodyne tuner
JPS61103307A (en) High frequency amplifier circuit
US7298426B2 (en) Television tuner having variable gain reduction
US6904271B2 (en) High-frequency-signal switching circuit suppressing high-frequency-signal distortion
JPH0669829A (en) Receiver made into ic
US4763082A (en) Selectable tuner preamplifier
US5339458A (en) Frequency converter unit for use in a high-frequency receiver
US4509207A (en) UHF RF Amplifier and AGC system
KR890002427Y1 (en) Power gain compensatory circuit for band modulation
JPS61110465A (en) High frequency amplifier circuit
JP3442619B2 (en) High frequency mixer and high frequency mixer integrated circuit
JP2002043970A (en) Television tuner
JPH02274006A (en) Gain variable amplifying circuit
JPS59146229A (en) Tuner device
JPH05235656A (en) Semiconductor device for high frequency circuit
JPS644714B2 (en)