JPS6095476A - Cryptographer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (Technical Field) The present invention provides a cryptographic system that improves transmission efficiency and achieves miniaturization and economy of equipment by realizing error correction encoding and cryptographic encoding using a single encoding. Regarding the conversion method.

(Background Art) Encryption and error correction encoding have conventionally been considered to belong to different technical fields, and have required separate devices. For this reason, extra additional digits are required at each stage of error correction and encryption, resulting in a decrease in transmission efficiency and an increase in circuit scale.

(Problems to be solved by the invention) In order to eliminate these drawbacks, the present invention is characterized by providing an encryption function that uses an operation of randomly permuting each row and column as the encryption key in the code array of an error-correcting product code. Regarding the encoding method.

(Structure and operation of the invention) FIG. 1 shows a conventional embodiment. A data signal 10 to be sent is encrypted by an encrypting device 11, and then a number of check digits having an error detection function are added by an error p correction coding device 12, and then sent to a transmission line 13. The error υ received on the transmission path 13 is transmitted to the error correction decoding device 1
At step 4, the error is detected from the harness state of the check digit, and the error is corrected.The encrypted data is then decrypted by the encryption/decryption device 15 and delivered to the receiver as the original data 10.

FIG. 2 shows one embodiment of the invention. In the present invention, as described below, since the error correction simultaneous encryption device 20 can perform the encryption function at the same time as the error correction function, it can be directly connected to the transmission path 13. , only one device is required. Similarly, regarding decoding, both error correction and encrypted decoding can be realized with one device as described below.

FIG. 3 is a diagram showing the internal configuration of the error correction simultaneous encryption device. As shown at 30, the data signal 1o to be sent is divided into blocks 4σ of α-(mx(m+1)-(m+m+1)l)l bits, and the error correction and simultaneous encryption functions are performed in the device 20 by J5. In addition, (?FL-117L
+1. ) indicates the number of test digits shown below. When the output level of the device is 1, the block is m x (m-1-1) bits long. Now, the input data starts with m columns, (
The memory circuit 31 has an array of m+1) rows at a specified position. Now, the check parity is manually entered into the memory by the circuit 32 which forms the value of the check parity bit according to the check equations (1) and (2) shown below in accordance with the input data processor. . According to the above, the encoding of the error correction is completed in step 2 of the memory 31. After that, in the cyclic permutation circuit 33, the contents of the memory are sequentially cyclically permuted column by column, so that the code array for the verification equation (+) (2) is arranged in the upper columns and rows of a two-dimensional rectangular memory array. converted.

Thereafter, code array conversion is performed in the encryption circuit 34 using the operation of exchanging two arbitrary rows an arbitrary number of times and the operation of exchanging two arbitrary columns an arbitrary number of times as encryption keys.

(3) Next, the cyclic permutation circuit 35 performs cyclic permutation that is the opposite of the cyclic permutation performed in step 33 prior to transmission, and the block length of m×(m-4-1) is It is transmitted as a code string.

The decoding process follows the reverse process of the encoding process shown in FIG. 3. As for the decryption of the code, the key 37 used for the encryption has already been transmitted or delivered to the recipient side via the terminal 38, so the code is decrypted using this key, and as a result, the key 37 is stored in the memory. A code arrangement on the receiving side corresponding to .31 is obtained. There is a possibility that there is an error in a part of the code array obtained on the receiving side, so this can be solved based on the combination of changes in the parity of the check bits incorporated on the transmitting side, which is well known in coding theory. The digit position of the erroneous p is determined, and the error is corrected.

In the following, the encryption process of the present invention using code array conversion will be described in detail.

FIG. 4 shows the arrangement of symbol digits (Xij) of an error correcting code called a cyclic product code. In the embodiment of this invention, an arrangement of m columns and (m-+-D rows) is shown. In FIG. 4, a rectangular arrangement of 5 columns and 6 rows is shown. Assume that the symbols are transmitted from left to right in each row, from second to bottom.

In addition, the error correction simultaneous encryption of the present invention 1d, m columns, (?F
It is not limited to the case of m columns and n rows (n
is an arbitrary integer coprime to m), in the cyclic product code,
Since it can be implemented in the same way, it can also be applied to other codes with a rectangular code arrangement, such as Gilbert codes and Fire codes (which can be positioned as cyclic product codes), which are generally well-known cyclic product codes. be.

FIG. 5 shows a code arrangement obtained by rearranging the code arrangement of FIG. 4 by cyclically permuting each column. They are arranged in such a way that the amount of substitution increases as one goes to the right row. In this Figure 5, each row is defined by the following parity check equation, %(1), and the check digits in each column (except the last column) satisfy the following parity check equation, %(2). After being determined, X52 is finally determined so as to satisfy the following parity check equation for all check digits.

In this way, error correction encoding as a product code is performed.

Thereafter, an encryption operation is performed by replacing arbitrary two rows and arbitrary two columns an arbitrary number of times. For example, Figure 6 shows 2 in Figure 5.
The code arrangement is shown when the 4th row and the 4th row are exchanged, and the 2nd column and the 5th column are exchanged.

In this array as well, the parity check equation (1), (
2).

It is clear that all three equations (3) are satisfied. Therefore, it is a product code equivalent to the original product code (FIG. 4). Note that this code is the generator polynomial (7(Z)−(Z″L1)(t+
It is known as a cyclic product code with 1(7)-1)/(x-1).

Here, when a change is made from FIG. 4 to FIG. 5 and a cyclic permutation is performed regarding the reverse column, FIG. 7 is obtained. Here, the code transmission is carried out from left to right through each row, from top row to bottom row.

As described above, in addition to the parity check property and the exchange of parity check strings, the check digit also functions as the insertion disk I in insertion type encryption.

It can also be seen that it also works as a conversion cipher for the digit arrangement in the transmission direction.

The number of keys for the above encryption is m columns, (m+1
) rows and the number of block digits m·(?7Z-1-1), each column and row can be regarded as the number of interchangeable combinations of two columns and two rows. If 1n is an even number, then C2×m-2C2×...×4C2×1=(m
+72), about the line? +'L-1-I C2×Oh, C2×...× C×1-('n'L+1)! /2
″+/22 Therefore, the number of keys is as follows.

m (77L+1) I/2" (4) (8) Similarly, when m is an odd number, mr (mri)
! /2”.

In the example where m=5, there are 2'''L ways, but the number of keys increases rapidly with m. m
= 9, it becomes 2.57 x 10'.

In decoding, the received block is made into a rectangular symbol array for each block as estimated from the operation during transmission,
By cyclic permutation for each column shown in Fig. 5, formula (1),
(2) A parity check is performed on each rower column set according to the method to eliminate error syndromes. Due to this error syndrome, as well known from coding theory, 1
random errors υ or single units of length b or less
It becomes possible to correct burst errors. Here, assuming that the number of columns in the rectangular array is m, the following relationship exists between m and b.

m≧2b-1 (5) After correcting the error as described above, the encryption key is used as 1. The positions of the check digits as inserted symbol digits are found, removed, and restored to the original arrangement of only information digits to perform error correction and decoding.

As explained in the above embodiments, since error correction encoding and cryptographic encoding can be encoded as one unit, the increase in surplus bits is smaller compared to the conventional case where error correction encoding and cryptographic encoding are performed separately. Since the devices can be integrated into one, great effects can be expected in terms of both transmission efficiency and economy.

Although the case of one product code has been described above, it should be noted that similar effects can be similarly achieved with other product codes, such as cyclic product codes or pseudo-cyclic product codes.

Next, a second embodiment will be described. FIG. 8 shows an example of the configuration in the second embodiment. The block length mx (mr
1) The bit insertion circuit 41 for second encryption adds the number of codes as shown in the block sign/month array 42. , b2. ..." After unnecessary and meaningless pits are added to Ic at several (generally plural) locations, it is sent out from the terminal 36'.

Assuming that its location is also kept secret along with the number of additions,
Since the receiving side cannot form the square code array corresponding to the transmitting side necessary for the decryption described in the first embodiment, it is advantageous to be able to decode the code even if only the first key is known. Therefore, b2. ...It is possible to use the number of bk's and their locations as the second key, and the performance of the encryption can be improved. Note that during decryption, the additional bits b, ,
b2. . . bk is first removed, and then decoding can be performed by the method described in the first embodiment.

In addition, bl, b2. Although bk has been described as meaningless bits, these bits can also be used as transmission bits or system control bits necessary for system merging operations.

This makes it possible to compensate for a decrease in transmission efficiency.

(Effects of the Invention) The present invention is effective in terms of transmission efficiency, miniaturization of equipment, and economicalization, so it is effective for digital transmission equipment around terminals, which pose serious problems in terms of peripheral noise and confidentiality. A wide range of applications are possible. There are similar problems in mobile communications, so it is hoped that this method can be effectively applied.

[BRIEF DESCRIPTION OF THE DRAWINGS] Fig. 1 is a diagram showing a conventional embodiment, Fig. 2 is a diagram showing an embodiment of the present invention, and Fig. 3 is a diagram showing an erroneous system according to the present invention. A diagram showing the internal configuration of the correction simultaneous encryption device, FIG. 4 is a symbol arrangement diagram of a conventional cyclic product 'trr code, and FIG. 5 is a symbol arrangement diagram regarding a parity check equation that satisfies parity check conditions for rows and columns. , Fig. 6 is a symbol arrangement diagram showing the encryption process according to the present invention obtained by exchanging rows and columns in the symbol arrangement diagram of Fig. 5, and Fig. 7 shows the symbol arrangement diagram of Fig. 6. This is a diagram in which the symbol arrangement has been rearranged so as to be suitable for row-by-row transmission, and shows a symbol arrangement diagram corresponding to FIG. 4, and FIG.
FIG. 4 is a configuration explanatory diagram when a second encryption means is added. Figure 4 Figure 5 Figure 6 Figure 7 Procedural amendment (voluntary) July 31, 1980 Commissioner of the Japan Patent Office Gakudono Shiga 1, Indication of the case 1988 Patent application No. 202630 2 Encryption of the name of the invention Device 3 Relationship with the case of the person making the amendment Patent applicant name (029) Oki Electric Industry Co., Ltd. 4 Agent 5, Column for detailed explanation of the invention in the specification to be amended and drawing 6, Contents of the amendment (1) [a-(
mX(m+1.)−(m+m+,I)IJ [a=[
mx(m+1)-(m+m)], J. (2) Change r(m+m-1-]-)J in the third line of page 4 to "
Correct as (iη+m)J. (3) "Memory array - columns and rows" in the 15th line of page 4 is corrected to "columns and rows on the memory array." (4) In the 4th line of page 6, amend ``done downwards'' to ``done downwards as per the dotted line.'' (5) In the 16th line of page 6, amend ``to the row of'' to ``to the column of 1''. Correct “Each line is” on page 6, line 17 to “Each line (divide (last line) is”). Correct formula (1) on page 6, lines 19-20 as follows. "ΣX -0...(1)" IJ (8) Correct the formula (2) in the 4th to 5th lines of page 7 as follows: "ΣX1j=0...(2)" ( 9) On page 7, line 20, ``Ru. Nao'' is replaced with ``ru.'' Therefore, the nature of the code does not change due to encryption, and error correction is performed first during decoding, and then the code is decoded. If the cipher is decrypted first, the burst error will turn into a random error and the error correction ability will be degraded, so it is necessary to decrypt the cipher after error correction. 00) Ibid. No. 9 ``Every rectangle'' in the 9th line of the page is corrected to ``every rectangle corresponding to FIG. 7''. αυ In page 10, line 12 of the same page, change “or pseudo-circular” to “
Or quasi-circular”. En Said, page 11, line 13, ``of the system combination'' is changed to ``of the entire system.''
and correct it. (13) Figure 5 of the drawings will be amended as shown in the attached sheet. Below (3)

Claims (2)

[Claims] (1) Means having a memory for storing one block of a product code known as a code having an error correction function as a rectangular two-dimensional code array, and sequentially performing cyclic permutation in the column or row direction. , then use a means of exchanging arbitrary two rows and arbitrary two columns with each other an arbitrary number of times as an encryption key,
An encryption device having both error correction and encryption functions, which further uses means to perform reverse cyclic permutation in the column or row direction to transmit the original transmission block. (2) The second key is characterized in that, prior to transmission, the second key is to insert one or more surplus or system control bits into an arbitrary position of the transmission block. An encryption device that has both error correction and encryption functions.