JPS6093841A - Reception circuit - Google Patents

Reception circuit

Info

Publication number
JPS6093841A
JPS6093841A JP58201219A JP20121983A JPS6093841A JP S6093841 A JPS6093841 A JP S6093841A JP 58201219 A JP58201219 A JP 58201219A JP 20121983 A JP20121983 A JP 20121983A JP S6093841 A JPS6093841 A JP S6093841A
Authority
JP
Japan
Prior art keywords
intermediate frequency
circuit
mixers
signals
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58201219A
Other languages
Japanese (ja)
Inventor
Yoshinori Kameyama
亀山 義典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP58201219A priority Critical patent/JPS6093841A/en
Publication of JPS6093841A publication Critical patent/JPS6093841A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/12Frequency diversity

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

PURPOSE:To use in common a reception circuit at a mixer and succeeding stages by inputting an output of plural mixers converting plural reception signals into a single intermediate frequency to a single intermediate frequency circuit. CONSTITUTION:Antennas 1, 1', RF units 2, 2' and mixers 3, 3' constitute the 1st and 2nd pre-stage reception circuits, which input selected local signals fL, fL' to the local side of the mixers 3, 3' so as to convert a desired input signal fi into an intermediate frequency. Other input signal fi' converted into the intermediate frequency is outputted to an intermediate frequency circuit 6 via an amplifier 4'. The intermediate frequency circuit 6 outputs the inputted input signals fi, fi' to the reception circuit of the post-stage via an output terminal 7.

Description

【発明の詳細な説明】 本発明は受信回路に係わ夛、特に複数の受信信号をモニ
タできる受信回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiving circuit, and more particularly to a receiving circuit capable of monitoring a plurality of received signals.

従来、無線通信機等を運用する際複数の受信信号を聴取
し、必要に応じて複数の受信(it号の1つを取出す場
合がある。通常、この池の運用(以下)多信号モニタと
いう)は複数台の受信機を用意し、適宜、AFダインコ
ントロールを操作しまたはスピーカへの出力をオン、オ
フして希望信号を選択的にモニタする。
Conventionally, when operating a wireless communication device, etc., multiple reception signals are listened to, and if necessary, one of the multiple reception signals (IT signal) may be taken out.Usually, this pond operation (hereinafter) is called a multi-signal monitor. ) prepares a plurality of receivers and selectively monitors the desired signal by operating the AF dyne control or turning on/off the output to the speaker as appropriate.

上述した多信号モニタでは複数台の受信機を準備しなけ
ればならないので受信機の配置空間の増加A操作性の低
下等の不合理が引き起こされる。
In the multi-signal monitor described above, it is necessary to prepare a plurality of receivers, which causes unreasonable problems such as an increase in the space for placing the receivers and a decrease in operability.

本発明は上述した点にかんがみなされたもので、複数の
受信信号に対し、共通の中間周波回路を設けた受信回路
を提供することを目的とする。
The present invention has been made in consideration of the above points, and an object of the present invention is to provide a receiving circuit provided with a common intermediate frequency circuit for a plurality of received signals.

以下、本発明による受信回路の実施例を図面とともに説
明する。
Embodiments of the receiving circuit according to the present invention will be described below with reference to the drawings.

図において、1.1’はアンテナ、2 、2’はRFユ
ニット、3.3’は混合器、4 、4’は増幅器、5゜
5′は可変抵抗器である。アンテナ1、RFユニット2
、混合器3は第1の前段受信回路を構成する。
In the figure, 1.1' is an antenna, 2 and 2' are an RF unit, 3.3' is a mixer, 4 and 4' are amplifiers, and 5°5' is a variable resistor. Antenna 1, RF unit 2
, mixer 3 constitutes a first front-stage receiving circuit.

第1の前段受信回路は選択されたロール信号fLを混合
器3のローカル側へ入力され所望の入力信号flt−中
間周波に変換する。中間周波に変換された入力信号f1
は増@器4を介して後段の中間周波回路6へ出力される
。同様にアンテナl’、PFユニット2′、混合器3′
で構成される第2の前段増幅回路は選択された他のロー
カル信号f′Lを混合器3′のローカル側へ入力され他
の入力信号fI’を中間周波に変換する。中間周波に変
換された他の入力信号1iは増幅器4/を経由して中間
周波回路6へ出方される。中間周波回路6は入力された
入力信号f+および他の入力信号fiを出力端子7を介
して後段の受信回路へ出力する。
The first front-stage receiving circuit converts the selected roll signal fL into a desired input signal flt-intermediate frequency which is input to the local side of the mixer 3. Input signal f1 converted to intermediate frequency
is outputted to the subsequent intermediate frequency circuit 6 via the amplifier 4. Similarly, antenna l', PF unit 2', mixer 3'
The second pre-amplifier circuit constituted by inputs the selected other local signal f'L to the local side of the mixer 3' and converts the other input signal fI' into an intermediate frequency. The other input signal 1i converted to an intermediate frequency is outputted to an intermediate frequency circuit 6 via an amplifier 4/. The intermediate frequency circuit 6 outputs the input signal f+ and other input signals fi via an output terminal 7 to a subsequent receiving circuit.

上記受信回路で例えば434.56 MHz並びに43
4.88 MHzの希望電波を傍受したいとき、ローカ
ル信号fLを調整し一方の希望電波である434.56
MHzを第1の前段受信回路で受信する。また、ローカ
ル信号f′Lを調整し他方の希望電波434.88MH
zを第2の前段受信回路で受信する。単一の中間周波回
路6を経由した4 34.56 MHz並びに434.
88MHzに係わる音声信号がスピーカから出力される
For example, 434.56 MHz and 43 MHz in the above receiving circuit.
When you want to intercept the desired radio wave of 4.88 MHz, adjust the local signal fL to intercept the desired radio wave of 434.56.
MHz is received by the first front-stage receiving circuit. In addition, the local signal f'L is adjusted and the other desired radio wave is 434.88MH.
z is received by the second front-stage receiving circuit. 4 34.56 MHz and 434 MHz via a single intermediate frequency circuit 6.
An audio signal related to 88 MHz is output from the speaker.

一方の可変抵抗器5を操作し434.56 MHzに係
わる音声信号を減衰させまたは遮断すると434.88
MHzに係わる音声信号がモニタできる。
When one variable resistor 5 is operated to attenuate or cut off the audio signal related to 434.56 MHz, the result is 434.88 MHz.
Audio signals related to MHz can be monitored.

本発明による受信回路は複数の受(N信号を単一の中間
周波に変換する複数の混合器と、複数の混合器から出力
される中間周波を入力される単一の中間周波回路とを具
備した構成としておるため混合器以降の後段の受信回路
を共用できるところに特長を有している。このため、複
数の受信信号を傍受したい場合、複数の受信機を設置す
る必要がなく1操作性の向上、設置場所に係わるスペー
スファクタの改善等が期待できる。
The receiving circuit according to the present invention includes a plurality of receivers (a plurality of mixers that convert N signals into a single intermediate frequency signal, and a single intermediate frequency circuit that receives the intermediate frequency output from the plurality of mixers). Because of its configuration, the receiver circuit after the mixer can be shared.For this reason, when you want to intercept multiple received signals, there is no need to install multiple receivers, making it easy to operate with just one receiver. It is expected to improve the space factor related to the installation location.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明になる受信回路のブロック図である。 図中符号1,1′はアンテナ、2 、2’はRFユニッ
ト、3 、3’は混合器、4.4′は増幅器、5 、5
’は可変抵抗器、6は中間周波回路である。 特許出願人 八重洲無線株式会社
The figure is a block diagram of a receiving circuit according to the present invention. In the figure, 1, 1' are antennas, 2, 2' are RF units, 3, 3' are mixers, 4.4' are amplifiers, 5, 5
' is a variable resistor, and 6 is an intermediate frequency circuit. Patent applicant Yaesu Musen Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 1、 複数の受信信号を単一の中間周波に変換する複数
の混合器と、上記複数の混合器から出力される中間周波
を入力される単一の中間周波回路と、を具備し、複数の
受信信号をモニタするよう構成したことを特徴とする受
信回路
1. A plurality of mixers that convert a plurality of received signals into a single intermediate frequency, and a single intermediate frequency circuit that receives the intermediate frequencies output from the plurality of mixers, and A receiving circuit characterized in that it is configured to monitor a received signal.
JP58201219A 1983-10-27 1983-10-27 Reception circuit Pending JPS6093841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58201219A JPS6093841A (en) 1983-10-27 1983-10-27 Reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58201219A JPS6093841A (en) 1983-10-27 1983-10-27 Reception circuit

Publications (1)

Publication Number Publication Date
JPS6093841A true JPS6093841A (en) 1985-05-25

Family

ID=16437313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58201219A Pending JPS6093841A (en) 1983-10-27 1983-10-27 Reception circuit

Country Status (1)

Country Link
JP (1) JPS6093841A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4897629A (en) * 1972-03-21 1973-12-12
JPS5382539A (en) * 1976-12-06 1978-07-21 Farmer Everett Walter Game instrument having visual range indicator
JPS5514327B1 (en) * 1970-06-29 1980-04-15
JPS57668B2 (en) * 1979-06-18 1982-01-07
JPS59222175A (en) * 1983-05-31 1984-12-13 松下電工株式会社 Hitting tool

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5514327B1 (en) * 1970-06-29 1980-04-15
JPS4897629A (en) * 1972-03-21 1973-12-12
JPS5382539A (en) * 1976-12-06 1978-07-21 Farmer Everett Walter Game instrument having visual range indicator
JPS57668B2 (en) * 1979-06-18 1982-01-07
JPS59222175A (en) * 1983-05-31 1984-12-13 松下電工株式会社 Hitting tool

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