JPS607460B2 - Indoor power line transport system - Google Patents

Indoor power line transport system

Info

Publication number
JPS607460B2
JPS607460B2 JP7063876A JP7063876A JPS607460B2 JP S607460 B2 JPS607460 B2 JP S607460B2 JP 7063876 A JP7063876 A JP 7063876A JP 7063876 A JP7063876 A JP 7063876A JP S607460 B2 JPS607460 B2 JP S607460B2
Authority
JP
Japan
Prior art keywords
signal
power
power branch
circuit
branch lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7063876A
Other languages
Japanese (ja)
Other versions
JPS52153139A (en
Inventor
勲 島田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP7063876A priority Critical patent/JPS607460B2/en
Publication of JPS52153139A publication Critical patent/JPS52153139A/en
Publication of JPS607460B2 publication Critical patent/JPS607460B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は、屋内電力線を利用した搬送制御系に於て、信
号送受を行う複数の電力分岐線1,,12・・・の分岐
位置にそれぞれ搬送波を遮断するフィルタF.・・・F
nを挿入すると共に各フィルタF.・・・Fnより負荷
側で電力分岐線1,…lnを中継増幅器Dに接続し、い
づれかの電力分岐線1.・・・ln上の送信器L2より
送信された信号を中継増幅器Dで受信し、復調再生した
後時間を遅らせて、同一信号内容を中継増幅器Dより上
記各電力分岐線1.・・・lnに信号送出するようにし
たことを特徴とする屋内電力線搬送方式に係り、その目
的とするところは負荷機器による信号減衰を少なくする
ことによりS/Nを改善し、信号送受信の信頼性を向上
した屋内電力線搬送方式を提供するにある。
DETAILED DESCRIPTION OF THE INVENTION In a carrier control system using indoor power lines, the present invention provides a filter F that blocks carrier waves at each branch position of a plurality of power branch lines 1, 12, . . . for transmitting and receiving signals. .. ...F
n and each filter F.n. . . . On the load side from Fn, power branch lines 1, . . . ln are connected to relay amplifier D, and any of the power branch lines 1. . . . The signal transmitted from the transmitter L2 on the power branch line 1. This is an indoor power line carrier system that is characterized by transmitting signals to ln, and its purpose is to improve the S/N ratio by reducing signal attenuation caused by load equipment, and to improve the reliability of signal transmission and reception. An object of the present invention is to provide an indoor power line transportation system with improved performance.

従来の電力線搬送による信号伝送系の例を第1図に示す
An example of a conventional signal transmission system using power line transport is shown in FIG.

第1図回路に於てはloは、引込単三ケーフル、Boは
電流リミッター、Fは信号漏洩防止用単三フィル夕、C
oは結合コンデンサ、Toは中間タップを電力系のアー
スラインに接続したトランスであり、これら結合コンデ
ンサCoとトランスToとで信号の乗りこえ回路を構成
している。さらにAは分電盤、B,〜Bはそれぞれ各電
力分岐線1,〜15の保護用プレー力で、電力分岐線1
,〜15は例えば電力分岐線1,,15が照明回路、電
力分岐線12,14が100Vコンセント回路、電力分
岐線13が200V専用コンセント回路である。またR
,.,R,3,R2,,R幻, R42,R53は、搬
送信号の受信0器、T滋, L,,T52は、搬送信号
の送信器であり、C2,,C22,C3,,C4,,C
42は差込コンセント部、L,,L2,L,3,L5,
,L53は照明負荷、L,,セ,,L42はコンセント
負荷である。しかして第1図に示すような従来例の回路
構成で例えば送信器タL2より受信器R42に信号を送
り、コンセント負荷L2を制御する場合を考えてみる。
このとき送信器T滋より出た信号は電力分岐線12から
プレー力&、信号のりこえ回路を構成する結合コンデン
サCo及びトランスTo、プレー力B4、電力分岐線1
40を伝って受信器R42で受信されるのであるが、こ
の信号経路上には実際の場合大容量ヒーター等の如き低
インピーダンスの負荷機器や搬送周波数帯で共振するよ
うな共振型負荷機器等が接続されており、又他の電力分
岐線1,,13,15上の負荷が分タ電盤A内で並列接
続された形となり、且つ結合コンデンサCoとトランス
Toとにより構成された乗りこえ回路部の結合コンデン
サCoによるのりこえロス(直列に結合コンデンサCo
が入るため、この結合コンデンサCoのインピーダンス
による信号減衰が生じる。)等のため、この送信信号が
受信器R42に達した時、かなりの信号減衰が起ること
がある。この時受信器R42の近傍に雑音発生機器が存
在すると受信時の信号対雑音比しベル(S/N)が極め
て悪くなり、正しい信号の再生が不能となる問題があっ
た。即ちこのような系に於ては信頼性の要求される制御
が行なえない場合があり得るものであり、そのため送出
する信号レベルを上げると、電気設備技術基準3裏案等
による屋外信号漏洩レベルに対する規制が厳しいため(
許容量は1仏w以下)、漏洩防止フィル夕の形状が極め
て大きくなり、実用上問題が生じるという欠点があった
。本発明は上述の点に鑑みて提供せるものであって、以
下本発明の一実施例を図面により詳述する。
In the circuit shown in Figure 1, lo is the lead-in AA cable, Bo is the current limiter, F is the AA filter for preventing signal leakage, and C
o is a coupling capacitor, To is a transformer whose intermediate tap is connected to the ground line of the power system, and these coupling capacitor Co and transformer To constitute a signal crossover circuit. Furthermore, A is the distribution board, B, ~B are the protective playing forces of each power branch line 1, ~15, respectively, and the power branch line 1
, to 15 are, for example, power branch lines 1, , 15 are lighting circuits, power branch lines 12 and 14 are 100V outlet circuits, and power branch line 13 is a 200V exclusive outlet circuit. Also R
、. , R, 3, R2,, R phantom, R42, R53 are carrier signal receivers, T Shigeru, L, , T52 are carrier signal transmitters, C2,, C22, C3,, C4, ,C
42 is the plug outlet part, L,, L2, L, 3, L5,
, L53 is a lighting load, and L, , L42 is an outlet load. Consider, for example, a case where a signal is sent from the transmitter L2 to the receiver R42 to control the outlet load L2 using the conventional circuit configuration shown in FIG.
At this time, the signal output from the transmitter T is transmitted from the power branch line 12 to the coupling capacitor Co and transformer To that constitute the signal crossing circuit, the play force B4, and the power branch line 1.
40 and is received by the receiver R42, but in reality, there are low impedance load devices such as large-capacity heaters, resonant load devices that resonate in the carrier frequency band, etc. on this signal path. In addition, the loads on the other power branch lines 1, 13, and 15 are connected in parallel within the distribution board A, and a crossover circuit section is configured by a coupling capacitor Co and a transformer To. Crossover loss due to coupling capacitor Co (coupling capacitor Co in series)
input, signal attenuation occurs due to the impedance of this coupling capacitor Co. ) etc., significant signal attenuation may occur when this transmitted signal reaches receiver R42. At this time, if there is a noise generating device near the receiver R42, there is a problem that the signal-to-noise ratio (S/N) during reception becomes extremely poor, making it impossible to reproduce the correct signal. In other words, in such a system, there may be cases where control that requires reliability cannot be performed, and therefore increasing the signal level to be sent out will reduce the outdoor signal leakage level according to the draft of Electrical Equipment Technical Standards 3. Due to strict regulations (
The permissible amount is less than 1 French watt), and the shape of the leakage prevention filter becomes extremely large, which poses a problem in practical use. The present invention has been provided in view of the above points, and one embodiment of the present invention will be described in detail below with reference to the drawings.

第2図は本発明の構成例を示すものであって、F,〜F
5及びD以外の各記号は夫々第1図従来例に対応してお
り、F,〜F5は夫々電力分岐線1,〜15の信号が屋
外ラインloに漏洩するのを防止するためのフィル夕で
、その構成例を第5図に示す。第5図回路において左が
分電盤側、右が電力分岐線側を示し、ブロック周波数帯
で高ィンピ−ダンスとなるLC並列共振回路と、フロッ
ク周波数帯で低インピーダンスとなるLC直列共振回路
とを組合せ、分電盤側への信号漏洩を防止している。な
お第1図従来例回路のフィルタFoも同様の構成のもの
として考えることができる。Dは信号の中継増幅器で、
本実施例では同期信号発生部を内蔵しているものであり
、この中継増幅器Dの構成例を第3図に示す。第3図に
於て1,〜lnは第2図の場合と同様に電力分岐線、C
,〜Cnは結合コンデンサ、TR,〜TRnはトランス
、E,〜Enはバッファ、TRはE,〜Enの出力信号
のいずれか1つを取り出すためのトランスで、本実施例
では第4図で示すように、同一周波数の信号は時間的3
に分割されているため、バッファE,〜Bnの出力とし
ては同時に二つ以上の同一周波信号が存在することはな
い。(別の周波の信号出力が同時に存在することはあり
得る)又第3図回路においてG,は復調回路、G2は復
調波形の信号検出回路4で、例えば再生パルスの時間位
置やパルス中を検出して正しい信号を検出する部分であ
る。さらにG3はシフトレジスタ等を用いた再生信号の
メモリ回路、G5は電力線の交流位相に同期タィミング
をとり、同期パルスを発生させる同期タイミング回路、
G4は同期タイミング回路G5からの同期パルスとメモ
リ回路G3からのメモリ信号とを電力線位相に同期ごせ
て、変調し、トランスTR,〜TRn及び結合コンデン
サC,〜Cnを介して電力分岐線1,〜lnに信号を送
出する変調送信部である。破線で囲んだ部分Dが第2図
回路の中継増幅器Dに相当する。次に上記実施例の制御
系のタイムチャートを第4図に示す。
FIG. 2 shows an example of the configuration of the present invention, and shows F, ~F
Each symbol other than 5 and D corresponds to the conventional example in FIG. An example of its configuration is shown in FIG. In the circuit shown in Figure 5, the left side shows the distribution board side, and the right side shows the power branch line side.The LC parallel resonant circuit has high impedance in the block frequency band, and the LC series resonant circuit has low impedance in the flock frequency band. This prevents signal leakage to the distribution board. Note that the filter Fo in the conventional circuit shown in FIG. 1 can also be considered to have a similar configuration. D is a signal relay amplifier,
This embodiment has a built-in synchronizing signal generator, and an example of the configuration of this repeater amplifier D is shown in FIG. In Fig. 3, 1, ~ln are power branch lines, C
, ~Cn are coupling capacitors, TR, ~TRn are transformers, E, ~En are buffers, and TR is a transformer for taking out any one of the output signals of E, ~En. As shown, signals of the same frequency are temporally 3
Therefore, two or more signals of the same frequency do not exist at the same time as the outputs of the buffers E, -Bn. (It is possible that signal outputs of different frequencies exist at the same time.) In the circuit shown in Fig. 3, G is a demodulation circuit, and G2 is a demodulation waveform signal detection circuit 4, which detects, for example, the time position of a reproduced pulse or the inside of the pulse. This is the part that detects the correct signal. Furthermore, G3 is a memory circuit for reproducing signals using a shift register, etc., G5 is a synchronization timing circuit that takes synchronization timing with the AC phase of the power line and generates synchronization pulses,
G4 synchronizes and modulates the synchronization pulse from the synchronization timing circuit G5 and the memory signal from the memory circuit G3 with the power line phase, and connects it to the power branch line 1 via transformers TR, ~TRn and coupling capacitors C, ~Cn. , ~ ln. A portion D surrounded by a broken line corresponds to the relay amplifier D of the circuit in FIG. Next, FIG. 4 shows a time chart of the control system of the above embodiment.

第4図のタイムチャートは、電源同期式時分割多重系に
おけるパルス振幅変調の例を示すものである。本実施例
では同図aのような電力線電源波形を1周期毎に区切り
、これらに同期時間帯SYN、第1チャンネル制御時間
帯CH−1、第2チャンネル制御時間帯CH−2,・・
・をサィクリックに配分することにより同期信号及び各
チャンネル制御(又は表示)信号の時間的配置を行って
いる。従って各チャンネル位置は同期信号位置からの電
源周期をカウントすることによりその時間位置を知るこ
とができる。又各チャンネルは、後述する理由でA,,
A2,…時間帯とB,,&,…時間帯に分けられている
。同図bは電力線電源波形aに同期して得られる信号送
出ゲートであり、同図cは電力線に重畳される搬送信号
波形、dは復調された再生パルス波形を示す。今例えば
第1チャンネルCH−1制御について考えてみることに
し、従来例と同機に第2図の送信器L2より受信器R4
2に制御信号を送り、負荷L42を制御する場合を考え
る。中継増幅器Dから同期信号(同期時間帯SYN内の
搬送信号)が時刻to,〜し2区間に送出されると、次
の電源電圧零位相点し2を中心に、例えばオン制御を行
う場合は時間的に手前の位置に、オフ制御を行う場合は
後の位置に夫々制御信号が配置されるものであり、図示
例で第1チャンネルはオン制御例で時刻t,.〜t,2
のA,時間帯に制御信号を送出し、第2チャンネルはオ
フ制御例で時刻t2,〜t22のA2時間帯に制御信号
を送出し、又第3チャンネルは制御信号を送出しない状
態を夫々示している。今送信器T22よりオン信号が時
亥比,.〜t,2の区間(A,時間帯)に送出されると
この搬送信号は電力分岐線12を伝って結合コンデンサ
C2、トランスTR2、バッファE2、トランスTRを
介して復調回路○,で復調され、この復調信号のパルス
位置及びパルス中を信号検出回路C2で信号検定し、正
しい信号と判定されるといったんメモリ回路○3にこの
情報信号をメモリし、次の雫位相点より手前の位置時刻
ち3〜t,4の区間(B,時間帯)内に上記A,時間帯
中の信号と同一の信号を送信器G4より信号伝送を行い
たい電力分岐線1,〜lnにトランスTR,〜TRn、
結合コンデンサC,〜Cnを介して送出し、電力分岐線
14を伝った信号が受信器R42で受信される。この場
合第2図のフィルタF,〜F5が第5図のような構成に
なっており、電力分岐線側からみたインピーダンスはL
C並列共振による高インピーダンスとなっているため、
従来例のように他の線路に接続される負荷によっては信
号減衰の悪影響を全く受けず、各電力分岐線内の負荷に
よる信号減衰のみを考えればよいので信号の減衰が極め
て少くすることができ、又、中継増幅器Dに於て信号検
定及び増幅が行われることも合わせて極めて信頼性の高
い信号伝送が行える。実際の実験に於ても信号減衰の改
善度が5MB程度(搬送周波数100KHzで)得られ
ており、高雑音、高信号減衰という悪条件の電力線に於
ても高品質の信号伝送が行えるという結果を得ている。
なお第2図回路に於てすべての電力分岐線に送受信器及
びフィルタF,〜F5が接続されているが、例えばコン
セント回路分岐線12〜14のみで信号伝送を行う場合
は、照明回路用フィルタF,及びF5と中継増幅器Dへ
の接続線は不要であり、又、フィルタF,〜F5は、第
4図のように雫位相付近に信号重畳する方式を探れば、
一般に零位相近傍では、電流値が小さいため第5図の並
列共振回路を構成するコイルが、小型に構成できるため
、極めて実現しやすい実用的な方式であると云える。な
お上記実施例では、説明を簡単にするためパルス振幅変
調の例について述べたが周波数変調や位相変調を用い、
あるいはパルスをコード化して制御信号の冗長度を上げ
、また制御信号の種類を増加させることももちろん可能
なものであり、又多周波を同一時間帯に信号伝送して搬
送周波数チャンネルを増大させて多重度をあげることも
可能である。又この考え方は、放射状にのびる一般通信
系にも同機の原理を用いて適用することができるもので
ある。本発明は上述のように、電力分岐線上の送信器よ
り送信された信号を中継増幅器で受信し、復調再生した
後時間を遅らせて同一信号内容を中継増幅器より上記各
電力分岐線に信号送出するようにした屋内電力線搬送方
式において、漏洩防止用フィル夕を各電力分岐線の分岐
位置に設けると共に、各電力分岐線のフィル夕より負荷
側を中継増幅器に接続したものであるから、各送信器か
らの送信信号あるいは中継増幅器からの再送信信号に対
する負荷として、従来のように電力幹線を通してすべて
の電力分岐線に接続されている機器が並列に入ってしま
うということがなく、信号の減衰を低減できるという利
点があり、またそのために送信側の信号レベルをあまり
大きくしなくてもよいので、漏洩防止フィル夕のコスト
も低減できるという効果を有するものである。
The time chart in FIG. 4 shows an example of pulse amplitude modulation in a power-synchronized time division multiplex system. In this embodiment, the power line power supply waveform as shown in FIG.
The synchronization signal and each channel control (or display) signal are temporally arranged by cyclically distributing the signals. Therefore, the time position of each channel can be known by counting the power cycle from the synchronization signal position. Also, each channel is A, , for the reason described later.
It is divided into A2, . . . time period and B, , &, . . . time period. Figure b shows a signal transmission gate obtained in synchronization with the power line power waveform a, figure c shows the carrier signal waveform superimposed on the power line, and d shows the demodulated reproduction pulse waveform. For example, let's consider the first channel CH-1 control.
Let us consider a case where a control signal is sent to the load L42 to control the load L42. When the synchronization signal (carrier signal within the synchronization time zone SYN) is sent from the relay amplifier D during the time period to, ~ and 2, the next power supply voltage zero phase point 2 will be the center, for example, when performing ON control. Control signals are placed at earlier positions in time, and when off control is performed, at later positions. In the illustrated example, the first channel is placed at times t, . . . in the case of on control. ~t,2
The second channel sends out a control signal in the A2 time period from time t2 to t22 in an off control example, and the third channel shows a state in which no control signal is sent out. ing. Now, the ON signal from the transmitter T22 is output at a certain time, . When sent in the interval (A, time period) ~t,2, this carrier signal is transmitted through the power branch line 12, via the coupling capacitor C2, the transformer TR2, the buffer E2, and the transformer TR, and is demodulated by the demodulation circuit ○. , the pulse position and pulse of this demodulated signal are verified by the signal detection circuit C2, and once it is determined that the signal is correct, this information signal is stored in the memory circuit ○3, and the position and time before the next drop phase point is determined. In the section 3-t, 4 (B, time period), transformer TR, TRn,
The signal transmitted via the coupling capacitors C, to Cn and transmitted through the power branch line 14 is received by the receiver R42. In this case, the filters F and ~F5 in Fig. 2 are configured as shown in Fig. 5, and the impedance seen from the power branch line side is L.
Due to high impedance due to C parallel resonance,
Unlike the conventional example, there is no negative effect of signal attenuation depending on the load connected to other lines, and only the signal attenuation due to the load in each power branch line needs to be considered, so signal attenuation can be extremely minimized. In addition, since signal verification and amplification are performed in the relay amplifier D, extremely reliable signal transmission can be achieved. In actual experiments, an improvement in signal attenuation of approximately 5 MB (at a carrier frequency of 100 KHz) was obtained, indicating that high-quality signal transmission is possible even on power lines with adverse conditions such as high noise and high signal attenuation. I am getting .
In the circuit shown in Figure 2, transmitters/receivers and filters F, ~F5 are connected to all the power branch lines, but for example, when transmitting signals only through the outlet circuit branch lines 12~14, the lighting circuit filter There is no need for connection lines between F and F5 and relay amplifier D, and if a method is found in which the filters F and F5 are superimposed near the drop phase as shown in Fig. 4,
Generally, in the vicinity of zero phase, the current value is small, so the coil constituting the parallel resonant circuit shown in FIG. 5 can be constructed in a small size, so it can be said that this is a practical method that is extremely easy to implement. In the above embodiment, an example of pulse amplitude modulation was described to simplify the explanation, but it is also possible to use frequency modulation or phase modulation.
Alternatively, it is of course possible to encode pulses to increase the redundancy of control signals and increase the variety of control signals, and it is also possible to increase the number of carrier frequency channels by transmitting multiple frequencies in the same time period. It is also possible to increase the multiplicity. This idea can also be applied to general communication systems that extend radially using the principles of the same aircraft. As described above, the present invention receives a signal transmitted from a transmitter on a power branch line by a relay amplifier, demodulates and reproduces it, and then delays the time and sends the same signal content from the relay amplifier to each of the power branch lines. In the indoor power line carrier system, a leakage prevention filter is provided at the branch position of each power branch line, and the load side of each power branch line is connected to the relay amplifier, so each transmitter This eliminates the need for devices connected to all power branch lines through the main power line to be connected in parallel as a load for the transmitted signal from the main power line or the retransmitted signal from the repeater amplifier, reducing signal attenuation. Moreover, since the signal level on the transmitting side does not have to be increased too much, the cost of the leakage prevention filter can also be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の回路ブロック図、第2図は本発明一実
施例の回路ブロック図、第3図は同上の中継増幅器の回
路ブロック図、第4図は同上のタイムチャート、第5図
は同上のフィル夕の具体回路図であり、1,〜15は電
力分岐線、Dは中継増幅器、心2は送信器である。 第1図 第2図 第3図 第4図 第5図
Fig. 1 is a circuit block diagram of a conventional example, Fig. 2 is a circuit block diagram of an embodiment of the present invention, Fig. 3 is a circuit block diagram of the repeating amplifier shown above, Fig. 4 is a time chart shown above, and Fig. 5 is a specific circuit diagram of the same filter as above, 1 to 15 are power branch lines, D is a relay amplifier, and core 2 is a transmitter. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】[Claims] 1 屋内電力線を利用した搬送制御系に於て、信号送受
を行う複数の電力分岐線の分岐位置にそれぞれ搬送波を
遮断するフイルタを挿入すると共に各フイルタより負荷
側で電力分岐線を中継増幅器に接続し、いづれかの電力
分岐線上の送信器より送信された信号を中継増幅器で受
信し、復調再生した後時間を遅らせて、同一信号内容を
中継増幅器より上記各電力分岐線に信号送出するように
したことを特徴とする屋内電力線搬送方式。
1 In a carrier control system using indoor power lines, a filter is inserted to cut off the carrier wave at each branch position of multiple power branch lines that transmit and receive signals, and the power branch lines are connected to a relay amplifier on the load side of each filter. Then, the relay amplifier receives the signal transmitted from the transmitter on one of the power branch lines, demodulates and reproduces it, delays the time, and sends the same signal content from the relay amplifier to each of the above power branch lines. An indoor power line transport system characterized by:
JP7063876A 1976-06-15 1976-06-15 Indoor power line transport system Expired JPS607460B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7063876A JPS607460B2 (en) 1976-06-15 1976-06-15 Indoor power line transport system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7063876A JPS607460B2 (en) 1976-06-15 1976-06-15 Indoor power line transport system

Publications (2)

Publication Number Publication Date
JPS52153139A JPS52153139A (en) 1977-12-20
JPS607460B2 true JPS607460B2 (en) 1985-02-25

Family

ID=13437379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7063876A Expired JPS607460B2 (en) 1976-06-15 1976-06-15 Indoor power line transport system

Country Status (1)

Country Link
JP (1) JPS607460B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57135635A (en) * 1981-02-14 1982-08-21 Matsushita Electric Works Ltd Power line carrier control system
JPH01221028A (en) * 1988-02-29 1989-09-04 Matsushita Electric Ind Co Ltd Power line carrier system transmission system
JPH0427684U (en) * 1990-06-28 1992-03-05

Also Published As

Publication number Publication date
JPS52153139A (en) 1977-12-20

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