JPS6068764U - Pay TV broadcast reception interface device - Google Patents
Pay TV broadcast reception interface deviceInfo
- Publication number
- JPS6068764U JPS6068764U JP16212583U JP16212583U JPS6068764U JP S6068764 U JPS6068764 U JP S6068764U JP 16212583 U JP16212583 U JP 16212583U JP 16212583 U JP16212583 U JP 16212583U JP S6068764 U JPS6068764 U JP S6068764U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- output
- tuner
- decoder
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Television Receiver Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のCATV受信システムを示すブロック図
である。第2図は従来のCATVペイテレビ放送受信構
成を示すブロック図である。第3図は本考案が対象とす
る先行技術のCATVペイテレビ放送受信機の構成を示
すブロック図である。第4図は本考案を実施したペイテ
レビ放送受信用インターフェース装置のブロック図であ
り、第5図はその具体的回路構成図である。
3・・・デコーダ、4・・・チューナ、5・・・VIP
回路、7・・・第1入力端子、8・・・第1ミキサ、9
・・・第1出力端子、15・・・第2入力端子、16・
・・第2ミキサ、17・・・第2出力端子、18・・・
減衰器、24・・・高周波増幅器、25・・・IF同調
増幅器。FIG. 1 is a block diagram showing a conventional CATV reception system. FIG. 2 is a block diagram showing a conventional CATV pay television broadcast reception configuration. FIG. 3 is a block diagram showing the configuration of a prior art CATV pay television broadcast receiver to which the present invention is directed. FIG. 4 is a block diagram of an interface device for receiving pay television broadcasting embodying the present invention, and FIG. 5 is a diagram of its specific circuit configuration. 3...Decoder, 4...Tuner, 5...VIP
Circuit, 7... First input terminal, 8... First mixer, 9
...first output terminal, 15...second input terminal, 16.
...Second mixer, 17...Second output terminal, 18...
Attenuator, 24... High frequency amplifier, 25... IF tuning amplifier.
Claims (1)
間に挿入され前記チューナからの出力をデスクランブル
用のデコーダに供給し、該デコーダ° からの出力
を前記VIP回路に供給するものであって、前記チュー
ナのIF倍信号入力する第1入力端子と、前記第1入力
端子からのIF倍信号特定のチャンネルに変換するアッ
プコンバート用の第1ミキサと、前記第1ミキサの出力
を前記デコ−ダに与えるための第1出力端子と、前記デ
コーダからの高周波信号を入力する第2入力端子と、前
記第2入力端子からの高周波信号をIF倍信号ダウンコ
ンバートするための第2ミキサと、前記第2ミキサの出
力を前記VIP回路に供給するための第2出力端子とを
有するペイテレビ放送受信用インターフェース装置にお
いて、前記第1入力端子から前記第1出力端子までのゲ
インを前記チューナのゲインに相当する分だけ下げる手
段と、前記第2入力端子から前記第2出力端子までのゲ
インを前記下げた分を補償するべく上げる手段とを設け
たことを特徴とするペイテレビ放送受信用インターフェ
ース装置。It is inserted between a tuner and a VIP circuit in a television broadcast receiver, supplies the output from the tuner to a decoder for descrambling, and supplies the output from the decoder to the VIP circuit, A first input terminal for inputting the IF multiplied signal of the tuner, a first mixer for up-conversion for converting the IF multiplied signal from the first input terminal into a specific channel, and an output of the first mixer for the decoder. a first output terminal for inputting the high frequency signal from the decoder, a second input terminal for inputting the high frequency signal from the second input terminal, a second mixer for down converting the high frequency signal from the second input terminal into an IF multiplied signal; and a second output terminal for supplying the output of the two mixers to the VIP circuit, wherein the gain from the first input terminal to the first output terminal corresponds to the gain of the tuner. and means for increasing the gain from the second input terminal to the second output terminal to compensate for the decrease.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16212583U JPS6068764U (en) | 1983-10-19 | 1983-10-19 | Pay TV broadcast reception interface device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16212583U JPS6068764U (en) | 1983-10-19 | 1983-10-19 | Pay TV broadcast reception interface device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6068764U true JPS6068764U (en) | 1985-05-15 |
JPH0127335Y2 JPH0127335Y2 (en) | 1989-08-15 |
Family
ID=30356107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16212583U Granted JPS6068764U (en) | 1983-10-19 | 1983-10-19 | Pay TV broadcast reception interface device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6068764U (en) |
-
1983
- 1983-10-19 JP JP16212583U patent/JPS6068764U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0127335Y2 (en) | 1989-08-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2563401B2 (en) | Receiver | |
JPS6068764U (en) | Pay TV broadcast reception interface device | |
JPS6068782A (en) | Volume regulator for catv and method therefor | |
JPS59144972U (en) | television receiver | |
JPS63152231A (en) | Rf converter circuit | |
JPS6068765U (en) | Pay TV broadcast reception interface device | |
JPS6085485U (en) | Pay TV broadcast reception interface device | |
JPS6068763U (en) | Pay TV broadcast reception interface device | |
JPS6068762U (en) | Pay TV broadcast reception interface device | |
JPS6068766U (en) | Pay TV broadcast reception interface device | |
JPS61131183U (en) | ||
JP2564750Y2 (en) | Tuner for satellite broadcast reception | |
JP3281257B2 (en) | Protector with mixer | |
JPH01106632A (en) | Tuner circuit for satellite broadcast television receiver | |
JPS6012386Y2 (en) | audio circuit device | |
JPS6347118Y2 (en) | ||
JPH0110025Y2 (en) | ||
JPS59106266U (en) | television receiver | |
JPH05227533A (en) | High frequency receiver | |
JPS61384U (en) | Satellite broadcasting reception system using TV public listening system | |
KR20000007874A (en) | Tuner having both upstream filtering function and signal division function | |
JPS59189351U (en) | TV receiver | |
JPS61385U (en) | satellite broadcast receiver | |
JPS5996950U (en) | Television receiver tuner circuit | |
JPS58139773U (en) | Signal switching device in television receivers |