JPS6066181A - Electronic time signal timepiece - Google Patents

Electronic time signal timepiece

Info

Publication number
JPS6066181A
JPS6066181A JP58175026A JP17502683A JPS6066181A JP S6066181 A JPS6066181 A JP S6066181A JP 58175026 A JP58175026 A JP 58175026A JP 17502683 A JP17502683 A JP 17502683A JP S6066181 A JPS6066181 A JP S6066181A
Authority
JP
Japan
Prior art keywords
time
circuit
switch
prohibition
time zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58175026A
Other languages
Japanese (ja)
Other versions
JPS6228436B2 (en
Inventor
Tetsuo Suzuki
哲郎 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seikosha KK
Original Assignee
Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seikosha KK filed Critical Seikosha KK
Priority to JP58175026A priority Critical patent/JPS6066181A/en
Publication of JPS6066181A publication Critical patent/JPS6066181A/en
Publication of JPS6228436B2 publication Critical patent/JPS6228436B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G13/00Producing acoustic time signals

Abstract

PURPOSE:To set optionally a time signal inhibiting time zone by a simple operation by providing a means for setting a start time and an end time of a night ring-stop time zone. CONSTITUTION:When a switch 13 is opened, an output of a setting circuit 3 to which a start time and an end time of a night ring-stop time zone are set in advance is provided to an inhibiting circuit 7 through a selecting circuit 6. As a result, as for a time signal circuit 2, an open time signal of a set time zone is inhibited. Also, when it is desired to execute a ring-stop in an optional time zone, the switch 13 is closed, and thereafter, a start time and an end time of a ring-stop time zone are set to counters 4, 5, respectively, by operating a switch 14. Outputs of the counters 4, 5 which is set in this way are supplied to the inhibiting circuit 7 through the selecting circuit 6. In this way, a time signal inhibiting time zone can be set optionally by a simple operation.

Description

【発明の詳細な説明】 本発明は電子報時時計に関するものである。[Detailed description of the invention] The present invention relates to an electronic timepiece.

従来の電子報時時計では夜間の一定の時間帯だけ自動的
に報時を停止する夜間鳴止め付のものがあるが、時間帯
の異なる人には不便であシ、鳴止め時間帯を任意に設定
できるものが切望されていた。
Some conventional electronic time clocks have a night alarm that automatically stops the alarm during a certain period of time at night, but this is inconvenient for people who live in different time zones. There was a strong need for something that could be set to

そこで本発明は簡単な構成および操作で報時禁止時間帯
を任意に設定できる電子報時時計を提供するものである
SUMMARY OF THE INVENTION Therefore, the present invention provides an electronic time signal clock that can arbitrarily set a time period in which the time signal is prohibited with a simple configuration and operation.

以下本発明の一実施例を図面に基づいて説明する。1は
24進の正時カウンタで、毎正時に閉成するスイッチ(
図示せず。)からの信号を計数するものである02は報
時回路、3は夜間鳴止め時間帯の開始および終了時刻を
予め設定した設定回路であるろ4.5はカウンタで、そ
れぞれ夜間鳴止め時間帯の開始時刻および終了時刻を外
部から設定されるものである。6は選択回路で、カウン
タ嶋 5の出力および設定回路6の出力のいずれかを選
択する。7は選択回路6で選択された時間帯の間服時を
禁止させる禁止回路、8は制御回路で、カウンタ4.5
のいずれか一方または両方に時刻が設定されていないと
きに出力を発生して禁止回路7からの禁止出力を禁止す
る。9はノリツブフロップ回路、10.11はゲート回
路、12は微分回路、13のスイッチで、上記2種類の
時間帯のいずれかを選択するものである。14は鳴止め
開始および終了時刻の設定スイッチ、15はタイマ回路
で、スイッチ14が押されてから2秒以内に再び押され
なかったときに1パルスを発生するものである。16は
報音回路で、スイッチ14の操作ごとに確認音を発生す
るとともにタイマ回路15のパルスによって他の音を発
する。
An embodiment of the present invention will be described below based on the drawings. 1 is a 24-decimal hour counter with a switch that closes every hour on the hour (
Not shown. ) 02 is a time signal circuit, 3 is a setting circuit that presets the start and end time of the nighttime no-time zone, and 4.5 is a counter, each of which counts the nighttime no-time zone. The start and end times are set externally. A selection circuit 6 selects either the output of the counter 5 or the output of the setting circuit 6. 7 is a prohibition circuit that prohibits taking medicine during the time period selected by the selection circuit 6; 8 is a control circuit;
When the time is not set in one or both of the above, an output is generated to inhibit the inhibit output from the inhibit circuit 7. Reference numeral 9 is a Noritsubu flop circuit, 10.11 is a gate circuit, 12 is a differential circuit, and 13 is a switch for selecting one of the above two types of time periods. Reference numeral 14 denotes a switch for setting start and end times of ringing, and 15 a timer circuit, which generates one pulse when the switch 14 is not pressed again within two seconds after being pressed. Reference numeral 16 denotes a sound alarm circuit which generates a confirmation sound every time the switch 14 is operated and also emits other sounds in response to a pulse from the timer circuit 15.

つぎに動作について説明する。毎正時に正時カウンタ1
の入力端子Pに、分針カムによって閉じられる接点から
の接点信号が供給され、正時数を計数する。この正時カ
ウンタ1の内容に基づいて報時回路2によって報時が行
なわれる。
Next, the operation will be explained. Hourly counter 1 every hour on the hour
A contact signal from a contact that is closed by the minute hand cam is supplied to the input terminal P of the minute hand cam to count the number of hours on the hour. Based on the contents of the hour counter 1, the time signal circuit 2 reports the time.

一方、夜間鳴止めは以下のようにして行なわれる。スイ
ッチ13が図示の状態にあるときは選択回路6によって
設定回路3の出力が選択され、禁止回路7に供給される
。設定回路6には、例えば報時禁止開始時刻として午後
11時が、終了時刻として午前5時が設定されていると
する。禁止回路7では、上記設定時刻と正時カウンタ1
の出力とを受けて上記時間帯の間、報時禁止出力を生じ
、報時が禁止される。
On the other hand, stopping the noise at night is carried out as follows. When the switch 13 is in the illustrated state, the selection circuit 6 selects the output of the setting circuit 3 and supplies it to the inhibition circuit 7. For example, it is assumed that the setting circuit 6 is set to 11:00 pm as the time signal prohibition start time and 5:00 am as the end time. In the prohibition circuit 7, the above set time and the hour counter 1
In response to this output, a time reporting prohibition output is generated during the above time period, and time reporting is prohibited.

任意の時間帯に鳴止めを行ないたい場合には、まずスイ
ッチ13を切シ換える。これによってゲート回路10,
1..1の一人力が”1”に保持されるとともに微分回
路12からパルスが生じノリツブフロップ回路9がセッ
トされるとともにカウンタ4.5がリセットされる。こ
うしてゲート回路10が開かれる。そこでスイッチ14
を押すことによってカウンタ4に報時禁止開始時刻を設
定する。例えば午後10時(22時)であれば、スイッ
チ14を22回押してカウンタ4に22時を設定する。
If you want to stop the ringing at any time, first turn on the switch 13. As a result, the gate circuit 10,
1. .. 1 is held at "1", a pulse is generated from the differentiating circuit 12, the Noritsu flop circuit 9 is set, and the counter 4.5 is reset. The gate circuit 10 is thus opened. So switch 14
By pressing , the time reporting prohibition start time is set on the counter 4. For example, if it is 10:00 pm (22:00), the switch 14 is pressed 22 times to set the counter 4 to 22:00.

スイッチ14の操作ごとに報音回路16から操作確認音
が発生する。上記設定が終了して2秒経過するとタイマ
回路15から1パルスが発生し、フリップフロップ回路
9かリセットされるとともに報音回路16から上記とは
異なった音が発生する。フリップノロツブ回路9のリセ
ットによりゲート回路11が開く。そこでスイッチ14
によってカウンタ5に報時禁止終了時刻を、例えば午前
6時であれば、スイッチ14を6回押して設定する。
Each time the switch 14 is operated, an operation confirmation sound is generated from the sound alarm circuit 16. When two seconds have elapsed after the above setting is completed, one pulse is generated from the timer circuit 15, the flip-flop circuit 9 is reset, and the sound alarm circuit 16 generates a different sound from the above. The gate circuit 11 is opened by resetting the flip knob circuit 9. So switch 14
For example, if it is 6 a.m., the user presses the switch 14 six times to set the end time of the time prohibition on the counter 5 by pressing the switch 14 six times.

ζうして設定されたカウンタ4.5の出力は選択回路6
で選択され、この時間帯に報時が禁止される。
ζThe output of the counter 4.5 thus set is sent to the selection circuit 6.
is selected, and time reporting is prohibited during this time period.

なお制御回路8はカウンタ4.5のいずれか一方にしか
時刻が設定されていないような場合に、これを無効とみ
なすためのもので、カウンタ4.5のいずれか一方おる
いは両方に時刻が設定されていない場合にQよ出力全発
生して禁止回路7からの禁止出力を停止するものである
The control circuit 8 is designed to treat the situation as invalid when the time is set to only one of the counters 4.5. If Q is not set, all outputs are generated and the inhibit output from the inhibit circuit 7 is stopped.

カウンタ4.5への時刻設定を間違ったときにはス1ソ
チ13を一旦図示の状態に切ら換えた後再び元の状態に
戻して設定し直せばよい。
If you make a mistake in setting the time on the counter 4.5, all you have to do is to temporarily switch the switch 13 to the state shown, then return it to its original state and set it again.

なおタイマ回路15の設定時間は2秒に限るものではな
い。
Note that the set time of the timer circuit 15 is not limited to 2 seconds.

以上のように本発明によれは、極めて簡単な操作で任意
の時間帯を設定でき、この時間帯に報時を禁止すること
ができる。
As described above, according to the present invention, an arbitrary time period can be set with an extremely simple operation, and time reporting can be prohibited during this time period.

【図面の簡単な説明】[Brief explanation of drawings]

□図面は本発明の一実施例を示した論理回路図である。 ′2・・・報時回路 4.5・・・カウンタ 7・・・
禁止回路 9・・・フリラフ”フロップ回路10.11
・・・ケート回路 14・・・スイッチ以上 特許出願人 株式会社 精 工 舎 代理人弁理士 最 上 務
□The drawing is a logic circuit diagram showing an embodiment of the present invention. '2...Time signal circuit 4.5...Counter 7...
Prohibited circuit 9...Furi Ruff" flop circuit 10.11
...gate circuit 14...switch and above Patent applicant Seikosha Co., Ltd. Patent attorney Mogami Tsutomu

Claims (1)

【特許請求の範囲】[Claims] 正時に報時全行なう報時回路と、報時の禁止開始時刻を
計数する第1の計数回路と、報時の禁止終了時刻を計数
する第2の計数回路と、第1の計数回路および第2の計
数回路の計数内容を設定するためのスイッチと、このス
イッチが操作されてから一定時間内につぎの操作が行な
われなかったときに出力を生じるタイマ回路と、このタ
イマ回路の出力によって第1の計数回路および第2の計
数回路のいずれか一方に択一的に上記スイッチの出力パ
ルスを供給する選択制御回路と、上記禁止開始時刻から
上記禁止終了時刻までの間服時を禁止せしめる禁止回路
とからなる電子層時計。
A time signal circuit that carries out full time reporting on the hour, a first counting circuit that counts the start time of prohibition of the notification, a second counting circuit that counts the end time of the prohibition of the notification, the first counting circuit and the second counting circuit. A switch for setting the counting contents of the counting circuit No. 2, a timer circuit that generates an output when the next operation is not performed within a certain period of time after this switch is operated, and a a selection control circuit that selectively supplies the output pulse of the switch to either the first counting circuit or the second counting circuit; and a prohibition that prohibits dispensing from the prohibition start time to the prohibition end time. An electronic layer clock consisting of a circuit.
JP58175026A 1983-09-21 1983-09-21 Electronic time signal timepiece Granted JPS6066181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58175026A JPS6066181A (en) 1983-09-21 1983-09-21 Electronic time signal timepiece

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58175026A JPS6066181A (en) 1983-09-21 1983-09-21 Electronic time signal timepiece

Publications (2)

Publication Number Publication Date
JPS6066181A true JPS6066181A (en) 1985-04-16
JPS6228436B2 JPS6228436B2 (en) 1987-06-19

Family

ID=15988914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58175026A Granted JPS6066181A (en) 1983-09-21 1983-09-21 Electronic time signal timepiece

Country Status (1)

Country Link
JP (1) JPS6066181A (en)

Also Published As

Publication number Publication date
JPS6228436B2 (en) 1987-06-19

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