JPS6059627B2 - Printing control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a print control device for an electronic computer that prints data input through key operations using a printer.

A so-called simple electronic computer called a personal computer equipped with a conventional printing device has two printing modes: the first mode is an ON mode in which keyed-in data is printed one character or one command at a time; The second mode is OFF, which displays but does not print.
It has become a mode.

Therefore, in the past, when the printing mode was set to ON, even if incorrect data was input, it would be printed, and there was a risk of misunderstanding the final printed result. In particular, the above-mentioned personal computers are often operated by operators, including many inexperienced operators, due to their simplicity, and input errors in programming are likely to occur. Therefore, if the program inputted by such an operator was printed every time a key was input, many corrections would be made, and the printed matter would not be suitable for handling as a source program or source data. The present invention has been made to solve these conventional problems.In addition to being able to print data each time it is input by key operation as in the past, it also allows incorrectly input data to be printed out and edited correctly. An object of the present invention is to provide a printing control device for an electronic computer that can also print only the data that has been written.

To achieve this objective, the present invention provides at least two
Equipped with a printing mode switching means for specifying two printing modes,
The printing mode switching means controls to print the data each time data is input by key operation, or to temporarily hold the input data by key operation and print it by operating a specific key.

Embodiments of the present invention will be described below with reference to the accompanying drawings.

1 and 2 are a perspective view and a block diagram showing an embodiment of a personal computer according to the present invention.

The personal computer 1 is basically a 16-bit microcomputer, and includes a main storage device 2, a central processing unit 3, a keyboard section 4, a CRT display section 5, and a printer 6. Main storage device 2 is system area 8
and a user area 10.

The system area 8 includes a system program storage area 12, a user's program start address storage area 14,
It consists of a system working register group 16 and a system working area 18. The system program storage area 12 stores fixed programs for controlling hardware, such as command reference tables, interrupt processing programs, error processing programs, and various calculation programs. The user program start address storage area 14 stores the start address of a program written by the user. The system working register group 16 consists of registers R1 to Rl2 for temporarily storing variables used by the system. The system working area 18 is for storing various information other than the above. The user area 10 of the main storage device 2 consists of a line number table 22, a source program area 24, a variable table 26, and a user's working area 28.

The line number table 22 stores a pair of a line number of program information consisting of a line number and a statement written by the user and an address where this statement is stored. The source program area 24 is for storing statements written by the user. The control unit 30 in the central processing unit 3 includes an instruction register, a read-only memory (ROM), an instruction decoder, and the like.

The ROM stores a microprogram that controls the internal and external logic circuits of the central processing unit 3, and the instruction register stores instructions read out via the main memory 2 or the data bus 32. The microprogram stored in the ROM is selectively output. The instruction decoder decodes the output of the ROM and outputs a control signal to a control bus 34 connected to a multiplexer 44, etc., and outputs a control signal to a control bus 35 connected to the main storage device 2. , outputs an enable signal to the enable line 36 connected to the main memory device 2, or inputs/outputs (
By outputting a memory disable signal (hereinafter simply abbreviated as disable signal) signal MV to the enable line 38 (hereinafter abbreviated as 1/0), devices inside and outside the central processing unit 3 are controlled. Signals ME and M" are output as an alternative. The interrupt register 40 receives an interrupt request signal (serial signal) from an external input/output device such as the keyboard section 4, and stores the interrupt level in parallel. It also receives an interrupt request signal from the initial set circuit 42 when the power is turned on.

The multiplexer 44 receives a signal indicating an interrupt level from the interrupt register 40, a control signal from the control unit 30, a signal provided from the main storage device 2 via the data bus 32, and a signal from the data buffer 50 and input/output buffer 54, which will be described later. The applied data signal is selected and sent to a predetermined register of the register group 48 or the arithmetic logic unit 46 (
(hereinafter abbreviated as ALU). ALU4
6 is based on the control signal given from the control unit 30, and adds, subtracts, multiplies, divides, and shifts data by repeating this process.
and rotation.

The register group 48 includes two primary storage registers TA,
TBl program counter PCl working pointer W
Pl and status register ST are provided.
The program counter PC specifies the address of the system program stored in the main storage device 2. The working pointer WP describes the start address of the working registers R1 to Rl2 used by the system program. Status register S
T is a register that holds various states such as program execution and calculation, and includes a program key state bit, each level interrupt mask bit, an overflow display bit, a carry display bit, and the like. The data buffer 50 is connected to the main storage device 2 via a data bus 32, and is connected to the multiplexer 4 via a bus 60 or the like.
4 and ALU 46, it is a buffer register that has bidirectionality for the inside of the central processing unit 3 (multiplexer 44, ALU 46, etc.), and provides only output to the main memory 2; From device 3 to main storage device 2
The data destined for is first stored in this data buffer 50 and then output.

The address buffer 52 is connected to the main storage device 2 and input/output devices (keyboard section, CRT display section 5, printer section 6) via an address bus 56, and is also connected to the ALU 46 via a bus 60, etc. It temporarily stores an address signal given from the address bus 56 and gives this address signal to the main storage device 2 or input/output devices (keyboard section 4, CRT display section 5, printer section 6). An input/output buffer (hereinafter abbreviated as 1/0 buffer) 54 connects input/output devices (keyboard section, CRT display section 5, and printer 6) via a data bus 58.
The Al. U46
It is connected to the input/output device and temporarily stores data and control information sent and received between the input/output device and the AL, U46.
The keyboard unit 4 includes a keyboard body 62, an encoder 64, and an input/output boat (hereinafter abbreviated as 1/O boat).
It consists of 66.

The keyboard body 62 has a designation key PM for designating three print modes. When the PONl mode is designated by the print mode designation key PM, the personal computer 1 prints this data every time data is input by key operation (hereinafter referred to as 0N1 mode).
, when the PON2 mode is designated by the print mode designation key PM, the data input by key operations is temporarily held and the data is edited on the CRT display unit 5 (in this embodiment, when the execution key 69 is pressed). Print (hereinafter 0N)
2 mode), and when the POFF mode is designated by the print mode designation key PM, data input by key operations is not printed (hereinafter referred to as OFF mode).
In addition to this, the keyboard body 62 includes a program designation key,
Alphabet and numeric keys 69b, space key 69C, etc. are provided, as well as print mode display lamps 70a, 70b, and 70c that light up in 0N1 mode, 0N2 mode, and 0FF mode, respectively. The encoder 64 encodes information generated when the keys on the keyboard body 62 are operated and provides the encoded information to the I/0 board 66, and also provides the interrupt register 40 with an interrupt request signal generated when the keys are operated. be. The I/0 boat 66 consists of an output latch circuit 72, an input latch circuit 74, and a decoder 76. The output latch circuit 72 temporarily holds the output data of the encoder 64 and provides it to the data bus 58. The input latch circuit 74 connects the central processing unit 3 to the data bus 5.
The data and control information given through 8 are temporarily held and given to the keyboard F main body 62.
0c is turned on and applied to the output latch circuit 72. The most significant bit of the input latch circuit 74 and the output latch circuit 72 becomes ゜゜1゛ in 0N1 mode, the second bit becomes ゜゜1゛ in 0N2 mode, and the third bit becomes ゜゜1゛ in 0N2 mode. Sometimes it becomes “1゛”. Decoder 76 is connected to disable line 38 and address bus 56, receives disable signal M, and receives disable signal M from central processing unit 3.
There is a device that enables the keyboard section 2 to operate when an address is received from the keyboard. The CRT display unit 5 has, for example, 80
It can display 11 characters up to 2 digits, and I
It consists of an /O boat 78, a CRT storage device 80, an address control section 82, a drive control section 84, and a CRT main body 86.

The I/0 boat 78 connects the central processing unit 3 to the data bus 5.
an input data latch circuit and a control information latch circuit that temporarily hold the input data and control information provided through the CRT display unit 8; and an output data latch circuit that temporarily holds the data output from the CRT display unit 5 side; a decoder for decoding the output of the control information latch circuit;
The CRT storage device 80 is connected to the enable line 38 and the address bus 56 and includes a decoder that receives a disable signal M and enables the CRT display unit 5 when an address is specified from the central processing unit 3.
is a storage device in which data to be displayed on the CRT body 86 is stored.

The address control section 82 specifies the address of the CRT storage device 80 based on data given from the central processing unit 3 and controls the position of the cursor. The drive control unit 84 includes a character generator that outputs characters corresponding to data provided from the CRT storage device 80 in accordance with dots and rasters, a dot counter, a character counter, a raster counter, and a line counter, and also outputs a horizontal synchronizing signal and a vertical synchronizing signal. CRT that outputs synchronization signals
A counter, a P/S converter that performs parallel-to-serial conversion and outputs a video signal, and a P/S converter that amplifies the video signal and outputs a video signal.
It consists of a CRT driver and the like for displaying data on the RT main body 86. The printer section 6 includes an I/O boat 88 and
It consists of a character generator 89, a printer control section 90, and a printer main body 91.

The I/0 boat 88 connects the central processing unit 3 to the data bus 5.
8, an output latch circuit 94, and a decoder 95. The outputs of the execution key operation display bits B4 are applied to AND circuits 96, respectively. The output of this AND circuit 96 is passed through an OR circuit 97 together with the output of the 0N1 display bit b1 to an AND circuit 98.
is applied as an opening/closing control signal. The input data of the input latch circuit 92 is applied to the AND circuit 98, and the input data is sent to the character generator 89 when the OR circuit 97 outputs the input data.
The character generator 89 outputs a character signal based on this input data, and this output is sent to the printer body 9.
1 is applied to the printer control unit 90 that controls the printer. The printer control unit 90 sends a control signal to the printer body 91 to cause the printer body 91 to print, and also causes the printer body 91 to print.
The status (whether or not it is in operation) is sent to the output latch circuit 94 via the control line 99. In addition, 102 in FIG. 1 is a cassette M having a function as an auxiliary storage device.
An eject button 104a1 and a rewind button 104b for controlling this cassette MTlO2 are provided on the panel. Further, 106 in FIG. 2 is a clock signal generator, which synchronizes the entire computer 1. Next, the operation of the present invention configured as described above will be explained. When the print mode designation key PM on the keyboard body 62 is pressed, an interrupt request signal is applied from the encoder 64 to the interrupt register 40.

At this time, if the stator register ST is not masked with interrupts, the count value of the program counter PC becomes the address value of the location where the interrupt processing program stored in the main storage device 2 is stored, and the AL. An address is specified from the U46 to the main memory device 2 via the address buffer 52, and instructions to determine which key has been operated are sequentially read out from the main memory device 2, and these read instructions are used for control. The instructions are decoded in the instruction decoder of section 30. On the other hand, the operation signal of the print mode designation key PM output from the keyboard body 62 is encoded by the encoder 64 and stored in the temporary storage register TA via the output latch circuit 72, data bus 58, and I/0 buffer 54. By comparing each code in the command reference table stored in the system program area 12 of the main storage device 2, the central processing unit 3 determines the PM
Detects key operation.

Note that this detection operation is sequentially executed by the system program read out based on the address designation of the program counter PC. When it is detected that the PM key has been operated, the reading process from the I/0 port 66 of the keyboard section 4 is performed again, and this time the information stored in the input latch circuit 74 is output. Latch circuit 72 for
It is read into the temporary storage register TA via the data bus 58, I/0 buffer 54, etc. Now, the print mode is 0, for example.
If it is in FF mode, the code read into the temporary storage register TA will be 100100...0J,
“゜1゛” stands in the third bit from the left.

As mentioned above, this code is RlOOOO...
・When ゛゜1゛ is set in the first bit from the left like 0jo, it is 0N1 mode, and when ゛゜1゛ is set in the second bit from the left like ROlOO...0jo, it is 0N2 mode.
Also, when "゜1゛" stands in the third bit from the left like ROOlO...0J, it is 0FF mode, and 4
Each mode is designated by the bit position where 6r3 is set. The central processing unit 3 then stores the contents of this temporary storage register TA in the AL. It is shifted to the left via U46, and it is determined how many times the shift to the left causes a carry. That is, this operation detects which bit from the left is set to "1", and it is detected that a carry occurs at the third left shift and that the print mode is 0FF mode. Therefore, the central processing unit 3 stores the code RlOOO...
...0J is transferred to the input latch circuits 74 and 92 of the keyboard section 4 and printer section 6 via the I/O buffer 5 data bus 58. As a result, the print mode display lamp 70a of the keyboard housing 62 lights up, indicating that the print mode has become the 0N1 mode. Further, the bit b1 of the input latch circuit 92 of the printer section 6 becomes 6"F", and the printer section 6 also comes to operate in the 0N1 mode.

In this way, in the state of 0N1 mode, Figure 3 a-d
As shown in the figure, if you input data by key operation,
The decoder 95 of the printer section 6 receives the disable signal M from the control section 30 and is addressed by the ALU 46 via the address buffer 52 and the address bus 56, and the printer section 6 is energized. After the input data passes through the central processing unit 3, it is transferred to the data bus 58, the input latch circuit 92, and the AND circuit 98 (because the bit b1 of the input latch circuit 91 is ゜゜1゜, data can pass through the AND circuit 98. )
The character generator 89 generates a character signal according to the input data, and the generated character signal is controlled by the printer control section 90 and printed on the main body 91 one character at a time.

Further, the CRT display section 5 also receives a disable signal M from the control section 30, is addressed and activated, and receives data given from the keyboard section 4 via the data bus 58 after passing through the central processing unit 3. The CRT storage device 80 is
The data read from the CRT main body 86 is displayed one character at a time.

That is, FIGS. 3a to 3d show the case where, for example, a program as shown in Table 1 is keyed in, and the alphabetic character and numeric keys 69
b to RlJrO/SpoRIJrNJrPJrUJrT
When the operator presses the command key RINPUT or the command key RINPUT, characters or commands are printed and displayed one by one as shown in FIG. 3a.

Note that in the above key operations, RspJ means space, and the space key 69c is operated. But then Rsp
When you operate with JrAyo, this RA! is printed and displayed as shown in FIG. 3b.

Next, write the second line of the program to R2JrOyoRsp/1J
When inputting , the printing and display conditions at this time are as shown in Figure 3c.
The state after keying in all the programs in Table 1 is as shown in FIG. 3d.

Next, when the PM key is operated again, the input key is determined by the same operation as described above, and after it is determined that the PM key has been operated, the data in the input latch circuit 74 of the I/0 boat 66 is is stored in the temporary storage register TA via the output latch 72.

Since it was currently in 0N1 mode, the storage state of temporary storage register TA is RlOOOO...0J, which is A
The current mode is determined by shifting to the left via the LU46. However, in this case, since there is a carry in the first left shift, the second bit from the left is controlled to be set to ``1'', and the storage state of the temporary storage register TA is R.
OlOO...0 is sent to the input latch circuits 72 and 92 of the I/O boats 66 and 88, respectively. As a result, the print mode display lamp 70b of the keyboard body 62 lights up to indicate that the print mode has become 0N2 mode. Furthermore, the bit B2 of the input latch circuit 92 of the printer section 6 becomes "゜1", and the printer section 6 also comes to operate in the 0N2 mode.

In this way, in the ON2 mode, Figure 4 a-f
As shown in , when data is entered by key operation,
The decoder 95 of the printer section 6 receives the disable signal M'' from the control section 30, and is addressed and the printer section 6 is energized.

At this time, if the execution key 69 is not pressed, bit B4 of the input latch circuit 92 is "0", so the output voltage of the AND circuit 96 is 0, and the data from the keyboard section 4 cannot pass through the AND circuit 98. , will not be printed.
At this time, input data is displayed one character or one command at a time on the CRT display section 5, and the operator can input data while looking at the CRT main body 86.

That is, as shown in FIG. 4a, RlOlNPUTA. At the stage when J is input, RlOINPUTA appears on the CRT display section 5.
．． J is displayed, but it is not printed on the printer unit 6 yet and is printed only when the execution key (Ex) 69 is operated as shown in FIG. 4b. That is, when it is detected that the operated key is the execution key 69, a flag indicating the operation is transmitted to the fourth bit of the input latch circuit 92 of the printer section 6 via the I/0 buffer 5 and the data bus 58. B4 becomes "゜1". On the other hand, since "1" is set in B2 of the input latch circuit 92 indicating 0N2 mode, the AND circuit 96 is turned on and the input latch circuit 9
One line of program information RlOlN sent to 2
PUTAJ is sent to the character generator 89 via the AND circuit 98 and printed onto the printer body 91. Then, the program R2OlNPU in the second line
After inputting TByo, for example, if you intended to input the program statement R3OC=AXBJ, you accidentally typed R.
If you enter the statement C=A+-B, operate the cursor movement keys on the keyboard body 62,
By re-inputting the statement C=AXB, the display on the CRT body 86 is corrected as shown in FIG. 4c. Then, when the operator confirms that the program has been edited and presses the execution key 69, the edited program is stored in the main storage device 2 and bit B of the input latch circuit 92 of the printer section 6 is set to AL. ．． U4
6 gives ゜゛1゛ (a flag indicating that the execution key has been pressed), and the output of the AND circuit 96 becomes ゜1゛.
The data (corrected data) held in the I/0 port 78 of the CRT display section is input to the character generator 89 via the AND circuit 98, and R3Oc=AXB is printed as shown in FIG. 4d. The display and print conditions when all the programs shown in Table 1 are keyed in are as shown in Figure 4 E and f, and the printed results do not include the corrections made during the process. do not have.

Next, when the print mode designation key PM is pressed again, the data given to the temporary storage register TA is ROlO
O...0. J, the ALU 46 shifts this to the left, and since a carry occurs the second time, it determines that the next mode is the 0FF mode, and sends the code ROOlO...0→, which indicates the OFF mode, to the TA. Store in.

Then, this code is applied to the input latch circuit 74 of the keyboard section, and the print mode display lamp 70C is lit to indicate that the mode is 0FF mode. On the other hand, "the above code ROOlO...0" is given to the input latch circuit 92 of the printer section 6.

At this time, since the outputs of the AND circuit 96 and the OR circuit 97 are "0", for example, the output from the keyboard section 4 to the printer section 97 is "0".
Even if data is given to , it cannot pass through the AND circuit 98 and is not printed. FIG. 5 is a flowchart showing the operation of a modified example of the present invention, and by storing each step in a fixed manner in the system program area, it is possible to eliminate the use of AND circuits 96, 98 and OR circuit 98. There are some things that can be done similarly.

That is, in this example, when a key operation is performed, it is determined whether or not the pressed key is the execution key 69, and if it is the execution key 69 (i.e., if the key input data has been edited). , key input data is read from the CRT storage device. Then, the printer section is the above-mentioned 0N1, 0N2,
It is determined which of the 0FF modes it is in, and when it is in the 0N1 and 0FF modes, the input data to be printed is processed, and when it is in the 0N2 mode, the edited key input data is printed. In addition, if the pressed key is not an execution key, the key input data is displayed on the CRT display section, and then it is determined whether the printer is in 0N1, 0N2, or 0FF mode. Key input data is printed, ON2 mode and 0F
No printing occurs when in F mode.

Note that in the embodiments shown in FIGS. 1 and 2 above, a key is provided on the keyboard to select the print mode, but the present invention is not limited to this, and for example, a 3-position switch, Various methods can be used, such as those that output separate signals for different modes.

Further, in the above embodiment, in the 0N1 mode, RlOOOO・
...ROlOO in 0, 0N2 mode...
In the 0J10FF mode, binary signals such as ROOIO...0j are generated, but the present invention is not limited to this, and various signals can be generated.

In short, it is sufficient to generate separate signals in the 0N1, 0N2, and 0FF modes. Furthermore, in the above embodiment, the program is printed as if it had been edited by pressing the execution key that instructs the input program or data to be written into the main memory. A special key may be provided for printing.

In addition, although the above embodiments relate to personal computers, the present invention is not limited thereto, and can be applied to general computers, large-sized computers, and the like. As is clear from the above description, the present invention has a printing mode switching means for setting at least two states, and when the printing mode switching means specifies the first mode, data is input by key operation. This data is printed every time the print mode is changed, and the print mode switching means
When the mode is specified, data input by key operations is temporarily held and the data is printed when editing is completed, and when the switching means specifies the third mode, data input by key operations is not printed. Therefore, by setting the print mode switching means to the second mode, key input data such as characters, numerical data, program statements, commands, etc. that have been correctly edited on a CRT etc. can be transferred to a specific key. You can print it by operation, and when viewing the print result later or organizing the data, unnecessary (misprinted)
Since the data is not printed, it is extremely easy to read.

Furthermore, by setting the first mode, data is printed every time data is input by key operation, so there is an advantage that key operation errors can be detected without using a CRT.

[Brief explanation of drawings]

1 and 2 are a schematic perspective view and a block diagram showing an embodiment of a personal computer according to the present invention,
3a-d are explanatory diagrams showing the data display state of the CRT display section and the data printing state of the printer section when the above embodiment is in the 0N1 mode, and FIGS. An explanatory diagram showing the data display state of the CRT display section and the data printing state of the printer section when the
FIG. 5 is a flowchart showing the operation of a modified example of the present invention. 1...Personal computer, 2...
・Main storage device, 3...Central processing unit, 4...
...Keyboard section, 5...CRT display section, 6
...Printer section, 62...Keyboard body, 69...Execution key, 70a to 70c...
...Print mode display lamp, PM...Print mode specification key.

Claims (1)

[Claims] 1. In electronic computers that are designed to print data entered through key operations using a printer, at least two
a printing mode and switching means for setting two states; and when the printing mode switching means specifies the first mode, this data is printed every time data is input by key operation, and the printing mode switching means 1. A printing control device comprising: control means for temporarily holding input data by key operations when the second mode is specified, and causing printing by operating a specific key.