JPS6058732A - Digital signal transmission method - Google Patents

Abstract

PURPOSE:To prevent the word of a reference data in each block from going to an error word over consecutive plural blocks by interleaving which convert a burst error into a random error or the scramble processing, when the burst error takes place. CONSTITUTION:Generation of error of said reference data is prevented over plural blocks by satisfying a condition that the number of words N in one block at transmission and the number of word dividing groups. M at the scrambling processing have the relation of N>M and the N and M are prime number each other. For example, in case of N=5, a reference data word such as peak value or the like is the word of W0, W5, W10, W15.... Then if a burst error takes place, for instance, in a group I , the data string after inverted scrambling is as shown in the figure and error words (words marked X in the figure) are produced in the period of nearly 3 words as W0, W3, W6.... That is, it is prevented that the reference data word is erroneous consecutively over plural blocks.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides I) CM (Pulse Code Modulation)
The present invention relates to a digital signal transmission method for transmitting digital signals such as signals, and particularly to a digital signal transmission method in which a plurality of words are divided into blocks and scrambled (or interleaved) processing is performed on each word before transmission.

[Background technology and its problems]

In recent years, with the advancement of digital technology, analog signals such as audio signals and video signals are sampled and quantized and encoded, resulting in so-called PCM (
It is increasingly being transmitted (including recording and playback) as a pulse code modulation signal.

In this way, when converting an analog signal into a PCM digital signal and transmitting it, generally speaking, the higher the sampling frequency, the wider the analog signal band that can be transmitted, and the higher the number of quantization bits, the wider the dynamic range. known to be widespread. Therefore, if you try to digitally transmit the original analog signal with high fidelity, that is, wide band and large dynamic range, you will need a high sampling frequency and a large number of quantization bits. The number, so-called pit-lay 1-, becomes higher.

However, due to the characteristics of the transmission medium (including recording media), the bit rate is limited by the digital signal processing speed on the transmitting/receiving side (recording/playback side), and as a practical matter, PCM Considering economic efficiency, cost performance, etc. when supplying products such as signal recording and reproducing devices, it is important to perform high-quality signal transmission or recording and reproducing at as low a bit rate as possible.

By the way, as a technique for transmitting a signal with a large dynamic range at a relatively low bit rate of 1.
The CM method and the summation PCM method are known, but these methods are susceptible to the adverse effects of error propagation phenomena, and when trying to secure a certain level of error correction ability, redundancy increases and the bit rate reduction effect is reduced. cannot be obtained effectively.

Therefore, the applicant had previously filed a patent application for patent application No. 5 8-9 7 68.
No. 7, etc., proposed a block-contained digital signal transmission method in which multiple words such as the above-mentioned differential PCM data are made into one block, and at least one sampling peak value data word is arranged and transmitted within this one block. are doing. Due to the existence of this sampling peak value data word, even if an error occurs in the differential PCM data or the summation PCM data, the error propagation is prevented within the block, and the error propagation phenomenon can be suppressed within a short period of time.

If an error occurs in the sampled peak value data in the block continuously over a plurality of blocks, error propagation will occur in consecutive blocks having words that have been subjected to differential processing or summation processing.

In particular, when so-called burst errors occur, in which errors occur continuously over a large number of words, errors in the sampled peak value data tend to occur continuously over multiple blocks, and such burst errors are converted into random errors. Interleaf processing or scrambling processing, which is generally known as processing, is also desired to be a processing that can effectively prevent continuous errors in sample link peak value data within the block.

[Purpose of the invention]

In view of the above-mentioned circumstances, the present invention provides that when a burst error occurs, the reference data (for example, a sample link waveform) in each block in a block-contained digital signal transmission method is An object of the present invention is to provide a digital signal transmission method that can prevent words of high value data from becoming error words over a plurality of consecutive blocks.

[Summary of the invention]

That is, the first method of digital signal transmission according to the present invention
The feature is that the digital data is divided into blocks of a certain number of words based on the peak value data obtained by sampling the input signal, and other data in the block is placed at least at a predetermined position in the block. The data required for restoration is arranged so that the total number of words in one block is N words, and each word is scrambled to be distributed into M groups for serial transmission. , the number of words in the block N(!: the number of groups M for allocating words in the scramble), N)M, and N(!:M means satisfying the condition of disjointness).

A second feature of the digital signal transmission method according to the present invention is that in the digital signal transmission method having the first feature, the reference data word is sampled peak value data, and other data in the block is used as the source. The data is obtained by a linear 1-freeze combination of the wave height data.

Furthermore, a third feature of the present invention is that in the digital signal transmission method having the first feature, the number N of words in a block is a prime number.

Furthermore, a fourth feature of the digital signal transmission method according to the present invention is that in the method having the first feature, one of the number of words in the block N and the number of scramble groups M is an odd number; It is an even number above the other.

Furthermore, a fifth feature of the digital signal transmission method according to the present invention is that in the digital signal transmission method having the first feature, the reference data is composed of a plurality of words, each of which is arranged at a predetermined position within the block. According to a sixth feature of the present invention, in the digital signal transmission method having the first feature, data processing information regarding other data can be included in the reference data.

〔Example〕

First, the basic principle of the digital signal transmission method according to the present invention will be explained with reference to the drawings.

For example, an input signal such as an audio signal or a video signal is sequentially sampled, quantized and encoded to obtain multiple words of sampled peak value data X. .

Xl, X2. . . . and block them every fixed number n of these data words. A linear 1-freeze combination of data x(,,X,...,Xn-1 in this one block, for example, +, +, L-□.Then, at least the reference data needed to restore other data in this block, such as the original sampling peak value, is directly applied to a predetermined position within this block. The data representing the block is arranged, and the block as a whole is made up of N words.

Here, as an example of the above linear 1-freeze combination, we will explain the case of calculating the difference between adjacent data.Xo = x
6 X, = XI - ax.

X2 = x2 - aX.

Xn-1=X'. -HaXn-2 (where a is an attenuation coefficient, 0<a<1), each transmission data Xa, XI, . . . , X.-1 is obtained. In this example, the transmission data Xo is the above-mentioned reference data representing the original sampling peak value data It is sufficient if the number of words in one block is n, but if necessary, various information words may be included in the block during transmission, so that generally n≦N.

In general, N words of data Wo, W, etc., including n words or one row word of data obtained by linear 1 freezing of the optical peak value data, and at least one word of the reference data, are provided. ..., WN
, if continuous errors across a large number of blocks, so-called burst errors, occur, the reference data may not be able to be corrected completely by processing such as interpolation. Here, as a countermeasure for the burst error mentioned above, scrambling (or interleaving) is generally used.
Although such processing is known, if the reference data has continuous errors over multiple blocks, even if other data can be corrected, it will not be possible to restore the original peak value data. . Therefore, even if the burst error occurs, scrambling or interleaving processing is required to prevent the reference data from becoming continuously erroneous.

Therefore, in the digital signal transmission method of the present invention, the number of words N in one block at the time of the above transmission and the number of groups M for word distribution during scrambling, N>Ml and N and M. This satisfies the condition that these are relatively prime, thereby preventing the occurrence of errors in the reference data spanning multiple blocks.

Among these conditions, by making N(!:M) relatively prime, it is possible to prevent the above reference data from continuously causing errors between consecutive blocks. Regarding the condition of N)M, is the point that as M becomes larger, the minimum burst error length at which consecutive words (e.g., Wo, Wl) become errors becomes shorter, making it difficult to perform interpolation, and N
(This is because the condition of M is not realistic.

Here, the simplest example of scrambling processing will be explained with reference to FIG. This FIG. 1 shows the case where the number of groups M=3, and the transmission data wo,
w,, W2. . . are sequentially sorted cyclically in the order of group I, full, and each three data sequentially constitutes a frame 2, a second frame, and so on. Then, each data of group ■ is shifted in one direction by a predetermined number of frames F with respect to group I, and each data of group
After shifting in the same direction by twice the predetermined number of frames F, group 1. Scrambling processing is performed by reading each data in the order of II and H.

Therefore, burst errors occur in the frame direction (vertical direction in Figure 1) within the same group, and after descrambling processing, the burst error occurs at a rate of approximately 1 in 3 words (approximately 3 This means that an error has occurred in the word period).

On the other hand, if the number of words in the block is N>M
, and N(!: M is relatively prime, for example, if N=5, the reference data words such as the above wave height data are Wo, Ws, WIOrW+s
,... become the word. For example, when a burst error occurs in group I, the data string after descrambling becomes as shown in Figure 2, and the error word (X
The marked word) is Wo, Wa.

Ws, . . . occur approximately every three words. As is clear from FIG. 2, the reference data word W.

Even if an error occurs in Wli, an error will not occur in the next reference data word Wli, and continuous errors in the reference data word over multiple blocks are prevented. It is possible to correct the reference data word WO etc.

The above is an example of the most basic scrambling process,
The actual scrambling process is more multi-axis, and several layers (several types) of scrambling are applied at the same time. In this case as well, each numerical value may be set between the number of groups M and the number of words in a block N for the basic scrambling process so that the above conditions are satisfied.

That is, FIG. 3 is a block diagram for explaining an encoder for performing actual scrambling processing,
■Word ■6-bit word L.

12 words of R are collected into one frame, each word is further divided into two words W of 8-bit word length, and 8
Scrambling is performed in bit units (that is, byte units).

Here, each word L, R has a word length of 16 bits.

For example, it can be considered as peak value data obtained by sampling the L (left) channel and R (right) channel signals of a stereo audio input signal as shown in Figure 4, and performing 16-bit quantization and encoding. By the way,
These sampled peak value data are transferred to the L channel,
Six words are collected for each of the L channels to form a frame with a frame length of 12 words as shown in FIG. In the first scrambling operation op-1 of FIG. 3, each word is distributed into four groups as shown in FIG. 6, ignoring the internal two-frame delay. However, since the L channel and R channel can be considered as independent time series data, if we focus on one channel, for example, the L channel,
This means that they are sorted into two groups.

That is, this corresponds to the case where the number of groups M=2.

By the way, the word L of each channel like this.

R is the sampled peak value data itself with a word length of 16 bits, but by using the linear 1 freezing combination of data as described above, it can be transmitted with a small number of bits without limiting the original dynamic range. can. For example, when forming a 7-bit long data word by the linear 1-free combining process, etc., each word in one block at the time of transmission may be set as shown in FIG.

That is, in FIG. 7, the number of words in l block is N=17, and the first . The upper 7 bits and lower 7 bits of the original sampling peak value data, which will become the reference data described in "2", are arranged in each of the second words WO1W1, and the third. 4th each word W
2, W3 contains, for example, mode switching data (2
bit) and adaptive information data (3 bits)
They are arranged in layers (so-called double writing), and from the 5th word W4 to the 17th word W+6, linear 1 frozen summation data Xl to X13 of the sampled peak value data in one original block are written.
are placed respectively.

When transmitting this digital signal with a word length of 7 bits, use the L channel and R channel with the word length of 6 bits I. For example, as shown in FIG. H"'+r
I Hr2 r ”'+”I +a2 + ”'+ and bl.

b2+... can be transmitted. In FIG. 8, when each of the 16-bit words L and R is divided into two to form four 8-bit words, the most significant bit of each 8-bit word is changed in consideration of word synchronization, etc. The word length is fixed to 1 or O, and data of the word length of 7 bits is allocated to each of the remaining 7 bits.

Again in FIG. 3, input data L6" = Rank
s corresponds to the 16-bit word length data of the L channel and R channel, and Wlzn, AwW12r
I+11. B corresponds to four channels of data with a word length of 8 bits (original data is 7 bits). Here, n in the figure indicates an arbitrary integer.

Furthermore, the correspondence relationship with FIG. 8 is that W 12n, A is An
.

Wlzn, B is rn+ W12n+1. A is an, W
12n+l, B is bn, and then sequentially, w1□n+2
- may be made to correspond in the order of A'l rfalb, such as 4+.

Here, by the first operation 0P-1 in FIG. 3, each data 11. r, a, and b are distributed as shown in FIG.

The vertical axis of FIG. 9 indicates 0 to 11 and 16 to 27 of the transmission line numbers θ to 31 shown at the right end of FIG. 3, and the horizontal axis indicates the frame number (or frame delay amount). ing. And the data string of one channel, for example 10.

lr, 12. ..., the blocked words wo, Wl, w2 . (The numerals appended to this W and the numerals affixed to the W in FIG. 3 have different meanings.) correspond to each other.

Furthermore, by the second operation 0P-2 and the third operation 0P-3 in FIG. 3, the data on each transmission line is delayed by a predetermined amount in frame units, and scrambled into the data arrangement order as shown in FIG. and output. This 10th
In the figure, considering the correspondence with Fig. 9, lo, g
, , g, , . . . , etc. are used to represent each data, and the general word W in FIG. 3 is also shown. The frame delay amount O1 in FIG. 1O, that is, the data of each line currently in the output state corresponds to each data W on the right side of FIG. Then, for each frame period, data in which n of the appended numbers such as these data W is increased (incremented) by 1 is sequentially output.

Furthermore, when serially transmitting each data W etc. from these 32 output lines, for example when recording on an optical disk etc., line numbers 0 to 3 of the frame currently being output are
1 are sequentially arranged in a range within one frame period along the time axis, and serially transmitted at a rate of 32 words (8-bit long words) per one frame period.

Therefore, for example, there is a time distance of (1) frame period from the transmission of word data lo in FIG. 10 until the transmission of data 16, and data 1. ．． 16°11□,・
There is a temporal distance of about 60 frame periods or more from the transmission of data 4, 17H43r, . . . to the transmission of data 4, 17H43r, . That is, in the example of Figure 1O, 6
As long as a burst error that continues for 2.5 frame periods or more does not occur, the data sequence l. .

Two consecutive pieces of data 11, 121, . . . will not cause an error, and either the even or odd numbered data will be transmitted without error.

As mentioned above, the basic number of groups M during scrambling processing
is 2, and when the number of words N in the block to be transmitted is 17, even if 4 has an error, the data 117 of the first word of the next block will have a burst error for about 81 frame periods. An error will not occur unless the above are repeated consecutively.

Furthermore, the temporal distance from the corresponding word data 418 of the second word data ll Yoshitsugu block in the block is approximately 60 frame periods, and realistically, unless a burst error occurs for approximately 60 frame periods or more, , both pieces of corresponding data between successive blocks will never result in an error. Therefore, the second and lower parts of the peak value data, which serve as reference data, are used as the first and second parts of each block. When placed in the second word, it is extremely rare for only the second place part or only the lower part to have an error continuously, and the error-prone peak value upper data or lower data can be corrected by interpolation, etc. Kokichi can do it.

In this case, in particular, it is important to ensure that the words in the upper data part on the MSB side of the peak value data, which serves as the reference data, do not have consecutive errors in order to minimize interpolation errors. is important.

In addition, in the case of M=2, the 7-bit disk containing the mode switching data and adaptive information data is stored in, for example, the third disk in the l block. By doubly writing two consecutive words like the fourth word, even if one of the words causes an error, the other will not become an error.

Here, FIG. 1I shows an example of a decoder for descrambling processing that performs an operation opposite to the encoder for scrambling processing shown in FIG. 3, and FIG.
FIG. 3 is a diagram for explaining processing of the decoder shown in the figure. The data W and the like in FIGS. 11 and 12 are the same as those in FIGS. 3 and 10 described above, and therefore their explanation will be omitted. Further, curves C and C2 in FIG. 12 indicate processing by the CI decoder and C2 decoder in FIG. 11. This FIG. 12 can also be seen as a representation of the memory map used in the decoder for descrambling processing shown in FIG.
■Frame 32 words, total 108 frames (
or 109 frames). The same applies to the scramble processing decoder shown in FIG. 3, which sequentially writes input data to the memory and
By controlling the read address using a controller such as U, scrambling processing and descrambling processing can be realized. This address control and the like are not related to the gist of the present invention, so a description thereof will be omitted.

Next, regarding the means for obtaining data in blocks as shown in FIG.
The device disclosed in No. 688 or the like may be used.

In other words, No. 11(2) is a block circuit diagram showing a specific example of an encoder for obtaining data in units of blocks as shown in FIG. 7 from the original sample link peak value data string.

In FIG. 13, for example, a 14-bit digital data signal (sampling peak value data signal) is supplied to an input terminal 31 of the encoder. A pre-emphasis circuit 32 connected to this input terminal 31 is used to particularly emphasize high-frequency signals to improve the S/N ratio, and has a time constant of, for example, 50 μs. For example, 14 from this pre-emphasis circuit 32.
The bit outputs are sent to a multiplexer 33, an intra-block maximum value detection comparison circuit 34, a difference processing circuit 35, and a summation processing circuit 36, respectively. In addition to the 14-bit sampling data signal from the pre-emphasis circuit 32, the in-block maximum value detection and comparison circuit 34 receives, for example, a 15-bit difference data signal from the difference processing circuit 35 and from the summation processing circuit 36. A 15-bit summation data signal is provided. This in-block maximum value detection/comparison circuit 34 detects and compares the maximum absolute value of each of the above data in l block (multiple words), and assumes that the mode with the smaller maximum value has higher compression efficiency. , select the mode. The difference processing circuit 35 sequentially extracts difference data of adjacent words from the sample data from the pre-emphasis circuit 32, for example. That is, n words X of the sample peak value data correspond to the l block.
. .

When xl, . . . , Xn-1 are input, the difference processing circuit 35 outputs

D2==x2−k·x.

Dn-+ = Xn-+ k-Xn- where k is the attenuation coefficient and n-1 word difference PCM with 0 < k < 1
Theta DI, D2.

..., Dn-+ is output. Each block of differential PCM data D, -T)n-, is sent to the book memory 37 and stored therein. The summation processing circuit 36 is for calculating the sum of the input peak value take and the coefficient multiplication value of the input data one sampling period before, and the n words Xo "" -t
The summation take n-] word AI =Ao-+ is.

A+ = X1+k・X.

A, 2 = X2 + Shun XI An-+ = Xn-+ 1k 1IXn-z.

Then, the intra-block maximum value detection and comparison circuit 34 detects the maximum absolute value of the word data in each mode within one block, that is, the data in the general PCM mode (of the peak value take X+ w Xn-+). The maximum absolute value, the maximum absolute value of the difference data Dl-Dn-t in the difference PCM mode, and the sum PC
The maximum absolute value of the summation take A s-A n-i in M mode is detected, and the maximum absolute value of each of these three modes is compared, and the mode with the smallest maximum absolute value is determined as described above. This mode is determined to be a highly efficient compression mode that can widen the dynamic range with the same number of bits, and this mode information and the maximum absolute value of this mode are
It is sent to the mode selection/adaptive information calculation circuit 41.

Here, the above general P: CM mode, differential PCM mode,
Regarding the mode with the highest compression efficiency among the PCM and summation PCM modes, the applicant has proposed, for example, Japanese Patent Application No. 58-97.
As disclosed in the digital signal transmission device proposed in No. 688, etc., the frequency changes depending on the input signal frequency. That is, FIG. 14 shows the dynamic range obtained when the input signal is sampled at a constant sampling frequency and the peak value, difference value, and sum value are each quantized with the same number of bits. In FIG. 14, the dB value of the dynamic range is plotted on the vertical axis, and the input signal frequency f1 is plotted on the horizontal axis.
A characteristic curve A in the general PCM mode, a characteristic curve B1 in the differential PCM mode, and a characteristic curve C in the summation PCM mode are shown, respectively, in the case of G(z and 8 bits).

As is clear from FIG. 14, the input signal frequency fI
When is from the low range to fs/6, the dynamic range of the differential PCM mode is large and the compression efficiency is relatively the highest. Similarly, the input signal frequency fl changes from fS/6 to fs
/3, the general PCM mode and when the input signal frequency fi is fs73 or higher, the summation PCM mode can provide a large dynamic range and high compression efficiency.

Therefore, when the input signal is a sine wave, the mode in which the maximum absolute value is the smallest among the three modes mentioned above corresponds to the mode in which the dynamic range is widened by i with the same number of bits, and this is approximately equal to the input signal frequency. Determined accordingly. Sunai]
In other words, the intra-block maximum value detection/comparison circuit 34 can be regarded as having a function of detecting the input signal frequency spectrum, and when the differential PCM mode is selected, the mid-low frequency signal is detected, and when the general PCM mode is selected, it is detected. When the summation PGM mode is selected, it is determined that a high frequency signal is input, and when the summation PGM mode is selected, it is determined that an even higher frequency signal is input.

Next, the mode selection/adaptive information calculation circuit 41
This circuit outputs information for selecting a mode with a small maximum value, that is, a mode with a high compression rate, and adaptive information indicating the size of a quantization step, and the mode selection information is sent to the mode switching processing circuit 42 and the multiplexer 33. Additionally, the adaptive information is sent to the adaptive processing circuit 43 and multiplexer 33, which perform the quasi-instantaneous compression on a block-by-block basis. The mode switching processing circuit 42 is sent with differential processing data D+ to Dn-+ for blocks stored in the block memory 37, and all blocks of differential processing data D+ to Dn-+ stored in the block memory 37 are sent to the mode switching processing circuit 42. Word data, that is, data from X1 to Xn-1 when the general PCM mode is selected, data from D1 to Do-+ when the differential PCM mode is selected, and data from A1 to A, n-1 when the summation PCM mode is selected. and sends it to the adaptive processing circuit 43. Here, the specific operation of the mode switching processing circuit 42 is as follows:
Block difference data D, -Dn-1 and instantaneous peak value data X from the pre-emphasis circuit 32. When the differential PCM mode is selected, the input data D1 to T)n-+ may be output as they are. When the general PCM mode is selected, it is sufficient to cancel the differential processing by the summation operation, specifically, 27- x+ = Di 1k-x.

It is sufficient to perform the arithmetic processing of -Xn-2 on X2-D2 + -xl Similarly, when selecting the sum PCM mode,
By performing the summation operation twice, the above input data D
Integration data A1 to A n- from 1w Dn- and xO
1 can be obtained, and A+ = x+ + -XO = Dl
+2 kx.

A2 ==x2+ -x□=Dz -1-'! kx2A
n-i "X n'-1+" Xn-2= Dn-
It becomes 0+2 k Xn-g.

Next, the block unit adaptive processing circuit 43 requantizes the intra-block mode data from the mode switching processing circuit 42 with a quantization step width corresponding to the maximum absolute value.

The output data from this adaptive processing circuit 43 is 1
One word input in a block is, for example, n-1 word data of 28-15 bits, that is, data x1 to Xn-r when the general PCM mode is selected, and data Dr = D n-+ when the differential PCM mode is selected.
, when the summation PCM mode is selected, is data of n-1 words obtained by adaptively processing any of data A1 to An-1. At this time, the adaptive processing is performed for all words in the block according to the number of consecutive °0''s on the lower side of the most significant bit l-MSB of the maximum absolute value in the block in the selected mode. Bit compression processing is commonly performed.For example, when m+1 "0"s are placed consecutively on the lower side including the MSB of the maximum absolute value, other bits in one block of the selected mode are The absolute value data of at least m +
Since there is one or more "O", bit compression of m bits can be performed in common for all words in the block except for the MSB. That is, when the original 15-bit human data has positive and negative values expressed in two's complement, when this input data is a positive number, the sign bit M
The MSB of the output data shifted to the left by m bits also represents a positive number at 0°, and the MSB of the output data shifted to the left by m bits also represents a positive number.
When the original 15-bit input data is a negative number, the MSB
Since °1" continues for at least m+1 bits from ", the MSB of the output data shifted left by m bits is also
It becomes 1° and represents a negative number. These m-bit left shifts can also be considered as so-called arithmetic left shifts in which the sign bit MSB is left unchanged and the second-order bits 28B and below are shifted left by m bits.

Next, the data from the adaptive processing circuit 43 that has been subjected to such quasi-instantaneous compression processing on a block basis is sent to the word-based adaptive processing circuit 44, and is independently processed for each word in the block. For example, non-linear instantaneous compression processing such as polygonal compression is performed, and the data is converted into data of 7 bits per word, for example.

Furthermore, if necessary, these adaptive processing circuits 4
3.44, an error feedback circuit unit 46 is provided which performs noise shaping processing to change the noise spectrum.

The operating principle of noise shaping by the error feedback circuit section 46 is disclosed in detail in Japanese Patent Application No. 1983-97689, which was previously proposed by the applicant of the present invention.
The main point is that the error generated between the input and output of the adaptive processing circuits 43 and 44 that performs requantization is detected by the adder 46a that performs a subtraction operation, and the adder 46a performs a subtraction operation.
After the output of a is delayed by, for example, one sampling period by the delay circuit 46b, the feedback amount adjustment circuit 46C
The signal is attenuated by a predetermined amount and sent to an adder 47 that performs a subtraction operation provided on the input side of the adaptive processing circuit 43, thereby applying so-called feedback. Through such error feedback, the spectrum of the requantization noise is changed into a spectrum shape that concentrates on the high frequency side, for example. In this case, considering the auditory masking effect, it is desirable to match the spectrum of the noise to the shape of the spectrum of the input signal as much as possible. In reality, it is only necessary to apply a large amount of error feedback to a mode selected in a high frequency region.

The multiplexer 33 receives instantaneous peak value data from the pre-emphasis circuit 32, adaptive information data and mode selection information data from the mode selection/adaptive information calculation circuit 41, and adaptive processing and noise shaping processing from the adaptive processing circuit 44. One word is 7 bits, and n -1 words of data X1~
Xn-1 is converted into time-series digital data, and the data of each word is serially transmitted via the output terminal 39 in the order shown in FIG. 7, for example.

In the example of FIG. 7, the number of words in the block of light n
is 14, and the number of words N in one block during transmission is 17.
, and the 17 words in this block are Wo ” W
For lg, the upper 7 bits of the original peak value data ') Remaining 13 words W4
Data X+ -X13 are allocated to W+6, respectively.

In order to connect the encoder shown in Fig. 13 to the scramble processing encoder mite as shown in Fig. 3,
The serial data from the multiplexer 33 is sent word by word, for example, the word l mentioned above. .

11.132. . . . in order. Specifically, the data from the multiplexer 33 is converted into 6 words of parallel data via a serial-to-parallel converter in units of 6 words, and these 6 words of data are converted into 6 words of parallel data. , each word w+2n in FIG. 3, A I W+2n+2 . AI
W12n+4. A, W12n+6. A, W
I21+8. A, and W +20+ 10. What is necessary is just to configure it so that they are respectively supplied as A.

Furthermore, as a decoder that performs an operation opposite to that of the encoder shown in FIG. 13, a configuration as shown in FIG. 15, for example, may be used.

That is, the input terminal 51 in FIG.
24 of the decoder for descrambling processing as shown in Figure 1.
By converting the output signals from six output lines for one channel of the book's output lines, for example, the data string 4, ll H"' 2 +, etc., into serial data, For example, a digital signal constituted by one block in a word arrangement as shown in FIG. 7 is input, and this input signal is supplied to a multiplexer 52. Based on the synchronization signal,
The various types of data described above are separated from each other, and the adaptively processed data X]~xn-, in any mode, is sent to the word unit adaptive (restoration) processing circuit 53.

This word unit adaptive processing circuit 1853 performs the opposite process to the word unit adaptive processing circuit 44 on the encoder side in FIG.
For each word in the block, nonlinear expansion processing, which is the inverse operation of the polygonal line nonlinear compression described above, is performed, for example.

The output data from the word-by-word adaptive restoration processing circuit 53 is sent to the block-by-block adaptive (restoration) processing circuit 54, which performs an adaptive restoration operation based on the multiplexer adaptive information data. For example, l-m bits of data Xr to Xn-
The l MSB (bit indicating the sign) is sign-extended by the m bits and converted into two's complement representation data of l bits in total. This e bit rate is the data of the mode specified by the two mode selection data, and when the general PCM mode is selected, the data X]~Xn-1, and when the differential PCM mode is selected, the data In the sum PCM mode, the data A1 to A. It is n-+. Such an adaptive (restoration) processing circuit 54
The data is sent to the mode switching processing circuit 55, where it undergoes processing according to the mode selection data, and is sent to the multiplexer 56 as the peak value data Xl=Xn-IL. This mode switching processing circuit 5
5, when the input data is general PCM data X1 to xn-, it is output as is, and when the input data is differential PCM data D1 to Dn-+, it is outputted as data X+ to Xn-1 by the above-mentioned summation operation. When the input data is summation PC'M data AX to An-1, it is converted to data XIwxn-1 by differential operation. Instantaneous peak value data is also used during these summation and difference operations.

Next, the multiplexer 56 receives the instantaneous peak value data from the input stage multiplexer 52 and the mode switching processing circuit 5.
The peak value data XIMj
' Output xn-1 sequentially. The output from the multiplexer 56 is taken out from an output terminal 58 via a de-emphasis circuit 57 having characteristics opposite to those of the pre-emphasis circuit 32.

As is clear from the above explanation, by using the encoder shown in FIG. 13 and the decoder shown in FIG. By performing non-linear instantaneous companding processing on each word, compression efficiency is greatly improved and the dynamic range can be expanded efficiently. In addition, by dividing multiple words of data to be transmitted into blocks, error propagation in differential PCM mode or summation PCM mode can be stopped in a short period of time, and the attenuation constant k during pre-bright differential and summation processing Since it is possible to take a large value and perform a large adaptive operation, it is possible to transmit an adaptive differential (or summation) PCM digital signal with a wide dynamic range. Furthermore, since adaptive information only needs to be transmitted at a rate of 1 word per block, the bit rate is lower than when adaptive information is transmitted for each word of each PCM data, and without significantly increasing redundancy. This makes it possible to significantly improve error correction capability.

In addition, general PCM seventh mode, differential PCM mode, sum PCM
By comparing the maximum value of the words in the block in various transmission modes such as CM mode, a mode that allows greater compression is selected, and data in the selected mode is transmitted in units of blocks. Therefore, it is possible to minimize negative effects such as error propagation, deterioration of instantaneous S/N ratio, and increase in distortion rate, and to perform digital signal transmission with high transmission efficiency.

Note that the present invention is not limited to the above-mentioned embodiments; for example, when only quasi-instantaneous compression is performed for each block, a word containing adaptive information data may be used as the reference take.

〔Effect of the invention〕

According to the digital signal transmission method according to the present invention, a burst error occurs when data of multiple words is divided into blocks and a reference take word such as sample link peak value data is placed in each block and transmitted. Even if
It is possible to prevent the reference data words from being erroneous continuously over a plurality of blocks, and it is possible to correct the erroneous reference words by processing such as interpolation.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a word arrangement for explaining the basic operation of scrambling processing, and Fig. 2 is a diagram showing an error in reproduced data words when a bust error occurs.
FIG. 3 is a block diagram showing a scrambling encoder used in an embodiment of the present invention, FIG. 4 is a stereo audio signal, and FIG. A diagram for explaining the frame structure of the sampling peak value data word, FIG. 6 is a diagram for explaining the scrambling process of the data word in FIG. 5, and FIG. 7 is a diagram for explaining the frame structure of the sampled peak value data word. FIG. 8 is a diagram showing the correspondence between the R channel 16-bit data word and the 7-bit data word, and FIG. 9 is a diagram showing the correspondence between the scramble processing encoder of FIG. 3. A diagram for explaining the first operation, FIG. 1O is a diagram for explaining the entire scrambling process in the encoder of FIG. 3,
FIG. 11 is a block diagram showing a decoder for descrambling processing that performs the opposite operation to the encoder in FIG. 3;
FIG. 12 is a diagram for explaining the processing of the decoder in FIG. 11, FIG. 13 is a block circuit diagram showing an example of an encoder used in block-contained digital signal transmission, and FIG.
Figure 4 shows the frequency characteristics of each dynamic range in the general, differential, and summation PCM modes.
FIG. 4 is a block circuit diagram showing an example of a decoder that performs an operation opposite to that of the encoder in FIG. 3; 1.31... Input terminal 2... Maximum absolute value detection circuit in block 3... Adaptive information generation circuit 4.37...Block memory 5.43...Block unit adaptive processing circuit 6.44...Word unit adaptive processing circuit 7.33, 52.56 ......Multiplexer 8.39...Output terminal 34...Maximum value detection comparison circuit in block 35.
...Difference processing circuit 36 ... Summation processing circuit 41 ... Mode selection adaptive information calculation circuit 42 ... Mode switching processing circuit

Claims (6)

[Claims] (1) Blocking a plurality of digital data based on peak value data obtained by sampling the input signal into blocks for each fixed number of words, and restoring other data within the block at least at a predetermined position within the block. The total number of words in one block is set to N words by arranging the data necessary for
When performing serial transmission after performing scrambling processing to distribute the scrambled words into groups, the number of words in the block is N, and the number of groups M in which the scrambled words are distributed.
A digital signal transmission method characterized in that: N)M, and N and M are disjoint. (2) The reference data word is sampling peak value data, and the other data in the block is data obtained by a linear combination of original peak value data. The digital signal transmission method described in item 1). (3) The digital signal transmission method according to claim (1), characterized in that the number N of words in the block is a prime number. (4) The digital signal transmission method according to claim (1), wherein one of the number of words in the block N1 and the number of scrambling groups M is an odd number and the other is an even number. (5) The digital signal transmission method according to claim (1), wherein the reference data is composed of a plurality of words, each of which is arranged at a predetermined position within the block. (6) The digital signal transmission method according to claim (1), characterized in that the reference data includes data processing information regarding other data ζ.