JPS6057706A - Signal generator - Google Patents

Abstract

PURPOSE:To enable a signal to be generated accurately by giving an initial phase data of an initial phase value setting device to a waveform storage device, adding the initial phase data and a frequency data so as to form the next phase data thereby setting optionally the initial phase of the signal. CONSTITUTION:A data selector 4 selects a data of the initial phase value setting device 1 and a data of an adder 3 for integrating the phase data. The data selected by the data selector 4 is latched by a latch circuit 5. An output data of a waveform storage device 6 is obtained from the data of the latch circuit 5. The output data is latched by a latch circuit 7, D/A-converted and an output waveform is obtained. In this case, the data of the latch circuit 5 is inputted to the adder 3, where the data is added to the data of the frequency setting device 2. Thus, an output waveform with the definite initial phase and having a prescribed frequency is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital synthesized signal generator capable of generating a signal by setting an arbitrary initial phase value.

For example, when measuring the time response of an automatic control system, you may want to arbitrarily change the initial phase of the burst signal and observe changes in the time response, or you may wish to measure by arbitrarily changing the burst width using a signal with a constant initial phase value. There are cases etc. Furthermore, when generating two burst signals, there are cases where it is desired to generate burst signals with a constant phase difference. Furthermore, even in a normal signal generator, there are cases where it is desired to arbitrarily set the initial phase value and generate it accurately.

<Prior art> A conventional burst signal generator, as shown in Fig.
F control was used to generate a burst signal. Alternatively, a signal with a constant frequency was modulated with a rectangular wave. However, although the burst width can be controlled to some extent with any burst signal generator, it is difficult to generate a signal with an arbitrary initial phase value. Furthermore, even if the phase could be generated, the initial phase value would be an inaccurate value. Even with ordinary signal generators, it is difficult to arbitrarily and accurately generate an initial phase value.

<Objective of the Invention> An object of the present invention is to provide a device in which an initial phase value can be arbitrarily set in a signal generator, and an analog signal can be generated accurately from the set initial phase value.

<Summary of the Invention> In the present invention, in the configuration of a so-called phase accumulation type function generator, a data selector is provided between a phase accumulation adder and a data launch circuit, and a data selector is provided between a phase accumulation adder and a data launch circuit. The phase data of the adder output can be selectively output.

A phase accumulation type signal generator reads the amplitude value (amplitude data) corresponding to the phase data (which becomes address data) of the signal waveform stored in the waveform memory, and converts it into a digital-to-analog converter (hereinafter referred to as DA conversion). It converts the current phase data and frequency data into an analog signal wave and generates an analog signal through a low-pass filter. are added and provided to the waveform memory as phase data for reading out the next amplitude data. Normally, zero-phase amplitude data is stored in the initial address of the waveform memory, so when activated with only frequency data, an analog signal is output from the zero-phase signal waveform of the set frequency.

Therefore, in this invention, in order to generate an analog signal from an arbitrary phase, the initial phase data from the initial phase value setter is first given to the waveform storage device, and then the above initial phase data and frequency data are added. and the next phase data (address data). The initial phase value setter may be provided independently, or may receive initial phase data from the control device or another CPU.

<Embodiment of the Invention> FIG. 2 shows an embodiment of the invention. In Figure 2, 1
is an initial phase value setter, and 2 is a frequency setter.

These may be other CPUs or the like.

The initial phase value is, for example, from a 90 degree waveform of a sine wave,
Alternatively, it can be set to be generated from a 220 degree waveform or from an arbitrary waveform. For example, the frequency setting is 10.
．． It can be set arbitrarily, such as 5KHz or 95.64KHz. Reference numeral 3 denotes an adder for accumulating phase data, which adds the current phase data and frequency data given to the waveform memory to obtain the next phase data. A data selector 4 selects and outputs either the initial phase value data or the output data of the adder 3. 5 and 7 are latch circuits that operate according to a clock signal and receive input signals.
Nochi. 6 is a waveform storage device which stores amplitude values (amplitude data) corresponding to the phase values of waveforms in advance, and stores 5M
Ru. For example, if one cycle of a sine wave, 360 degrees, is broken down into 21,600 points and stored, then the phase data (address > oooooo has the amplitude value when the phase value is zero, and the phase data 00001 has the phase value at 1 minute). The amplitude value when the phase value is 1 degree is stored in phase data 00060, and the amplitude value when the phase value is 90 degrees is stored in phase data 05400. 1
When read out using a clock signal of 21.6 KHz, amplitude data for every minute is read out with one clock, and sine wave data of frequency IH2 is sent out. If the phase data is increased by 10 and read out with the same clock signal, 1
Amplitude data is read out every 10 minutes by the clock, and sine wave data with a frequency of 10 Hz is sent out. Alternatively, one period of a sine wave may be 2π radians, it may be decomposed into, for example, 4096 points, each amplitude value may be stored in a waveform memory, the phase data may be set in radians, and the amplitude data may be continued. . The output circuit 7 inputs the output of the waveform memory 6. A DA converter 8 converts the output data of the latch circuit 7 into an analog signal. 9 is a low-pass filter that removes unnecessary high frequencies contained in the analog output waveform of the DA converter and outputs only the analog waveform of the set frequency. , 10 is a clock signal source 8, which drives the false circuits 5 and 7. The oscillation frequency of the signal generator depends on the repetition frequency of the clock. l
li is a gate circuit that causes the device to transmit or determines the burst width according to a gate control signal.

Reference numeral 12 denotes a delay line, which adjusts the timing by delaying the phase data specified by the launch circuit 5 by the delay time until the amplitude data is output from the waveform memory 6.

<Operation of the Invention> In the above embodiment, for example, if a signal with an initial phase value of 90 degrees and a frequency of 10H2 is generated, 05400 is input to one input A of the selector 4 as the initial phase data.
, and lO is added to one input X of the adder 3 as frequency data.

The selector 4 is controlled by the selection signal to select the initial phase data A only for the first initial value of signal generation, and then select the output data B of the adder 3. Therefore, at the first clock, the launch circuit 5 latches the initial phase data 05400 and outputs it as the address data of the waveform memory 6 and as the other manual data Y of the adder 3.

The waveform memory 6 sends out amplitude data with a phase of 90 degrees stored at address 05400, and the amplitude data is latched by the launch circuit 7, converted into an analog signal by the DA converter 8, and passed through the low-pass filter. given to. The signal generator of the present invention outputs the initial analog signal waveform to the outside in this manner.

On the other hand, in adder 3, input X is 10 and input Y is 054.
00 is added and phase data of 05410 is sent.

Since selector 4 selects input B, latch circuit 5 launches phase data 05410 at the next clock signal. Therefore, the waveform storage device 6 sends out the amplitude data for 90 degrees 10 stored at address 05410.

After that, the latch circuit 5 outputs 05420.0 every clock.
Since the phase data of 5430.05440, . . .
Amplitude data is sent every 10 minutes, 40 minutes... Therefore, the signal generator, as shown in FIG. 3A,
An analog signal with an initial phase value of 90 degrees and a frequency of 10 Hz is sent.

When the initial phase value is 270 degrees, the analog signal waveform shown in FIG. 3B is generated, and when it is 0 degrees, the analog signal waveform shown in FIG. 3C is generated.

When the setting value of the frequency setter 2 is set to IQOHz, frequency data 100 is inputted as input X of the adder 3, amplitude data is read every 40 minutes from the waveform memory 6, and from the signal generator A 100Hz analog signal is generated.

<Effects of the Invention> As explained above, according to the present invention, the initial phase value can be arbitrarily set and accurately generated in a banist signal generator or a normal signal generator. The phase data may be expressed in coal content or in radians. The accuracy of setting the initial phase value can be increased by increasing the number of bits in the adder 3 and the storage capacity of the waveform memory. It will become a signal generator necessary for new precision measurements in the future.

[Brief explanation of the drawing]

FIG. 1 is a block diagram for explaining a conventional burst signal generator, FIG. 2 is a block diagram for explaining an embodiment of the present invention, and FIG. 3 is an output diagram for explaining a detailed explanation of the present invention. It is a waveform. 1: Initial value setter, 2: Frequency setter 3: Adder 4: Data selector 5.7: Latch circuit 6: Waveform memory 8: D-A converter 9: Low-pass filter IO: Clock oscillator 11 :Gate circuit 12:Delay circuit Patent applicant Takeda Riken Kogyo Co., Ltd.

Claims (1)

[Claims] (1) In a signal generator that reads amplitude data from a waveform memory as phase data and generates an analog signal wave through a digital-to-analog converter, select A, initial phase value data or adder output phase data. a selector, B, a launch circuit that reads and notches the phase data of the selector with a clock signal; A signal generating device comprising the adder to which the phase data and frequency data of the launch circuit are input, and generating an analog signal waveform from a set initial phase value.