JPS6055741A - Full break-in keying transmitter and receiver circuit - Google Patents

Full break-in keying transmitter and receiver circuit

Info

Publication number
JPS6055741A
JPS6055741A JP16399683A JP16399683A JPS6055741A JP S6055741 A JPS6055741 A JP S6055741A JP 16399683 A JP16399683 A JP 16399683A JP 16399683 A JP16399683 A JP 16399683A JP S6055741 A JPS6055741 A JP S6055741A
Authority
JP
Japan
Prior art keywords
frequency
break
signal
transmission
full
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16399683A
Other languages
Japanese (ja)
Other versions
JPS6366090B2 (en
Inventor
Shigeru Kimura
滋 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP16399683A priority Critical patent/JPS6055741A/en
Publication of JPS6055741A publication Critical patent/JPS6055741A/en
Publication of JPS6366090B2 publication Critical patent/JPS6366090B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B1/44Transmit/receive switching

Abstract

PURPOSE:To set automatically the receiving frequency at a transmission end time to the frequency of a break-in signal by inputting a transmission/reception decision signal output of a full break-in control circuit and deciding its frequency to input it to a CPU. CONSTITUTION:A signal obtained by inverting the transmission/reception decision signal having the break-in frequency from the full break-in control circuit and a receiving power source voltage RX8V are applied to the first AND gate 42A, and an output Y1 which is in the high level only for transmission and a polarity output obtained by rectifying the output of a product detector 26 of a receiving circuit 2 are applied to an NAND gate 44. Consequently, break-in is automatically received with the transmission frequency after keying in case of the break-in transmission frequency.

Description

【発明の詳細な説明】 この発明は別個の送信周波数と受信周波数で運用するフ
ル・ブレークイン・キーイング方式の無紐電信送受信機
において、送信中にブレークインがあった場合にブレー
クイン信号の周波数が送信周波数であるか受信周波数で
あるかを自動判定して送信路1時の受信周波数をブレー
クイン信号の周波数に自動設定する機能と、設定された
周波数を正規の運用周波数に復帰するためのリセット機
能全具備したフル・ブレークイン・キーイング送受信機
回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a full break-in keying wireless telegraph transmitter/receiver that operates using separate transmitting and receiving frequencies, in which the frequency of the break-in signal is changed when there is a break-in during transmission. A function that automatically determines whether the frequency is the transmit frequency or the receive frequency and automatically sets the receive frequency for transmitting path 1 to the frequency of the break-in signal, and a function to restore the set frequency to the regular operating frequency. It concerns a full break-in keying transceiver circuit with full reset functionality.

ブレークイン・キーイング(break−1n Key
ing)とは無線筒、信通イ6において、送信状態と受
信状態とを切替える手動操作を省略し、電鍵を押下げる
ことによシ自動的に受信モードから送信モードに転換し
て、電鍵の押下中は電波を発射し、電鍵操作によりモー
ルス符号等による通信を行い、電鍵操作が終ると再び受
信状態に自動復帰する通信の形態をいい、電鍵操作時以
外は常に受信状態を保っているので、ブレークイン(割
込呼出し)に対して直ちに応答できる便宜があシ、さら
に詳しくはフル・ブレークイン方式とセミ−ブレークイ
ン方式とに分類される。
break-1n key
ing) is a radio tube, which omits the manual operation to switch between the transmitting state and the receiving state, and automatically switches from receiving mode to transmitting mode by pressing down on the telephone key. This is a form of communication in which radio waves are emitted while the key is being pressed, communication is performed using Morse code, etc. when the key is operated, and when the key operation is finished, the mode of communication automatically returns to the receiving state. , there is the convenience of being able to respond immediately to a break-in (interrupt call), and more specifically, it is classified into a full break-in method and a semi-break-in method.

フル・ブレークイン・キーイングでは符号を形成するド
ツトやダッシュの部分(マークと称する)を電鍵の押下
げと同時に送信し、ドツトやダッシユの中間部および文
字と文字の中間のスペース部では受信モードを保持する
ものである。
In full break-in keying, the dots and dashes that form the code (called marks) are transmitted at the same time as the key is pressed, and the reception mode is set in the middle of the dots and dashes and the space between characters. It is something to keep.

これに対し、セミ・ブレークイン・キーイングでは電鍵
の最初の押下げによシ保持時定数を持つ送信状態となシ
、符号の送信は電鍵の操作に従って行われるが、スペー
ス期間も電波は発射しないが送信モードを保持しておシ
、受信回路は動作を停止している。そして送信(電鍵操
作)が終って受信状態となるまで罠は保持時定数の例え
ば0.5秒間を要することになる。そのため相手方送信
の出だしの部分を聞き損う恐れがあるが、送受信の転換
に保持時定数を持たせることは比較的容易であるし、電
話送受信用のVOX (音声制御)回路と共用できる便
宜もあるので、比較的安価な機器に多く使用されている
On the other hand, in semi-break-in keying, the first press of the key enters a transmission state with a hold time constant, and the code is transmitted according to the operation of the key, but no radio waves are emitted during the space period. While the transmit mode is maintained, the receiver circuit stops operating. The trap requires a holding time constant of, for example, 0.5 seconds until it enters the receiving state after the transmission (key operation) is completed. Therefore, there is a risk of missing the beginning of the transmission from the other party, but it is relatively easy to provide a holding time constant for switching between transmission and reception, and it is also convenient to be able to use it in common with the VOX (voice control) circuit for telephone transmission and reception. Therefore, it is often used in relatively inexpensive equipment.

フル・ブレークイン・キーイングでは電鍵を押下げたマ
ーク時以外は受信状態となっているのであるから、電鍵
操作の終了と同時に受信することができて頭切れを生ず
る心配はない。さらにスペース期間も受信されるため、
たとえ通信内容は不明であっても何か信号が来ているこ
とは判るので、ちょっと電鍵を止めて確認することによ
シ、緊急のブレークイン(割込通信)にも対応し得る便
宜があるものである。しかしながら、このようなフル・
ブレークイン動作を行うためには受信回路は常時動作状
態のままとし、送受信の転換はアンテナ・リレーの動作
によることになるため、マーク時の送信電波の受信回路
への回シ込み防止と送受切換時の回路のトランジェント
防止等の高度の技術が必要であシ、アンテナ・リレーも
電鍵操作に対応し得るハイ・スピードで送信電力に耐え
る高周波用リード・リレーの如き高価略凸を使用する必
要があるので、高度の性能を要求される通信機にフル・
ブレークイン・キーイング方式が使用されている。
With full break-in keying, the signal is in the receiving state except when the mark is pressed down, so reception can be performed at the same time as the key operation is completed, and there is no need to worry about cutting off the beginning of the signal. In addition, space periods are also received, so
Even if the content of the communication is unknown, it is possible to know that a signal is coming, so it is convenient to stop the telephone key for a moment and check it, which also allows you to respond to emergency break-ins (interrupt communication). It is something. However, such a full
In order to perform a break-in operation, the receiving circuit must remain in an operating state at all times, and switching between transmitting and receiving depends on the operation of the antenna relay, so it is necessary to prevent the transmitted radio waves from entering the receiving circuit at the time of marking and to switch between transmitting and receiving. This requires sophisticated technology such as preventing transients in the circuit during transmission, and it is necessary to use expensive antenna relays such as high-speed reed relays for high-frequency use that can withstand transmission power at high speeds that can handle key operations. This makes it ideal for communication devices that require high performance.
A break-in keying method is used.

送信と受信が同一周波数の単一周波数送受信では当然ブ
レークイン周波数も同一であるから問題がないが、送信
と受信に別個の周波数を使用する、いわゆるスゾリッ)
 (SpHt)周波数送受信においては相手方はその送
信周波数(当方の受信周波数)でブレークインするであ
ろうが、当方の送信を傍受した局がブレークインする場
合には傍受周波数(当方の送信周波数)でブレークイン
するのが当然である。従って他局からのブレークインが
送信周波数で行われるか受信周波数で行われるかは予測
することができず、フル拳ブレークイン方式の特長を完
全に発揮するためKは、前記のような受信周波数でのブ
レークイン検出のみならず、送信周波数でのブレークイ
ンに対しても常時監視する必要がある。
There is no problem with single frequency transmission and reception where the transmission and reception are the same frequency, as the break-in frequency is of course the same, but there is no problem with the so-called ssouri, where separate frequencies are used for transmission and reception.
(SpHt) In frequency transmission and reception, the other party will break in at its transmission frequency (our reception frequency), but if the station that intercepts our transmission breaks in, it will break in at the intercepted frequency (our transmission frequency). It is only natural to break in. Therefore, it is impossible to predict whether break-in from another station will occur on the transmit frequency or on the receive frequency, and in order to fully utilize the features of the full fist break-in method, K should be set at the receive frequency as described above. It is necessary to constantly monitor not only break-in detection at the transmission frequency but also break-in at the transmission frequency.

このような目的に対応する発明としては本出願人が先に
出願した%願昭和58年第123860号「フルプレー
クインキイング方法」がある・その趣旨は同出願明細書
の特許請求の範囲に開示されているように「送信周波数
と受信周波数とが夫夫具なる無線通信のスプリット運用
時において、送信周波数と受信周波数を交互あるいは2
ンダムに受信することt−amとするフルブレークイン
キイング方法」であυ、その特長は従来のフル・ブレー
クイン・キーイングの動作においてはスプリット周波数
運用時においても受信周波数でのブレークインのみが検
出され、送信周波数でのブレークインには不感であった
のを改め、ス4−ス区間中に送信周波数と受信周波数と
を交互あるいは2ンダムに受信することにより、ブレー
クイン信号の存在を確実に検知し得るKある。
As an invention corresponding to this purpose, there is a patent application No. 123860 of 1982, "Full Plake Inking Method", which was previously filed by the present applicant.The purpose thereof is disclosed in the claims of the specification of the same application. As stated in ``During split operation of wireless communication where the transmitting frequency and the receiving frequency are mutually exclusive, the transmitting frequency and the receiving frequency may be alternated or doubled.
This is a full break-in keying method that uses random reception as t-am, and its feature is that in conventional full break-in keying operation, only break-in at the receiving frequency is detected even during split frequency operation. In addition to being insensitive to break-in at the transmit frequency, the presence of a break-in signal is now reliably detected by receiving the transmit frequency and the receive frequency alternately or randomly during the space interval. There is a detectable K.

さらに本出願人が昭和58年 8月29日出願の実用新
案「フル・ブレークイン・キーイング回路」は同出願明
細書の実用新案登録請求の範囲に開示されているようK
「送信周波数と受信周波数とがそれぞれ異なる無線通信
のスプリット周波数運用時において、送信周波数と受信
周波数を交互あるいはランダムに受信するフル・ブレー
クイン・キーイング方法において、ブレークイン信号の
周波数が送信周波数であるか受信周波数であるかを判定
する判定信号回路に、キーイングのマーク信号の前縁は
遅延が少なく、マーク信号の後Hには所定量の遅延が行
われるごとき方向性時定数回路を設けると共に、方向性
時定数回路を通した周波数判定信号と方向性時定数回路
を通さない周波数判定信号と周波数判定信号を送信に固
定する判定信号の選択切換スイッチを設けたことを特徴
とするフル・ブレークイン・キーイング回路。」であっ
て、従来のフル・ブレークイン制御回路に若干の回路を
付加することによシ、比較的簡単にブレークイン信号の
検知と、ブレークイン信号の周波 数に受信を固定する
選択切換スイッチを設けて、スプリット周波数運用時の
ブレークイン信号への応答を容易にするための考案であ
る。しかしながら、操作に慣れないと応答に多少の時間
を要するという問題があった。
Furthermore, the utility model "Full Break-in Keying Circuit" filed by the present applicant on August 29, 1988 is disclosed in the claims of the utility model registration in the specification of the same application.
"During split frequency operation in wireless communications where the transmitting frequency and receiving frequency are different, in the full break-in keying method in which the transmitting frequency and receiving frequency are received alternately or randomly, the frequency of the break-in signal is the transmitting frequency. A directional time constant circuit is provided in the determination signal circuit for determining whether the signal is the received frequency or not, and the leading edge of the keying mark signal has a small delay, and the H after the mark signal is delayed by a predetermined amount. Full break-in characterized by providing a selection changeover switch for a frequency judgment signal that passes through a directional time constant circuit, a frequency judgment signal that does not pass through a directional time constant circuit, and a judgment signal that fixes the frequency judgment signal to transmission.・Keying circuit. By adding some circuits to the conventional full break-in control circuit, it is relatively easy to detect the break-in signal and fix the reception to the frequency of the break-in signal. This is an idea to facilitate response to break-in signals during split frequency operation. However, there is a problem in that it takes some time to respond if you are not used to the operation.

本発明は別個の送信周波数と受信周波数で運用するフル
・ブレークイン・キーイング方式の無線電信送受信機に
おいて、ブレークイン信号の周波数が送信周波数である
か受信周波数であるかを自動判定して、送信終了時の受
信周波数をブレークイン信号の周波数に自動設定する機
能と、前記設定された周波数を正規の運用周波数に復帰
するためのリセット機能を具備してなるフル・ブレーク
イン・キーイング送受信機回路であって、ブレークイン
入力があれば、受信周波数はブレークイン周波数に自動
設定されるので、なんらの特別の操作を必要としないで
、直ちにブレークインに応答できる特徴がある。
The present invention is a full break-in keying radio transmitter/receiver that operates using separate transmit and receive frequencies, and automatically determines whether the frequency of a break-in signal is the transmit frequency or the receive frequency. A full break-in keying transmitter/receiver circuit equipped with a function to automatically set the receiving frequency at the time of termination to the frequency of the break-in signal, and a reset function to restore the set frequency to the normal operating frequency. If there is a break-in input, the receiving frequency is automatically set to the break-in frequency, so there is a feature that it is possible to immediately respond to the break-in without any special operation.

本発明の実施例につき述べる前にフル・ブレークイン・
キーイング方式の無線電信送受信機回路の構成例を第1
図面の簡単な説明すると、受信回路lの21・23は信
号増幅器、22は受信ミクサ、24は音声増幅段、25
性スピーカであシ、送信回路主の31は送信出力段、3
2は送信ミクサ、33は送信低電力段、34は原発振器
、3・5はす4ド一トーン発振器、36はサイド・トー
ン・バッファ拳アンプである。送信と受信の切換はアン
テナをアンテナリレー1で送信側と受信側に切換えるこ
とによシ行うが、そのはかに1!源電圧も送信と受信に
切換え、さらにRXミュー)、TXミュートの制御回路
を備えている。それは送信電力の受信回路への回シ込み
防止と、切換時のクリック音防止およびキーイング波形
の整形等の要求によるもので、末鎖線で囲ったフル・ブ
レークイン制御回路で必要のタイミングを作っている。
Before describing embodiments of the present invention, a full break-in
The first example of the configuration of a wireless telecommunication transmitter/receiver circuit using the keying method is as follows.
To briefly explain the drawing, 21 and 23 of the receiving circuit l are signal amplifiers, 22 is a receiving mixer, 24 is an audio amplification stage, and 25
31 is the transmission output stage, which is the main transmitter circuit.
2 is a transmitting mixer, 33 is a transmitting low power stage, 34 is an original oscillator, 3.5 is a 4-domain tone oscillator, and 36 is a side tone buffer amplifier. Switching between transmitting and receiving is done by switching the antenna between the transmitting side and the receiving side using antenna relay 1, but that's just 1! The power source voltage can also be switched between transmitting and receiving, and it is also equipped with control circuits for RX mute and TX mute. This is due to the requirements of preventing transmission power from being fed into the receiving circuit, preventing clicking noises during switching, and shaping the keying waveform.The full break-in control circuit shown in the dashed line at the end creates the necessary timing. There is.

第2図はフル・ブレークイン・キーイング方式の送受信
機の周波数設定の系統図である。受信周波数は受信ミク
サ22への注入周波数によって決まシ、送信周波数は送
信ミクサ32への注入周波数によって決定される。これ
らの注入周波数を発生する局部発振器には現在では#圧
とんどPLL(Phase Locked Loop)
制御のVCO(Vo l tagsControlle
d 0scillator)が使用され、vCOの周波
数はPLL回路内のPD (Programable 
Divider)にデジタル値の周波数データを入力す
ることにより設定する。この周波数データを作るにも各
種の方法があるが、第2図では最近多く使用されるCP
U (Central Processor Unit
)を使用している。
FIG. 2 is a system diagram of frequency settings for a full break-in keying transceiver. The reception frequency is determined by the injection frequency to the reception mixer 22, and the transmission frequency is determined by the injection frequency to the transmission mixer 32. The local oscillator that generates these injection frequencies currently uses a PLL (Phase Locked Loop).
Control VCO (Vol tags Control
d 0scillator) is used, and the frequency of vCO is determined by the PD (Programmable
The frequency data is set by inputting digital value frequency data to the frequency divider. There are various methods to create this frequency data, but in Figure 2, CP
U (Central Processor Unit
) is used.

これらPLL −CPUおよび周波数制御回路(図忙は
省略)については本出願と直接の関係が無いので説明は
省略するが、スプリット周波数運用時に必要な送信周波
数と受信周波数の転換はCPHに加える送受判定信号が
HレベルであるがLレベルであるかによって行っている
。図中の太鎖線で囲ったフル・ブレークイン制御回路に
第3図を適用すると、CP[Jに加わる送受判定信号は
キーイング信号を方向性時定数回路を通して出力を得て
いるので、第4に)のタイミング波形図のごとくなり、
キーアップの受信区間内の前半は送信周波数でブレーク
インを検知(受信)シ、後半は受信周波数でブレークイ
ンを検知するための周波数判定信号を作出している。第
21詠1のその他の回路部分については本発明と直接+
JJ係が薄いので説明は省略する。
Since these PLL-CPU and frequency control circuit (the figures are omitted) are not directly related to this application, the explanation will be omitted, but the conversion of the transmitting frequency and receiving frequency required during split frequency operation is a transmitting/receiving judgment that is added to the CPH. This is done depending on whether the signal is at H level or L level. If Figure 3 is applied to the full break-in control circuit surrounded by the thick chain line in the figure, the transmission/reception determination signal applied to CP[J is output from the keying signal through the directional time constant circuit, so the fourth ) as shown in the timing waveform diagram,
In the first half of the key-up reception period, a break-in is detected (received) at the transmission frequency, and in the second half, a frequency determination signal is generated to detect a break-in at the reception frequency. The other circuit parts of the 21st Ei 1 are directly related to the present invention +
I will omit the explanation as the JJ staff is short.

第5図は本発明の特許請求の範囲第1項および第2項記
載のブレークイン信号の周波数が送信周波数であるか受
信周波数であるかを自動判定する回路であって、例えば
第3図のごときフル・ブレークイン制御1路よシのブレ
ークイン周波数の送受判定信号をインバータ41を通し
て反転した信号と受信電源電圧(例えば第3図のRx 
8 V ) とを第1のANDデート42Aの入力A−
Bに加え、その出力Yと受信回路主のプロダクト検波2
6の出力をダイオード43で整流した正極性出力とをN
AND )r” −) 440入力A−Bに加え、その
出力Yをラッチ回路45を通して第2のANDr−ト4
6のA入力に加え、またB入力にはフル・ブレークイン
制御回路よりのブレークイン周波数の送受判定信号を加
えて、その出力Yをブレークイン信号の周波数が送信周
波数であるか受信周波数であるかを自動判定した送受判
定信号として出力する。従って第2図の周波数設定の系
統図において、フル・ブレークイン制御回路の送受判定
信号出力を第5図の送受判定信号入力に接続し、第5図
の送信判定信号出力を第2図のCPUに入力することに
より本発明の特許請求の範囲第1項記載の送信終了時の
受信周波数をブレークイン信号の周波数に自動設定する
機能を付加するものである。
FIG. 5 shows a circuit for automatically determining whether the frequency of the break-in signal according to claims 1 and 2 of the present invention is a transmission frequency or a reception frequency, for example, the circuit shown in FIG. A signal obtained by inverting the transmission/reception determination signal of the break-in frequency of the full break-in control circuit 1 through the inverter 41 and the reception power supply voltage (for example, Rx in FIG.
8 V) and the input A- of the first AND date 42A.
In addition to B, its output Y and product detection 2 of the receiving circuit main
6 is rectified by diode 43 and the positive polarity output is N.
AND)r''-) 440 input A-B, and its output Y is passed through the latch circuit 45 to the second ANDr-to 4.
In addition to the A input of 6, the break-in frequency transmission/reception determination signal from the full break-in control circuit is added to the B input, and the output Y is determined whether the frequency of the break-in signal is the transmission frequency or the reception frequency. This is automatically determined and output as a transmission/reception determination signal. Therefore, in the frequency setting system diagram of FIG. 2, the transmission/reception judgment signal output of the full break-in control circuit is connected to the transmission/reception judgment signal input of FIG. 5, and the transmission judgment signal output of FIG. This adds a function of automatically setting the reception frequency at the end of transmission to the frequency of the break-in signal, as set forth in claim 1 of the present invention, by inputting the frequency to the frequency of the break-in signal.

次に第4図および第7図の動作タイミング波形図を参照
しながら第5図回路の動作を説明する。
Next, the operation of the circuit shown in FIG. 5 will be explained with reference to the operation timing waveform diagrams shown in FIGS. 4 and 7.

第5図回路に入力する送受判定信号は、例えば第3図の
フル・ブレークイン制御回路よシ供給される。第3図°
においてはキーイング回路のキーイン第1表 第2表 グによるH−Lの電位変化を鎖線で囲った方向性時定数
回路−おいて、抵抗Roとコンデンサc。
The transmission/reception determination signal input to the circuit of FIG. 5 is supplied, for example, from the full break-in control circuit of FIG. Figure 3 °
In Table 1 and Table 2, the keying circuit of the keying circuit is a directional time constant circuit in which the change in potential of H-L is enclosed by a chain line, and the resistance Ro and capacitor c.

とよりなる時定数回路のaOと並列にダイオードDoを
接続するとと忙より、キーダウン波形は遅れがなく、キ
ーアップ波形のみ時間遅延させた、第4図のタイミング
波形における送受判定信号である。
Since the diode Do is connected in parallel with aO of the time constant circuit, the key-down waveform has no delay, and only the key-up waveform is delayed, which is the transmission/reception determination signal in the timing waveform of FIG.

第5図の第1のANDゲート410入力Aには前記の送
受判定信号をインバータを通して反転して加え、入力B
(AとBは逆にしてもよい)にはRX8V(受信状態°
でHレベル、送信状態ではLレベル)を加えると、出力
は第1表の真理値表に従いYlとなる。すなわち、A−
Bが共にHのときにのみYlはHとなり、その他の場合
はすべてLとなるので、入力Bが受信状態で入力Aの送
受判定信号が「送信」のときのみYlがHとなる。これ
を第7図(4)に示す。このYlをNAND ダート4
4の入力B(AとBは逆にしてもよい)に加え、入力A
には受信部ヱの検波器26の出力をダイオード43で整
流した正極性出力を加えるので、ブレークイン信号があ
ればAI′iHレベルになシ、無ければLレベルとなる
。従って送受判定信号の「送信」時にAがHレベルにな
るか、「受信」時にHレベルになるかによってブレーク
イン信号の周波数が判定され、NAND ダートの真理
値表は第2表のように、A−B入力が共にIIのときの
み出力Y2はLとなQlその他はすべてHであるから、
出力Y2にLレベルが現われれば送信周波数であると判
定する。これを第7図(B)に示す。このLレベル出力
は断続するので、ラッテ45で固定したLレベルを第2
のAND 46のへ入力に加える。B入力には送受判定
信号が加わシ、第1表の真理値表に従って、「送信」判
定時に□はλ人カのいがんに係らず出力Y3はLレベル
であり、ラッチ出力(へ入力)がLとなると「受信」判
定時にもY3出力はLとなシ「送信」周波数と判定され
、キーイング終了時に送信周波数でブレークイン信号を
受信することになる。これを第7図の(C)に示す。
The transmission/reception determination signal is inverted and applied to the input A of the first AND gate 410 in FIG. 5 through an inverter, and the input B
(A and B may be reversed) is RX8V (reception status °
(H level in the transmitting state, L level in the transmitting state), the output becomes Yl according to the truth table shown in Table 1. That is, A-
Yl is H only when both B are H, and is L in all other cases, so Yl is H only when input B is in the reception state and the transmission/reception determination signal of input A is "transmission". This is shown in FIG. 7 (4). NAND this Yl Dart 4
In addition to input B of 4 (A and B can be reversed), input A
Since the positive polarity output obtained by rectifying the output of the detector 26 of the receiving section 2 with the diode 43 is added to the signal, the signal will be at the AI'iH level if there is a break-in signal, and will be at the L level if there is no break-in signal. Therefore, the frequency of the break-in signal is determined depending on whether A goes to H level when "transmitting" or "receiving" the transmission/reception determination signal, and the truth table for NAND dart is as shown in Table 2. Only when both A and B inputs are II, the output Y2 is L. Ql and all others are H, so
If the L level appears on the output Y2, it is determined that the transmission frequency is present. This is shown in FIG. 7(B). Since this L level output is intermittent, the L level fixed by the ratte 45 is
AND Add to input of 46. A transmission/reception determination signal is applied to the B input, and according to the truth table in Table 1, when determining "transmission", □ is λ regardless of the input power, and the output Y3 is at L level, and the latch output (input to) is When it becomes L, the Y3 output is determined to be the "transmission" frequency even when "reception" is determined, and the break-in signal is received at the transmission frequency when keying is completed. This is shown in FIG. 7(C).

次に受信周波数のブレークインの場合には囚のY1出力
のHレベル部が発生しないので、第7図の■)のように
yl出力はLとな9、A入力のいかんに係らずY2出力
もLとなる。従って第2のANDダート46のY3出力
はA入力と全く同形であり、受信周波数で受信する普通
のスジリット周波数送受信動作となる。
Next, in the case of a break-in of the reception frequency, the H level part of the Y1 output does not occur, so the yl output becomes L as shown in (■) in Figure 79, and the Y2 output regardless of the A input. is also L. Therefore, the Y3 output of the second AND dart 46 has exactly the same shape as the A input, and the normal striped frequency transmitting/receiving operation is performed for receiving at the receiving frequency.

以上のように特許請求の範囲第2項記載の第5図の構成
によシ、ブレークインが受信周波数であればキーイング
終了後はそのままの周波数でブレークインも交信相手も
受信できる(これは通常のスプリット交信)シ、ブレー
クインが送信周波数であればキーイング終了後は送信周
波数でブレークインを自動的に受信するから、ブレーク
インに対する応答が極めて迅速にできるものであるが、
ブレークインに応答後は再び交信相手局にもどる必要が
あシ、特許請求の範囲第3項において、第2項に記載の
う、テ回路にリセット・スイッチ47を設けて、これを
操作することによりラッチ動作を解除する構成を開示し
ている。
As described above, according to the configuration shown in FIG. 5 described in claim 2, if the break-in is at the receiving frequency, the break-in and communication partner can receive the same frequency after keying is completed (this is normally not the case). If the break-in is on the transmit frequency, the break-in will be automatically received on the transmit frequency after keying is completed, so the response to the break-in can be extremely quick.
After responding to the break-in, it is necessary to return to the communication partner station again. According to claim 3, as described in claim 2, a reset switch 47 is provided in the Te circuit and operated. This disclosure discloses a configuration in which the latch operation is canceled by.

さらに特許請求の範囲第2項記載の第5図の回路例にお
いて、第1のANDr−)42Aの代シに3人力AND
ダート42Bを用い、第6図のように、フル・ブレーク
イン制御回路よシのブレークイン周波数の送受判定信号
をインバータ41を通して反転した信号を42Bの入力
Aに、受信電源電圧(例えばRX8V)を入力Bに加え
、入力CのレベルをLとHに切替えるスイッチ49を設
け、例えばHレベルのvcc、lニジ抵抗48を通して
入力Cに接続した状態ではダート42Bの動作は第3表
第3表 の真理値表に従い、A−Bが共にHであるときのみ出力
YはHとなシ、その他のすべての組み合わせで出力Yは
Lとなる。すなわち、入力CがI−Iであれば入力A−
Hに関しては第1表と同じであシ、従って42Bは第5
図の42Aと同一機能である。
Furthermore, in the circuit example of FIG. 5 described in claim 2, a three-man power AND
Using Dart 42B, as shown in Fig. 6, the signal obtained by inverting the transmission/reception determination signal of the break-in frequency of the full break-in control circuit through the inverter 41 is input to the input A of 42B, and the receiving power supply voltage (for example, RX8V) is connected. In addition to input B, a switch 49 is provided to switch the level of input C between L and H. For example, when VCC at H level is connected to input C through a rainbow resistor 48, the operation of dart 42B is as shown in Table 3. According to the truth table, the output Y is H only when both A and B are H, and the output Y is L in all other combinations. That is, if input C is I-I, input A-
As for H, it is the same as Table 1, so 42B is the 5th table.
It has the same function as 42A in the figure.

次に入力CがLレベルであると入力A−Hのレベルのい
かんに係らず出力Y1はLに固定され、これを入力する
NAND e −) 44の出力Y2はLレベルに固定
される。この状態ではANDゲート46の送信判定信号
入力と出力とは全く同じ波形となり、自動設定機能が解
除されたことになる。そこで、3ANDダート42Bの
入力Cを接地するスイ、チ49を開放(AUTOに個人
)すれば、ブレークイン信号に対して周波数を自動設定
する回路となシ、接地(MANUに個人)すれば自動設
定を行わない通常回路として動作し、その切替には信号
回路に触れることなく、直流回路の電位操作のみにより
行うので、動作は確実であシ、雑音混入等の心配も無い
利益がある。
Next, when the input C is at the L level, the output Y1 is fixed at the L level regardless of the level of the inputs A-H, and the output Y2 of the NAND (e-) 44 that inputs this is fixed at the L level. In this state, the transmission determination signal input and output of the AND gate 46 have exactly the same waveform, and the automatic setting function is canceled. Therefore, if the switch that connects the input C of the 3AND dart 42B to ground, and the switch 49, is opened (personally set to AUTO), the circuit automatically sets the frequency for the break-in signal. It operates as a normal circuit without any settings, and switching is performed only by manipulating the potential of the DC circuit without touching the signal circuit, so the operation is reliable and has the advantage of not having to worry about noise contamination.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はフル・ブレークイン−キーイング無線電信送受
信機のフル・ブレークイン制御回路の系統図。第2図は
フル・ブレークイン・キーイング無線電信送受信機の周
波数制御回路の系統図。第3図はフル・ブレークイン制
御回路の例。第4図は第3図回路の動作タイミング波形
図。第5図は本発明の実施回路例。第6図は部分回路図
。第7図は第5図の動作タイミング波形図である・1・
・・アンテナ・リレー、ヱ・・・受信回路、且・・・送
信回路、21・23・・・受信信号増幅段、22・・・
受信ミクサ段、24・・・受信音声増幅段、25・・・
スピーカ、26・・・プロダクト検波段、31・・・送
信出力段、32・・・送信ミクサ段、33・・・送信低
電力段、34・・・原発振器、35・・・サイドトーン
発振器、36・・・サイドトーン増幅器、41・GO・
・・インノq−タ、42A−42B−46−ANDf−
)、43・Do ・・・ダイオード、44・・・NAN
D ?−ト、45・・・う、テ、47・49・・・スイ
、テ、48・R(1・・・抵抗器、K・・・電鍵、co
・・・コンデンサ。 第 4 図 寸イ112.−2 マー1 ′″′″゛−ス マー2 
′L°°−人第 5 図
FIG. 1 is a schematic diagram of a full break-in control circuit for a full break-in keying wireless telegraph transceiver. FIG. 2 is a system diagram of the frequency control circuit of a full break-in keying radio transmitter/receiver. Figure 3 is an example of a full break-in control circuit. FIG. 4 is an operation timing waveform diagram of the circuit of FIG. 3. FIG. 5 shows an example of an implementation circuit of the present invention. Figure 6 is a partial circuit diagram. Figure 7 is an operation timing waveform diagram of Figure 5.1.
... Antenna relay, E... Receiving circuit, and... Transmitting circuit, 21, 23... Received signal amplification stage, 22...
Reception mixer stage, 24... Reception audio amplification stage, 25...
Speaker, 26... Product detection stage, 31... Transmission output stage, 32... Transmission mixer stage, 33... Transmission low power stage, 34... Original oscillator, 35... Sidetone oscillator, 36...sidetone amplifier, 41.GO.
・・Innoq-ta, 42A-42B-46-ANDf-
), 43・Do...diode, 44...NAN
D? -G, 45... U, Te, 47, 49... Sui, Te, 48, R (1... Resistor, K... Telephone key, co
...Capacitor. 4th diagram Dimensions A112. -2 Mar 1 ′″′″゛-S Mar 2
'L°°-Person Figure 5

Claims (4)

【特許請求の範囲】[Claims] (1)別個の送信周波数と受信周波数で運用するフル・
ブレークイン・キーイング方式の無線電信送受信機にお
いて、ブレークイン信号の周波数が送信周波数であるか
受信周波数であるかを自動判定して、送信終了時の受信
周波数をブレークイン信号の周波数に自動設定する機能
と、前記設定された周波数を正規の運用周波数に復帰す
るためのリセット機能を具備したことを特徴とするフル
・ブレークイン・キーイング送受信機回路。
(1) Full-scale operation with separate transmit and receive frequencies
In a break-in keying wireless telecommunication transmitter/receiver, it is automatically determined whether the frequency of the break-in signal is the transmit frequency or the receive frequency, and the receive frequency at the end of transmission is automatically set to the frequency of the break-in signal. 1. A full break-in keying transmitter/receiver circuit, characterized in that it has a reset function for restoring the set frequency to a normal operating frequency.
(2) 別個の送信周波数と受信周波数で運用するフル
・ブレークイン・キーイング方式の無線電信送受信機に
おいて、ブレークイン信号の周波数が送信周波数である
か受信周波数であるかを自動判定する回路はフル・ブレ
ークイン制御回路よシのブレークイン周波数の送受判定
信号をインバータ全通して反転した信号と受信電源電圧
とを第1のANDダートを通して得た出力と受信信号の
正極性出力とをNANDダー)1−通して得た出力をラ
ッチ回路を通して第2のANII’−)に前記ブレーク
イン周波数の送受判定信号と共に加え、該第2のAND
ダート出力をもって送受信周波数を設定する構成である
特許請求の範囲第1項記載のフル・ブレークイン・キー
イング送受信機回路。
(2) In a full break-in keying radio transmitter/receiver that operates using separate transmit and receive frequencies, the circuit that automatically determines whether the frequency of the break-in signal is the transmit frequency or the receive frequency is fully equipped.・NAND the output obtained by passing the transmission/reception determination signal of the break-in frequency from the break-in control circuit through the inverter and the received power supply voltage through the first AND dart, and the positive polarity output of the received signal. 1- is applied to the second ANII'-) through the latch circuit together with the transmission/reception determination signal of the break-in frequency, and the second AND
A full break-in keying transmitter/receiver circuit according to claim 1, wherein the transmitting/receiving frequency is set using the dirt output.
(3)特許請求の範囲第2項に記載のラッチ回路にリセ
ット・スイッチを設け、これを操作することによシラッ
チ動作を解除する構成とした、特許請求の範囲第1項お
よび第2項に記載のフル・ブレークイン・キーイング送
受信機回路。
(3) Claims 1 and 2 have a configuration in which the latch circuit according to claim 2 is provided with a reset switch, and the silatch operation is canceled by operating the reset switch. Full break-in keying transceiver circuit as described.
(4)特許請求の範囲第2項に記載の第1のANDダー
トに3人力ANDダートを用い、フル・ブレークイン制
御回路よシのブレークイン周波数の送受判定信号をイン
バータを通して反転した信号と受信電源電圧を入力する
ほか、第3の入力のレベルをLとHに切替えることによ
シ、ブレークイン信号の検出動作と受信周波数をブレー
クイン信号の周波数に自動設定する動作とを選定する構
成とした、特許請求の範囲第1項および第2項に記載の
フル・ブレークイン・キーイング送受信機回路。
(4) A three-man-powered AND dart is used for the first AND dart described in claim 2, and the transmission/reception determination signal of the break-in frequency of the full break-in control circuit is received with a signal inverted through an inverter. In addition to inputting the power supply voltage, by switching the level of the third input between L and H, the break-in signal detection operation and the operation of automatically setting the reception frequency to the break-in signal frequency are selected. A full break-in keying transceiver circuit according to claims 1 and 2.
JP16399683A 1983-09-06 1983-09-06 Full break-in keying transmitter and receiver circuit Granted JPS6055741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16399683A JPS6055741A (en) 1983-09-06 1983-09-06 Full break-in keying transmitter and receiver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16399683A JPS6055741A (en) 1983-09-06 1983-09-06 Full break-in keying transmitter and receiver circuit

Publications (2)

Publication Number Publication Date
JPS6055741A true JPS6055741A (en) 1985-04-01
JPS6366090B2 JPS6366090B2 (en) 1988-12-19

Family

ID=15784773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16399683A Granted JPS6055741A (en) 1983-09-06 1983-09-06 Full break-in keying transmitter and receiver circuit

Country Status (1)

Country Link
JP (1) JPS6055741A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03130718U (en) * 1990-04-16 1991-12-27
JPH06239152A (en) * 1994-02-16 1994-08-30 Yanmar Agricult Equip Co Ltd Continuously variable transmission for rice transplanter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03130718U (en) * 1990-04-16 1991-12-27
JPH06239152A (en) * 1994-02-16 1994-08-30 Yanmar Agricult Equip Co Ltd Continuously variable transmission for rice transplanter

Also Published As

Publication number Publication date
JPS6366090B2 (en) 1988-12-19

Similar Documents

Publication Publication Date Title
JP2002525957A (en) Intelligent control of receiver linearity based on interference
KR870008450A (en) Wireless telephones and communication methods
US4241236A (en) Noise range indicating system
CA2089259C (en) Transient suppression circuit for a time domain duplex transceiver
US4661970A (en) Cordless telephone system
US5444736A (en) Radio communication apparatus having an automatic frequency control circuit for controlling a transmission frequency on the basis of a reception frequency
US2766324A (en) Switching system
JPH04269021A (en) Two-way paging system
JPS6055741A (en) Full break-in keying transmitter and receiver circuit
US3902122A (en) Apparatus for speeding-up the attack time of a tone-coded radio receiver
US4171516A (en) Tone phase shift detector
JPH0127310Y2 (en)
KR960039800A (en) Home Automation's Multi-Currency Devices
JP2960199B2 (en) Wireless data transmission equipment
JP2000022575A (en) Receiver and storage medium with program
US6546245B1 (en) Inverted code sequence cordless signaling
JPS63308418A (en) Radio receiver
JPH01218224A (en) Radio telephone equipment
KR20020079964A (en) Architecture for cordless telephones
JPH0115244Y2 (en)
JPS60194841A (en) Cordless telephone set
JPS63242032A (en) Simultaneous radio transmitter-receiver
JPH0123976B2 (en)
JPS6087548A (en) Full brake-in keying system
JPH0378333A (en) Cordless telephone system